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FEATURES
LOWDRIFT|∆VGS1‐2/∆T|=5µV/°Cmax.
LOWLEAKAGEIG=20pATYP.
LOWNOISEen=10nV/√HzTYP.
ABSOLUTEMAXIMUMRATINGS
@25°C(unlessotherwisenoted)
MaximumTemperatures
StorageTemperature‐65°Cto+200°C
OperatingJunctionTemperature+150°C
MaximumVoltageandCurrentforEachTransistor–Note1
‐VGSSGateVoltagetoDrainorSource60V
‐VDSODraintoSourceVoltage60V
‐IG
(
f
)
GateForwardCurrent50mA
MaximumPowerDissipation
DeviceDissipation@FreeAir–Total400mW@25°C
MATCHINGCHARACTERISTICS@25°CUNLESSOTHERWISENOTED
SYMBOLCHARACTERISTICSVALUEUNITSCONDITIONS
|VGS1‐2/T|max.DRIFTVS.
TEMPERATURE
5µV/°CVDG=20V,ID=200µA
TA=‐55°Cto+125°C
|VGS1‐2|max.OFFSETVOLTAGE5mVVDG=20V,ID=200µA
ELECTRICALCHARACTERISTICS@25°C(unlessotherwisenoted)
SYMBOLCHARACTERISTICSMIN.TYP.MAX.UNITSCONDITIONS
BVGSSBreakdownVoltage60 ‐‐ ‐‐ VVDS=0ID=1µA
BVGGOGate‐To‐GateBreakdown60 ‐‐ ‐‐ V IG=1nAID=0IS=0
YfSS
TRANSCONDUCTANCE
FullConduction
1000
2000
3000
µmho
VDG=20VVGS=0Vf=1kHz
YfSTypicalOperation5007001000µmho VDG=20VID=200µA
|YFS1‐2/YFS|Mismatch ‐‐ 0.63%
IDSS
DRAINCURRENT
FullConduction
0.5
2
5
mA
VDG=20VVGS=0V
|IDSS1‐2/IDSS|MismatchatFullConduction ‐‐ 15%
VGS(off)orV
p
GATEVOLTAGE
Pinchoffvoltage
1
2
4.5
V
VDS=20VID=1nA
VGS(on)OperatingRange0.5 ‐‐ 4V VDS=20VID=200µA
‐IG
GATECURRENT
Operating
‐‐
20
50
pA
VDG=20VID=200µA
‐IGHighTemperature ‐‐ ‐‐ 50nATA=+125°C
‐IGReducedVDG ‐‐ 5 ‐‐ pAVDG=10VID=200µA
‐IGSSAtFullConduction ‐‐ ‐‐ 100pAVDG=20VVDS=0
YOSS
OUTPUTCONDUCTANCE
FullConduction
‐‐
‐‐
5
µmho
VDG=20VVGS=0V
YOSOperating ‐‐ 0.11µmhoVDG=20VID=200µA
|YOS1‐2|Differential ‐‐ 0.010.1µmho
CMR
COMMONMODEREJECTION
‐20log|VGS1‐2/VDS|
‐‐
100
‐‐
dB
∆VDS=10to20VID=200µA
CMR‐20log|VGS1‐2/VDS|‐‐ 75 ‐‐ dB∆VDS=5to10VID=200µA
NF
NOISE
Figure
‐‐
‐‐
0.5
dB
VDS=20VVGS=0VRG=10MΩ
f=100HzNBW=6Hz
enVoltage ‐‐ ‐‐ 15nV/√HzVDS=20VID=200µAf=10HzNBW=1Hz
CISS
CAPACITANCE
Input
‐‐
‐‐
6
pF
VDS=20VVGS=0Vf=1MHz
CRSSReverseTransfer ‐‐ ‐‐ 2pF
CDDDrain‐to‐Drain ‐‐ 0.1 ‐‐ pFVDG=20VID=200µA
The LS3954A is a Low Noise, Low Drift, Monolithic Dual N-Channel JFET
LS3954A
MONOLITHIC DUAL
N-CHANNEL JFET
Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired
LS3954A Applications:
Wideband Differential Amps
High Input Impedance Amplifiers
The LS3954A family are matched JFET pairs for
differential amplifiers. The LS3954A family of general
purpose JFETs is characterized for low and medium
frequency differential amplifiers requiring low offset
voltage, drift, noise and capacitance
The LS3954A family exhibits low capacitance - 6pF max
and a spot noise figure of - 0.5dB max. The part offers
a superior tracking ability.
The 8 Pin P-DIP and 8 Pin SOIC provide ease of
manufacturing, and the symmetrical pinout prevents
improper orientation.
(See Packaging Information).
PDIP / SOIC (Top View)
Available Packages:
LS3954A in PDIP / SOIC
LS3954A available as bare die
Please contact Micross for full package and die dimensions
Micross Components Europe
Tel: +44 1603 788967
Email: chipcomponents@micross.com
Web: http://www.micross.com/distribution