General Description
The MAX16922 power-management integrated circuit
(PMIC) is designed for medium power-level automotive
applications and integrates multiple supplies in a small
footprint. The device includes one high-voltage step-
down converter (OUT1) and three low-voltage cascaded
DC-DC converters (OUT2, OUT3, OUT4). OUT1 and
OUT2 are step-down DC-DC converters, and OUT3/
OUT4 are linear regulators. The device also includes
a reset output (RESET) and a high-voltage-compatible
enable input (EN).
The 1.2A output high-efficiency, step-down DC-DC con-
verter (OUT1) operates from a voltage up to 28V con-
tinuous and is protected from load-dump transients up to
45V. The 600mA output high-efficiency step-down DC-DC
converter (OUT2) runs from a voltage up to 5.5V. The two
300mA LDO linear regulators offer low dropout of only
130mV (typ). The power-good RESET output provides
voltage monitoring for OUT1 and OUT2.
OUT1 and OUT2 use fast 2.2MHz PWM switching and
small external components. The high-voltage converter
(OUT1) enters skip mode automatically under light loads
to prevent an overvoltage condition from occurring at the
output. The low-voltage synchronous DC-DC converter
(OUT2) can operate in forced-PWM mode to prevent any
AM band interference or high-efficiency auto-PWM mode.
The MAX16922 includes overtemperature shutdown and
overcurrent limiting. The device is designed to operate
from -40°C to +125°C ambient temperature.
Benets and Features
1.2A High-Efficiency 2.2MHz DC-DC Converter
3.7V to 28V Operating Supply Voltage
45V Load-Dump Protection
Output Voltage: 3.0V to 5.5V
600mA High-Efficiency 2.2MHz DC-DC Converter
2.7V to 5.5V Supply Voltage
Output Voltage: 1.0V to 3.9V
180° Out-of-Phase Operation
Forced-PWM and Auto-PWM Modes
LDO Linear Regulators
OUT3: 1.0V to 4.15V at 300mA
OUT4: 1.0V to 4.15V at 300mA
Separate Inputs for Increased Efficiency
Enable Input
RESET Output Monitoring on OUT1 and OUT2
Overtemperature and Short-Circuit Protection
Available in
5mm x 5mm x 0.8mm, 20-Pin TQFN-EP
4.5mm x 6.5mm, 20-Pin TSSOP-EP
19-5039; Rev 10; 2/16
Ordering Information appears at end of data sheet.
MAX16922
EP
PV1
EN
4.7µF
1µF
0.1µF
10µF
VPV1
PV3
PWM
4.7µF
VOUT1
OUT3
GND1
GND3
4.7µF
VOUT3
PV4 OUTS1
4.7µF
VOUT2
VOUT1
OUT4
GND2
20k
RESET
GND
4.7µF
VOUT4
LSUP
4.7µH
LX1 VOUT1
BST
PV2
10µF
PGND2
2.2µH
LX2 VOUT2
OUTS2
4.7µF
MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
Typical Operating Circuit
EVALUATION KIT AVAILABLE
PV1, EN to GND .....................................................-0.3V to +45V
LX1 to GND.................................................-0.5V to (PV1 + 0.3V)
LX2 to GND.................................................-0.5V to (PV2 + 0.3V)
BST to LX1.............................................................-0.3V to +6.0V
PV2, PV3, PV4, OUTS1, PWM, RESET to GND_....-0.3V to +6.0V
OUTS2 .......................................................-0.3V to (PV2 + 0.3V)
OUT3 .........................................................-0.3V to (PV3 + 0.3V)
OUT4 .........................................................-0.3V to (PV4 + 0.3V)
LX1 RMS Current .................................................................2.0A
LX2 RMS Current .................................................................1.2A
PGND2 to GND_....................................................-0.3V to +0.3V
LSUP to GND............................................................-0.3V to +6V
OUTS_, OUT_ Output Short-Circuit Duration .............Continuous
Continuous Power Dissipation (TA = +70°C)
TQFN (derate 31.3 mW/°C above +70°C)..................2500mW
TSSOP (derate 26.5 mW/°C above +70°C).................... 2122mW
ESDHB (all pins)...................................................................±2kV
ESDMM (all pins)................................................................±200V
ESDCDM (corner pins).......................................................±750V
ESDCDM (other pins).........................................................±500V
Operating Temperature Range ..........................-40°C to +125°C
Junction Temperature.......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) ..................................+300°C
Soldering Temperature (reflow) .......................................+260°C
TQFN
Junction-to-Ambient Thermal Resistance (θJA)...........30°C/W
Junction-to-Case Thermal Resistance (θJC)..................2°C/W
TSSOP
Junction-to-Ambient Thermal Resistance (θJA)........37.7°C/W
Junction-to-Case Thermal Resistance (θJC)..................2°C/W
(Note 1)
(VPV1 = 13.5V, VPV2 = VPV3 = VOUT1, VPV4 = VOUT2; TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA
= +25°C under normal conditions, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
OUT1—SYNCHRONOUS STEP-DOWN DC-DC CONVERTER
Supply-Voltage Range VPV1
(Note 3) 3.7 28 V
Operation < 500ms 45
PV1 Undervoltage Lockout VUVLO,R PV1 rising 3.7 4.0 V
VUVLO,F PV1 falling 2.85 3.3
BST Refresh Load Enable VBRLE PV1 falling (option enabled) 6.45 V
BST Refresh Load Hysteresis 0.65 V
LSUP Regulator Voltage VLSUP 6V ≤ VPV1 ≤ 28V 4.75 5.0 5.45 V
Supply Current IPV1 EN = low 14 µA
PWM Switching Frequency fSW Internally generated 2.0 2.2 2.4 MHz
Voltage Accuracy VOUT1
Duty cycle = 20% to 90%;
ILOAD = 300mA to 1.2A -3 +3 %
SKIP mode (Note 4) -2 +4
DMOS On-Resistance VPV1 = 4V, VBST = 9V, ILX1 = 0.2A 300 700
Current-Limit Threshold 1.4 1.75 2.1 A
Soft-Start Ramp Time 2.2 ms
MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
www.maximintegrated.com Maxim Integrated
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Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics
Electrical Characteristics
(VPV1 = 13.5V, VPV2 = VPV3 = VOUT1, VPV4 = VOUT2; TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA
= +25°C under normal conditions, unless otherwise noted.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Maximum Output Current IOUT1 (VOUT1 + 1.0V) ≤ VPV1 ≤ 28V 1.2 A
LX1 Leakage Current VPV1 = 12V, LX1 = GND or VPV1;
TA = -40°C to +85°C ±1 µA
Maximum Duty Cycle DCMAX 94 %
Minimum Duty Cycle DCMIN fSW = 2.2MHz 20 %
OUTS1 Discharge Resistance EN = low (or optionally EN = high and
VPV1 < 5.7V) 70 Ω
OUT2—SYNCHRONOUS STEP-DOWN DC-DC CONVERTER
Supply-Voltage Range VPV2 Fully operational 2.7 5.5 V
PWM Switching Frequency fSW Internally generated 2.0 2.2 2.4 MHz
Voltage Accuracy VOUT2
Duty cycle = 20% to 90%;
ILOAD = 1mA to 600mA, PWM = high -3 +3 %
SKIP mode (Note 4) -2 +4 %
pMOS On-Resistance VPV2 = 5.0V, ILX2 = 0.2A 150 250
nMOS On-Resistance VPV2 = 5.0V, ILX2 = 0.2A 200 350
pMOS Current-Limit Threshold 0.75 0.9 1.05 A
nMOS Zero-Crossing Threshold 50 mA
Soft-Start Ramp Time 1.5 ms
Maximum Output Current IOUT2 VOUT2 + 0.5V ≤ VPV2 ≤ 5.5V 600 mA
LX2 Leakage Current VPV2 = 6V, LX2 = PGND2 or VPV2;
TA = -40°C to +85°C ±1 µA
Duty-Cycle Range Forced-PWM mode only, minimum duty
cycle in skip mode is 0% (Note 4) 15 100 %
OUTS2 Discharge Resistance VEN = 0V 70 Ω
OUT3—LDO REGULATOR
Input Voltage VPV3 1.7 5.5 V
Voltage Accuracy VOUT3 VOUT3 + 0.4V ≤ VPV3 ≤ 5.5V, ILOAD = 1mA -2 +2 %
Load Regulation ILOAD = 0 to 300mA -0.2 %
Dropout Voltage VPV3 = 1.8V, ILOAD = 250mA (Note 4) 130 320 mV
Current Limit 450 mA
Power-Supply Rejection Ratio IOUT3 = 30mA, f = 1kHz 57 dB
Shutdown Output Resistance EN = low 1
OUT4—LDO REGULATOR
Input Voltage VPV4 1.7 5.5 V
Voltage Accuracy VOUT4 (VOUT4 + 0.4V) ≤ VPV4 ≤ 5.5V, ILOAD = 1mA -2 +2 %
Load Regulation ILOAD = 0 to 300mA -0.2 %
Dropout Voltage VPV4 = 1.8V, ILOAD = 250mA (Note 4) 130 320 mV
Current Limit 450 mA
MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
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Electrical Characteristics (continued)
(VPV1 = 13.5V, VPV2 = VPV3 = VOUT1, VPV4 = VOUT2; TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA
= +25°C under normal conditions, unless otherwise noted.) (Note 2)
Note 2: All units are 100% production tested at TA = +25°C. All temperature limits are guaranteed by design.
Note 3: Once PVI exceeds undervoltage-lockout rising threshold 4.0V and the device is in regulation.
Note 4: Guaranteed by design; not product tested.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Power-Supply Rejection Ratio IOUT4 = 30mA, f = 1kHz 57 dB
Shutdown Output Resistance EN = low 1
THERMAL OVERLOAD
Thermal-Shutdown Temperature (Note 4) 150 175 °C
Thermal-Shutdown Hysteresis 15 °C
RESET
OUT1 OV Threshold 110 %
OUT1 Reset Threshold Reset option 1 (see the Selector Guide) 85 90 95 %
Reset option 2 (see the Selector Guide) 75 80 85
OUT2 Reset Threshold Percentage of nominal output 85 90 95 %
Reset Timeout Period
Reset timeout option 1 (see the Selector
Guide)14.9
ms
Reset timeout option 2 (see the Selector
Guide)1.9
Output-High Leakage Current 1 µA
Output Low Level Sinking -3mA 0.4 V
UV Propagation Time 28 µs
EN LOGIC INPUT
EN Threshold Voltage EN rising 1.4 1.8 2.2 V
EN Threshold Hysteresis 0.4 V
Input Current VEN = 5V 0.5 µA
PWM LOGIC INPUT
Input High Level PWM rising 1.8 V
Input Low Level PWM falling 0.4 V
Logic-Input Current 0 ≤ VPWM ≤ 5.5V 1 µA
MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
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Electrical Characteristics (continued)
(VPV1 = 13.5V, VPV2 = VPV3 = VOUT1, VPV4 = VOUT2; TA = +25°C, unless otherwise specied.)
OUT1 EFFICIENCY vs. LOAD CURRENT
MAX16922 toc02
LOAD CURRENT (A)
EFFICIENCY (%)
1.11.00.8 0.90.3 0.4 0.5 0.6 0.70.2
10
20
30
40
50
60
70
80
90
100
TA = +125°C
PV1 = 13.5V
TA = +25°C
TA = -40°C
0
0.1 1.2
OUT2 EFFICIENCY vs. LOAD CURRENT
MAX16922 toc03
LOAD CURRENT (A)
EFFICIENCY (%)
0.50.40.30.2
60
70
80
90
100
50
0.1 0.6
PV2 = 5V
OUT2 = 2.7V
TA = +125°C TA = +25°C
SUPPLY CURRENT vs. TEMPERATURE
MAX16922 toc04
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
11095-25 -10 5 35 50 6520 80
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
1.0
-40 125
NO LOAD
PWM = GND
NORMALIZED OUT1 VOLTAGE
vs. LOAD CURRENT
MAX16922 toc05
IPV1 (A)
NORMALIZED OUT1 VOLTAGE (%)
1.11.00.1 0.2 0.3 0.5 0.6 0.7 0.80.4 0.9
-1.5
-1.0
-0.5
0
0.5
1.0
1.5
2.0
-2.0
0 1.2
OUT1 VOLTAGE vs. VPV1
MAX16922 toc06
VPV1 (V)
OUT1 VOLTAGE (V)
15129
4.85
4.90
4.95
5.00
5.05
5.10
5.15
5.20
4.80
6 18
IOUT1 = 1A
MAX16922 toc07
POWER-UP ENABLE TURNING ON
EN
10V/div
OUT1
5V/div
OUT3
2V/div
OUT2
2V/div
OUT4
1V/div
1ms/div
OUT1 EFFICIENCY vs. LOAD CURRENT
MAX16922 toc01
LOAD CURRENT (A)
EFFICIENCY (%)
1.11.00.8 0.90.3 0.4 0.5 0.6 0.70.2
10
20
30
40
50
60
70
80
90
100
PV1 = 18V
PV1 = 13.5V
PV1 = 8V
0
0.1 1.2
POWER-UP/DOWN AT
THERMAL SHUTDOWN
RESET
5V/div
OUT1
5V/div
OUT2
2V/div
OUT3
2V/div
OUT4
1V/div
2ms/div
MAX16922 toc08
Maxim Integrated
5
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MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
Typical Operating Characteristics
(VPV1 = 13.5V, VPV2 = VPV3 = VOUT1, VPV4 = VOUT2; TA = +25°C, unless otherwise specied.)
SWITCHING FREQUENCY
vs. LOAD CURRENT
MAX16922 toc09
LOAD CURRENT (mA)
SWITCHING FREQUENCY (MHz)
1000800600400200
0.4
0.8
1.2
1.6
2.0
0
0 1200
DROPOUT VOLTAGE
vs. LOAD CURRENT
MAX16922 toc10
LOAD CURRENT (A)
DROPOUT VOLTAGE (V)
1.11.00.8 0.90.2 0.3 0.4 0.5 0.6 0.70.1
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
0
0 1.2
OUT2
OUT1
OUT3
OUT1 DROPOUT VOLTAGE
vs. TEMPERATURE
MAX16922 toc11
TEMPERATURE (°C)
DROPOUT VOLTAGE (V)
1109580655035205-10-25
0.8
0.9
1.0
1.1
1.2
1.3
1.4
0.7
-40 125
IOUT1 = 1.2A
OUT2 DROPOUT VOLTAGE
vs. TEMPERATURE
MAX16922 toc12
TEMPERATURE (°C)
DROPOUT VOLTAGE (V)
110 1259580655035205-10-25
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0
-40
IOUT2 = 600mA
OUT1 LOAD TRANSITION
IOUT1
500mA/div
VOUT1
AC-COUPLED
50mV/div
20ms/div
MAX16922 toc13
OUT2 LOAD TRANSIENT
IOUT2
200mA/div
VOUT2
AC-COUPLED
20mV/div
20ms/div
MAX16922 toc14
OUT1 LINE TRANSIENT
4ms/div
MAX16922 toc15
PV1
5V/div
OUT1
AC-COUPLED
20mV/div
Maxim Integrated
6
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MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
Typical Operating Characteristics (continued)
(VPV1 = 13.5V, VPV2 = VPV3 = VOUT1, VPV4 = VOUT2; TA = +25°C, unless otherwise specied.)
SWITCHING FREQUENCY
vs. TEMPERATURE
MAX16922 toc16
TEMPERATURE (°C)
SWITCHING FREQUENCY (MHz)
1109565 80-10 5 20 35 50-25
2.12
2.14
2.16
2.18
2.20
2.22
2.24
2.26
2.28
2.30 PWM = OUT1
2.10
-40 125
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
MAX16922 toc17
FREQUENCY (Hz)
PSRR (dB)
10k1k100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
-100
10 100k
OUT3
OUT4
LOAD CURRENT = 100mA
100mVP-P RIPPLE
OUT3 OUTPUT-NOISE DENSITY
vs. FREQUENCY
MAX16922 toc18
FREQUENCY (Hz)
OUTPUT-NOISE DENSITY (nV/ Hz)
10k1k100
400
800
1200
1600
2000
2400
2800
3200
3600
4000
0
10 100k
RL = 100Ω
OUT4 OUTPUT-NOISE DENSITY
vs. FREQUENCY
MAX16922 toc19
FREQUENCY (Hz)
OUTPUT-NOISE DENSITY (nV/ Hz)
10k1k100
200
400
600
800
1000
1200
1400
1600
1800
2000
0
10 100k
RL = 100Ω
Maxim Integrated
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MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
Typical Operating Characteristics (continued)
EN
PWM
EN
RESET
GND1
OUT3
PV4
OUT4
EN
PV3
EP
EN
PGND2
LX2
LX1
PV2
PV1
OUTS2
OUTS1
BST
LSUP
PWM
GND2
STEP-DOWN
PWM
OUT2
1.0V TO 3.9V
600mA
STEP-DOWN
PWM
OUT1
3.0V TO 5.5V
1.2A
LINEAR
REGULATOR
POR
GENERATION
LDO REG 1: 300mA
1.0V TO 4.15V
1.0V TO 4.15V
MODE
SELECT
10µF
2.2µH
4.7µH
4.7µF
4.7µF
1µF
VOUT2
10µF
VOUT1
VPV1
VOUT1
20k
100k
4.7µF
4.7µF
4.7µF
4.7µF
EN
LDO REG 2: 300mA
VOUT1
VOUT2
VOUT4
MAX16922
MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
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Functional Diagram
PIN NAME FUNCTION
TQFN TSSOP
1 3 BST Bootstrap Capacitor Input. Connect a 0.1µF ceramic capacitor from BST to LX1.
2 4 PV1 OUT1 Supply Input. Connect a 4.7µF or larger ceramic capacitor from PV1 to PGND.
3 5 LX1
Inductor Connection for OUT1. Connect a 4.7µH inductor between LX1 and OUTS1, and a
Schottky diode between LX1 (cathode) and the power-ground plane (anode) as shown in the
Functional Diagram.
4 6 GND3 Ground. Connect GND, GND1, GND2, and GND3 together.
5 7 OUTS1
OUT1 Voltage-Sensing Input. Connect OUTS1 directly to the OUT1 output voltage and
bypass to power-ground plane with a minimum total capacitance of 15µF. The total
capacitance can include input bypass capacitors cascaded from OUT1, discharged by a
70Ω resistance between OUTS1 and GND3 when disabled.
6 8 PWM
PWM Control Input. Connect PWM to OUTS1 to force LX2 to switch every cycle. Connect
PWM to high for forced-PWM operation on OUT2. Connect low for auto-PWM operation to
improve efciency at light loads.
7 9 GND Ground. Connect GND, GND1, GND2, and GND3 together.
MAX16922
EP
EP
11
12
13
14
15
5
4
3
2
1
PV2
PV3
OUT3
GND2
OUT4
OUTS1
GND3
LX1
PV1
BST
6
7
8
9
10
20 +
19
18
17
16
EN
GND1
RESET
LSUP
PV4
PWM
GND
OUTS2
PGND2
LX2
TQFN
TOP VIEW
MAX16922 16
17
18
19
20
5
4
3
2
1+
GND2
OUT4
PV4
LSUP
LX1
PV1
BST
EN
GND1
11
12
13
14
15
10
9
8
7
6
PGND2
LX2
PV2
PV3
OUT3
OUTS2
GND
PWM
OUTS1
GND3
TSSOP
RESET
TOP VIEW
MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
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Pin Description
Pin Congurations
PIN NAME FUNCTION
TQFN TSSOP
8 10 OUTS2
OUT2 Voltage Sense Input. Connect OUTS2 directly to the OUT2 output voltage and bypass
to PGND2 with a minimum total capacitance of 10µF. The total capacitance can include input
bypass capacitors cascaded from OUT2, discharged by a 70Ω resistance between OUTS2
and PGND2 when disabled.
911 PGND2 Power Ground for BUCK 2. Connect PGND2 and GND_ together near the device.
10 12 LX2 Inductor Connection for OUT2. Connect a 2.2µH inductor between LX2 and OUT2 as shown
in the Functional Diagram.
11 13 PV2 OUT2 Supply Input. Connect a 4.7µF or larger ceramic capacitor from PV2 to ground.
12 14 PV3 Linear-Regulator Power Input for OUT3. Bypass PV3 to GND with a minimum 2.2µF ceramic
capacitor.
13 15 OUT3 Linear-Regulator 1 Output. Bypass OUT3 to GND with a minimum 2.2µF ceramic capacitor
internally discharged by a 1kΩ resistance when disabled.
14 16 GND2 Ground. Connect GND, GND1, GND2, and GND3 together.
15 17 OUT4 Linear-Regulator 2 Output. Bypass OUT4 to GND with a minimum 2.2µF ceramic capacitor.
Internally discharged by a 1kΩ resistance when disabled.
16 18 PV4 Linear-Regulator Power Input for OUT4. Bypass PV4 to GND with a minimum 2.2µF ceramic
capacitor.
17 19 LSUP 5V Logic Supply to Provide Power to Internal Circuitry. Bypass LSUP to GND1 with a 1µF
ceramic capacitor.
18 20 RESET Open-Drain Reset Output for the Input Monitoring OUT1 and OUT2. External pullup
required.
19 1 GND1 Ground. Connect GND, GND1, GND2, and GND3 together.
20 2 EN Active-High Enable Input. Connect EN to PV1 or a logic-high voltage to turn on all
regulators. Pull EN input low to place the regulators in shutdown.
EP
Exposed Pad. Connect the exposed pad to ground. Connecting the exposed pad to ground
does not remove the requirement for proper ground connections to PGND2 and GND_. The
exposed pad is attached with epoxy to the substrate of the die, making it an excellent path to
remove heat from the device.
MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
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Pin Description (continued)
Detailed Description
The MAX16922 PMIC is designed for medium power
level automotive applications requiring multiple supplies
in a small footprint. As shown in the Typical Applications
Circuit, the MAX16922 integrates one high-voltage power
supply and three low-voltage cascaded power supplies.
OUT1 and OUT2 are step-down DC-DC converters,
and OUT3 and OUT4 are linear regulators. The device
also includes a reset output (RESET) and a high-voltage
compatible enable input (EN). The operating input voltage
range is from 3.5V to 28V and tolerant of transient volt-
ages up to 45V.
OUT1 Step-Down DC-DC Regulator
Step-Down Regulator Architecture
OUT1 is a high-input voltage, high-efficiency 2.2MHz
PWM current-mode step-down DC-DC converter that
delivers up to 1.2A. OUT1 has an internal high-side
n-channel switch and uses a low forward-drop free-
wheeling diode for rectification. Under normal operating
conditions, OUT1 is fixed frequency to prevent unwanted
AM radio interference. However, under light loads and
high-input voltage, the step-down regulator skips cycles to
maintain regulation. The output voltage is factory select-
able from 3.0V to 5.5V in 50mV increments.
Soft-Start
When initially powered up or enabled with EN, the OUT1
step-down regulator soft-starts by gradually ramping up
the output voltage for approximately 2.2ms. This reduces
inrush current during startup. During soft-start the full
output current is available. Before a soft-start sequence
begins, the outputs of both DC-DC regulators discharge
below 1.25V through an internal resistor. See the start-
up waveforms in the Typical Operating Characteristics
section.
Current Limit
The MAX16922 limits the peak inductor current sourced
by the n-channel MOSFET. When the peak current limit is
reached, the internal n-channel MOSFET turns off for the
remainder of the cycle. If the current limit is exceeded for
16 consecutive cycles and the output voltage is less than
1.25V, the n-channel MOSFET is turned off for 256 clock
cycles to allow the inductor current to discharge and then
initiate a soft-start sequence for all four outputs.
Dropout
The high-voltage, step-down converter (OUT1) of the
MAX16922 is designed to operate near 100% duty cycle.
When the input voltage is close to the output voltage, the
device tries to maintain the high-side switch on with 100%
duty cycle. However, to maintain proper gate charge, the
high-side switch must be turned off periodically so the
LX pin can go to ground and charge the BST capacitor.
As the input voltage approaches the output voltage, the
effective duty cycle of the n-channel MOSFET approaches
94%. Every 4th cycle is limited to a maximum duty cycle
of 75% (recharge period is approximately 112ns), while
the remaining cycles can go to 100% duty cycle. As a
result, when the MAX16922 is in dropout, the switching
frequency is reduced by a factor of 4.
During dropout conditions under light load, the load
current may not be sufficient to enable the LX pin to reach
ground during the recharge period. To ensure the LX pin
is pulled to ground and proper BST capacitor recharge
occurs, an internal load is applied to OUTS1 when PV1
falls below approximately 6.5V. This load is approxi-
mately 70Ω and is connected between OUTS1 and GND3
through an internal switch.
OUT2 Step-Down DC-DC Regulator
Step-Down Regulator Architecture
OUT2 is a low-input voltage, high-efficiency 2.2MHz PWM
current-mode step-down DC-DC converter that outputs
up to 600mA. OUT2 has an internal high-side p-channel
switch, and low-side n-channel switch for synchronous
rectification. The DC-DC regulator supports auto-PWM
operation so that under light loads the device automatically
enters high-efficiency skip mode. The auto-PWM mode
can be disabled by connecting the PWM input to OUTS1.
The output voltage is factory selectable from 1.0V to 3.9V
in 50mV increments.
Soft-Start
OUT2 enters soft-start when OUT1 finishes its soft-start
sequence to prevent high startup current from exceed-
ing the maximum capability of OUT1. The step-down
regulator executes a soft-start by gradually ramping up
the output voltage for approximately 1.5ms. This reduces
inrush current during startup. During soft-start, the full
output current is available. The soft-start sequence on
OUT2 begins after the soft-start sequence is completed
on OUT1. See the startup waveforms in the Typical
Operating Characteristics section.
MAX16922 2.2MHz, Dual, Step-Down DC-DC
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Current Limit
The MAX16922 limits the peak inductor current sourced
by the p-channel MOSFET. When the peak current limit is
reached, the internal p-channel MOSFET turns off for the
remainder of the cycle. If the current limit is exceeded for
16 consecutive cycles, and the output voltage is less than
1.25V, the p-channel MOSFET is turned off and enters
output discharge mode for 256 clock cycles, allowing the
inductor current and output voltage to discharge. Once
completed, a soft-start sequence is initiated on OUT2.
Dropout
As the input voltage approaches the output voltage, the
duty cycle of the p-channel MOSFET reaches 100%. In
this state, the p-channel MOSFET is turned on constantly
(not switching), and the dropout voltage is the voltage
drop due to the output current across the on-resistance of
the internal p-channel MOSFET (RPCH) and the inductor’s
DC resistance (RL):
VDO = ILOAD (RPCH + RL)
PWM
The MAX16922 operates in either auto-PWM or forced-
PWM modes. At light load, auto-PWM switches only
as needed to supply the load to improve light-load
efficiency of the step-down converter. At higher load
currents (~160mA), the step-down converter transitions to
fixed 2.2MHz switching frequency. Forced PWM always
operates with a constant 2.2MHz switching frequency
regardless of the load. Connect PWM high for forced-
PWM applications or low for auto-PWM applications.
LDO Linear Regulators
The MAX16922 contains two low-dropout linear regula-
tors (LDOs), OUT3 and OUT4. The LDO output voltages
are factory preset, and each LDO supplies loads up to
300mA. The LDOs include an internal reference, error
amplifier, p-channel pass transistor, and internal voltage-
dividers. Each error amplifier compares the reference
voltage to the output voltage (divided by the internal
voltage-divider) and amplifies the difference. If the divided
feedback voltage is lower than the reference voltage, the
pass-transistor gate is pulled lower, allowing more current
to pass to the outputs and increasing the output voltage.
If the divided feedback voltage is too high, the pass-
transistor gate is pulled up, allowing less current to pass
to the output. Each output voltage is factory selectable
from 1.0V to 4.15V in 50mV increments. If not using one
of the LDO outputs, then tie the associated input power
pin (PV_) to ground.
Input Supply and Undervoltage Lockout
An undervoltage-lockout circuit turns off the LDO
regulators when the input supply voltage is too low to
guarantee proper operation. When PV3 falls below 1.25V
(typ), OUT3 powers down. When PV4 falls below 1.5V
(typ), OUT4 powers down.
Soft-Start
OUT3 enters soft-start when PV3 exceeds 1.25V, and
OUT4 enters soft-start when PV4 exceeds 1.5V. This
staggers the surge current during startup to prevent
excess current draw from OUT1 or OUT2 that could
trigger an overcurrent shutdown. The soft-start time for
each LDO is 0.1ms (typ). See the startup waveforms in
the Typical Operating Characteristics section.
Current Limit
The OUT3 and OUT4 output current is limited to 450mA
(typ). If the output current exceeds the current limit, the
corresponding LDO output voltage drops out of regulation.
Excess power dissipation in the device can cause the
device to turn off due to thermal shutdown.
Dropout
The dropout voltage for the linear regulators is 320mV
(max) at 250mA load. To avoid dropout, make sure the
input supply voltage corresponding to OUT3 and OUT4
is greater than the corresponding output voltage plus the
dropout voltage based on the application output current
requirements.
LSUP Linear Regulator
LSUP is the output of a 5V linear regulator that powers
MAX16922 internal circuitry. LSUP is internally powered
from PV1 and automatically powers up when EN is high
and PV1 exceeds approximately 3.7V. LSUP automati-
cally powers down when EN is taken low. Bypass LSUP
to GND with a 1μF ceramic capacitor. LSUP remains on
even during a thermal fault.
Thermal-Overload Protection
Thermal-overload protection limits the total power
dissipation in the MAX16922. Thermal-protection
circuits monitor the die temperature. If the die tempera-
ture exceeds +175°C, the device shuts down, allowing it
to cool. Once the device has cooled by 15°C, the device
is enabled again. This results in a pulsed output during
continuous thermal-overload conditions. The thermal-
overload protection protects the MAX16922 in the event
of fault conditions. For continuous operation, do not
exceed the absolute maximum junction temperature of
+150°C. See the Thermal Considerationssection for more
information.
MAX16922 2.2MHz, Dual, Step-Down DC-DC
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Applications Information
Power-On Sequence
When the EN input is pulled high and PV1 is greater
than 3.7V (typ), the 5V LSUP linear regulator turns on.
Once LSUP exceeds 2.5V, the internal reference and
bias are enabled. When the internal bias has stabilized
OUT1, soft-start is initiated. After completion of soft-start
on OUT1 (2.8ms typ), OUT2 soft-start is initiated. OUT3
soft-start is enabled when PV3 is greater than or equal to
1.25V (typ), and OUT4 soft-start is enabled when PV4 is
greater than or equal to 1.5V (typ).
Care must be taken when driving the EN pin. Digital input
signals deliver a fast edge that is properly detected by the
MAX16922. If driving the EN pin with an analog voltage
that has a slew rate of less than 1V/ms or a voltage-
divider from PV1, then the input voltage on PV1 must
always be less than 6V when the voltage at EN is near the
turn-off threshold of 1.6V. If this cannot be guaranteed,
then a 1kΩ resistor or 5.6V zener diode must be placed
in parallel with the LSUP output capacitor to prevent
possible damage to the device.
Power-Down and Restart Sequence
The MAX16922 can be shut down by thermal shut-
down, enable low (EN), LSUP regulator undervoltage,
or when PV1 falls below 3.0V (typ). When a shutdown
occurs, all outputs discharge through an internal resistor
connected between each output and ground. When
enable is high, the die temperature is okay, the LSUP
linear regulator is greater than 2.5V (typ), and OUT1 is
less than 1.25V (typ); a complete soft-start power-on
sequence is reinitiated.
Inductor Selection
The OUT1 step-down converter operates with a 4.7μH
inductor and the OUT2 step-down converter operates
with a 2.2μH inductor. The inductor’s DC current
rating must be high enough to account for peak ripple
current and load transients. The step-down converter’s
architecture has minimal current overshoot during startup
and load transients. In most cases, an inductor capable of
1.3 times the maximum load current is acceptable.
For optimum performance choose an inductor with
DC-series resistance in the 50mΩ to 150mΩ range. For
higher efficiency at heavy loads (above 400mA) and
minimal load regulation, the inductor resistance should be
kept as small as possible. For light-load applications (up
to 200mA), higher resistance is acceptable with very little
impact on performance.
MAX16922
EP
PV1
EN
4.7µF220µF
0.1µF
1µF
0.1µF
10µF
PV3
PWM
4.7µF
VOUT1
OUT3
GND1
GND3
4.7µF
PV4 OUTS1
4.7µF
VOUT2
VOUT1
OUT4
GND2
20k
RESET
GND
4.7µF
LSUP
4.7µH
LX1 VOUT1
BST
PV2
10µF
PGND2
2.2µH
LX2 VOUT2
OUTS2
4.7µF
VBAT
MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
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Typical Applications Circuit
Capacitor Selection
Input Capacitors
The input capacitor, CIN1, reduces the current peaks
drawn from the supply and reduces switching noise in
the MAX16922. The impedance of CIN1 at the switching
frequency should be kept very low. Ceramic capacitors
with X5R or X7R dielectrics are recommended due to their
small size, low ESR, and small temperature coefficients.
Use a 4.7μF ceramic capacitor or an equivalent amount of
multiple capacitors in parallel between PV1 and ground.
Connect CIN1 as close to the device as possible to mini-
mize the impact of PCB trace inductance.
Connect a minimum 4.7μF ceramic capacitor between
PV2 to ground, and a 2.2μF ceramic capacitor between
PV3 to ground and PV4 to ground. Since PV2 is cascaded
from OUT1, the input capacitor connected to PV2 can be
used as part of the total output capacitance for OUT1.
Step-Down Output Capacitors
The step-down output capacitors are required to keep the
output-voltage ripple small and to ensure regulation loop
stability. These capacitors must have low impedance at
the switching frequency. Surface-mount ceramic capaci-
tors are recommended due to their small size and low
ESR. The capacitor should maintain its capacitance over-
temperature and DC bias. Ceramic capacitors with X5R or
X7R temperature characteristics generally perform well.
The output capacitance can be very low. Place a minimum
of 15μF ceramic capacitance from OUTS1 to ground and
a minimum of 10μF from OUTS2 to ground. When the
OUT2 output voltage selection is below 2.35V, the output
capacitance should be increased to prevent instability. For
optimum loadtransient performance and very low output
ripple, the output capacitance can be increased. The
maximum output capacitance should not exceed 3.8mF
for OUT1 and 2.0mF for OUT2.
LDO Output Capacitors and Stability
Connect a 4.7μF ceramic capacitor between OUT3 and
GND, and a second 4.7μF ceramic capacitor from OUT4
to GND. When the input voltage of an LDO is greater than
2.35V, the output capacitor can be decreased to 2.2μF.
The equivalent series resistance (ESR) of the LDO output
capacitors affects stability and output noise. Use output
capacitors with an ESR of 0.1Ω or less to ensure stable
operation and optimum transient response. Connect
these capacitors as close as possible to the device to
minimize PCB trace inductance.
Thermal Considerations
The maximum package power dissipation of the
MAX16922 in the 20-pin thin QFN package is 2500mW.
The power dissipated by the MAX16922 should not
exceed this rating. The total device power dissipation is
the sum of the power dissipation of the four regulators:
PD = PD1 + PD2 + PD3 + PD4
Estimate the OUT1 and OUT2 power dissipations as
follows:
D1 OUT1 OUT1
D2 OUT2 OUT2
1
PI V
1
PI V
−η
=××
η
−η
=××
η
where η is the efficiency (see the Typical Operating
Characteristics section).
Calculate the OUT3 and OUT4 power dissipations as
follows:
PD3 = IOUT3 x (VPV3 - VOUT3)
PD4 = IOUT4 x (VPV4 - VOUT4)
The maximum junction temperature of the MAX16922 is
+150°C. The junction-to-case thermal resistance JC) of
the MAX16922 is 2.7°C/W.
When mounted on a single-layer PCB, the junction
to ambient thermal resistance JA) is approximately
48°C/W. Mounted on a multilayer PCB, θJA is approxi-
mately 32°C/W. Calculate the junction temperature of the
MAX16922 as follows:
TJ = TA x PD x θJA
where TA is the maximum ambient temperature. Make
sure the calculated value of TJ does not exceed the
+150°C maximum.
MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
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PCB Layout
High-switching frequencies and relatively large peak
currents make PCB layout a very important aspect of
design. Good design minimizes excessive EMI on the
feedback paths and voltage gradients in the ground
plane, both of which can result in instability or regulation
errors. Connect the input capacitors as close as possible
to the PV_ and ground. Connect the inductor and output
capacitors as close as possible to the device and keep
the traces short, direct, and wide to minimize the current
loop area.
The OUTS_ feedback connections are sensitive to
inductor magnetic field interference so route these traces
away from the inductors and noisy traces such as LX_.
Connect GND_ and PGND2 to the ground plane. Connect
the exposed paddle to the ground plane with multiple vias
to help conduct heat away from the device.
Refer to the MAX16922 evaluation kit for a PCB layout
example.
MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
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15
*Other standard versions may be available. Contact factory for availability.
**Future product—contact factory for availability.
PART
NUMBER
SUFFIX*
OUT1
VOLTAGE
(V)
OUT2
VOLTAGE
(V)
OUT3
VOLTAGE
(V)
OUT4
VOLTAGE
(V)
OUT1 RESET
THRESHOLD
(%)
RESET
TIMEOUT
(ms)
BST
REFRESH
LOAD
ENABLE
A 5.00 2.70 3.30 1.00 90 14.9 On
B 5.00 1.20 1.80 3.30 90 14.9 On
C 5.00 3.30 1.20 3.00 90 14.9 On
D 3.6 1.20 3.30 3.30 90 14.9 Off
E 5.00 3.30 2.50 1.80 90 14.9 On
F 5.00 1.20 3.15 3.00 90 14.9 On
G 3.30 Off 2.80 1.80 90 14.9 On
H 3.30 1.20 2.50 1.80 90 14.9 Off
I 3.30 1.20 2.85 1.80 90 14.9 Off
J 3.80 3.30 2.50 1.20 90 14.9 Off
K 3.30 2.20 1.60 1.80 90 14.9 On
L 5.00 3.30 1.80 1.25 90 14.9 On
M** 3.30 1.50 2.80 1.8 90 14.9 On
N** 3.30 1.10 2.50 1.80 90 14.9 Off
O** 3.30 1.20 1.80 2.70 90 14.9 On
LEAD FREE
AEC Q100 QUALIFIED
OUTPUT VOLTAGES RESET THRESHOLD, RESET TIMEOUT
-40°C TO +125°C OPERATION, TQFN, 20 PINS
MAX16922 ATP x /V +
LEAD FREE
AEC Q100 QUALIFIED
OUTPUT VOLTAGES RESET THRESHOLD, RESET TIMEOUT
-40°C TO +125°C OPERATION, TSSOP, 20 PINS
MAX16922 AUP x /V +
MAX16922 2.2MHz, Dual, Step-Down DC-DC
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Selector Guide
*Insert the desired suffix letters (from the Selector Guide) into
the blank “_” to complete the part number.
+Denotes a lead(Pb)-free/RoHS-compliant package.
/V denotes an automotive qualified part.
**EP = Exposed pad.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
20 TQFN-EP T2055+4 21-0140 90-0009
20 TSSOP-EP U20E+1 21-0108 90-0114
PART TEMP RANGE PIN-PACKAGE
MAX16922ATP_/V+* -40°C to +125°C 20 TQFN-EP**
MAX16922AUP_/V+* -40°C to +125°C 20 TSSOP-EP**
MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
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Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
Chip Information
PROCESS: BiCMOS
Ordering Information
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 10/09 Initial release
1 5/10 Updated Absolute Maximum Ratings, Electrical Characteristics, Typical Operating
Characteristics, Dropout, and Power-On Sequence sections
1, 2, 4, 6, 11,
13
2 10/10 Added a new voltage trim option (I) to the Selector Guide 15
311/10 Added a new voltage trim option (J) to the Selector Guide 15
4 4/11 Added a new voltage trim option (K) to the Selector Guide 15
5 1/12 Updated the Functional Diagram to eliminate the PWM signal on OUT1 and changed
PV2 polarized capacitor to an unpolarized capacitor 8
66/13 Added a new variant to the Selector Guide 15
77/14 Updated Package Thermal Characteristics section for TQFN package 2
86/15 Added a new variant (M) to Selector Guide 15
911/15 Added a new variant (N) to Selector Guide 15
10 2/16 Moved Ordering Information to end of data sheet and added a new variant ()) to
Selector Guide 1, 15
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2016 Maxim Integrated Products, Inc.
18
MAX16922 2.2MHz, Dual, Step-Down DC-DC
Converters, Dual LDOs, and RESET
Revision History
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MAX16922ATPF/V+ MAX16922ATPG/V+ MAX16922ATPH/V+ MAX16922AUPA/V+ MAX16922AUPB/V+
MAX16922AUPC/V+ MAX16922AUPD/V+ MAX16922AUPE/V+ MAX16922AUPF/V+ MAX16922AUPG/V+
MAX16922AUPH/V+ MAX16922ATPJ/V+ MAX16922ATPJ/V+T MAX16922ATPK/V+ MAX16922ATPK/V+T
MAX16922ATPL/V+ MAX16922ATPL/V+T MAX16922ATPI/V+ MAX16922ATPI/V+T MAX16922ATPA/V+T
MAX16922ATPB/V+T MAX16922ATPC/V+T MAX16922ATPD/V+T MAX16922ATPE/V+T MAX16922ATPF/V+T
MAX16922ATPG/V+T MAX16922ATPH/V+T MAX16922AUPA/V+T MAX16922AUPB/V+T MAX16922AUPC/V+T
MAX16922AUPD/V+T MAX16922AUPE/V+T MAX16922AUPF/V+T MAX16922AUPG/V+T MAX16922AUPH/V+T