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©1988
DATA SHEET
MOS INTEGRATED CIRCUIT
µ
PD6323
LATCH and DRIVER for FIP COMOS LSI
DESCRIPTION
The
µ
PD6323 is a latch and driver CMOS IC for FIP (Fluorescent Indicator Panel). For multiplex wiring, the
µ
PD6323 is supplied with the serial interface circuit, 21 bit shift register, 21 bit data latch and 21 outputs. The serial
data transfer from the data source to the
µ
PD6323 is accomplished with 3 signals.
FEATURES
• Direct Connection to Battery enable.
• Wide Supply Voltage VDD = 8.0 to 14 (V)
• Serial Input 21 bit Shift Register Incorporated.
• Data Control by Transmission Clock (External) and Latch.
• Suitable for Static Display by Buffer Register.
• Brightness Control Enable: External Duty Control.
• Output Characteristics Vout = 40 V,
Iout = 5.0 mA.
• Serial Interface Format: Compatible with NEC microcomputer.
• Difference of
µ
PD6323C/BC
PARAMETER SYMBOL
µ
PD6323C
µ
PD6323BC
Output Voltage VO0 to VO20 –25 V –40 V
Low Supply Voltage VDD (L) —4 V
Note
Notes 1. Function Operate
ORDERING INFORMATION
PART NUMBER PACKAGE
µ
PD6323C 28 pin Plastic DIP (400 mil)
µ
PD6323BC 28 pin Plastic DIP (400 mil)
Document No. S11046EJ3V0DS00 (3rd edition)
(Previous No. IC-2289)
Date Published December 1995 P
Printed in Japan
µ
PD6323
2
BLOCK DIAGRAM
O
0
BI
O
20
LH P
0
P
1
P
2
P
20
P
19
P
18
21 BIT BUFFER REGISTER
SI S
0
S
1
S
2
S
20
S
19
S
18
21 BIT SHIFT REGISTER
21 BIT FIP DRIVER
SO
F/F
SCK
PIN CONNECTION (Top View)
1SCK 2BI 3O
0
4O
1
5O
2
6O
3
7O
4
8O
5
9O
6
10
O
7
11
O
8
12
O
9
13
O
10
14
V
SS
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
DD
LH
SI
O
11
O
12
O
13
O
14
O
15
O
16
O
17
O
18
O
19
O
20
SO
µ
PD6323
3
FUNCTION
PIN No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
*To prevent latch up breakdown, the power should be turned ON in order VDD, logic input. It should be turned
OFF in opposite order. This relationship should be followed during transition period as well.
SYMBOL
SCK
BI
O0
O1
O2
O3
O4
O5
O6
O7
O8
O9
O10
VSS
SO
O20
O19
O18
O17
O16
O15
O14
O13
O12
O11
SI
LH
VDD
FUNCTION
Serial Clock Input
Blanking Input
Segment and Driver for
FIP
(O0 to O10)
GND
Serial Data Output
Segment and driver for
FIP
(O11 to O20)
Serial data Input
Latch and Hold Input
Supply Voltage at VDD
terminal
INPUT/OUTPUT
INPUT
INPUT
OUTPUT
OUTPUT
OUTPUT
INPUT
INPUT
V
SS
V
DD
O
0
to O
20
EXPLANATION
The SI data are read and stored in the 21 bit shift register
at the rising edge of SCK. DATA output from SO at the
dropping edge of SCK.
When “L” level signal is supplied to the B1, O0 to O20 are
active.
“H”: O0 to O20 are disabled.
Dimmer function is possible by external duty control.
Outputs are, Pch MOS Open Drain.
These 11 Outputs are the Outputs of 11 bit output data
latch, which can drive FIP directly.
Connection to GND.
Serial data output at the dropping edge of SCK.
In case “n” pieces of
µ
PD6323AC are serial connected, so
it is possible to connect one to next SI.
Outputs are, Pch MOS Open Drain.
These 10 outputs are the Outputs of 10 bit output data
latch, which can drive FIP directly.
Serial Data Input. The SI data are read and stored in the
21 bit shift register at the rising edge of SCK.
When “H” level signal is supplied to the LH, the data of 21
bit shift register are normally transferred to the 21 bit
output data latch. At the time of the rising edge of LH; the
data of 21 bit output data latch are held.
“L”: The data of 21 bit output data latch are protected.
VDD = 8.0 to 14 (V)
µ
PD6323
4
ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)
PARAMETER
Supply Voltage at VDD terminal
Input Voltage
Output Voltage (
µ
PD6323C)
Output Voltage (
µ
PD6323AC/BC)
Output Current
Operating Temperature
Storage Temperature
Notes 1. These Voltages are referenced to the VDD.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Operating Temperature
Operating Supply Voltage
Output Voltage (
µ
PD6323C)Note 2
Output Voltage (
µ
PD6323AC/BC)Note 2
Output Current
Input Voltage High
Input Voltage Low
SCK Frequency
SCK Cycle TimeNote 3
SCK High Level Pulse WidthNote 3
SCK Low Level Pulse WidthNote 3
SI Setup Time to SCK ↑ Note 3
SI Hold TimeNote 3
SCK → LH Valid TimeNote 4
LH High Level Pulse WidthNote 4
BI High Level Pulse WidthNote 5
Notes 2. These Voltages are referenced to the VDD.
3. See Fig. 1.
4. See Fig. 2.
5. See Fig. 3.
MIN.
–40
8.0
3.5
VSS
2.0
0.9
0.9
0.4
0.4
1.8
1.89
0.4
UNIT
V
V
V
V
mA
˚C
˚C
RATINGS
18
–0.3 to VDD
–25Note 1
–40Note 1
–5.0
–40 to +85
–55 to +125
SYMBOL
VDD
VIN
VO0 to VO20
VO0 to VO20
IO0 to IO20
TA
Tstg
SYMBOL
TA
VDD
VO0 to VO20
VO0 to VO20
IO0 to IO20
VIH
VIL
fSCK
tKCY
tKHW
tKLW
tSIK
tKSI
tCLL
tLHW
tBHW
TYP.
–19
–19
–2.0
UNIT
˚C
V
V
V
mA
V
V
KHz
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
µ
s
MAX.
+85
14
–24
–35
–5.0
VDD
1.0
500
µ
PD6323
5
ELECTRICAL CHARACTERISTICS (Recommended operating conditions)
PARAMETER
Input Leakage Current
SO Output Voltage High
SO Output Voltage Low
Output Voltage High
Output Leakage Current
Supply Current at VDD Terminal
Supply Voltage at VDD Terminal to
Keep DATA
Input Capacitance
SCK ↓→ SO Valid TimeNote 6
BI → Qn Valid TimeNote 5
Low Supply Voltage (
µ
PD6323BC)
Notes 6. See Fig. 4.
SYMBOL
IIL
VSOH
VSOL
VO
IOLL
IDD
VDD(H)
CIN
tKSO
tBKO
VDD(L)
MIN.
VDD – 1.0
VSS
VDD – 1.5
3.0
4.0
TYP. MAX.
±10
VDD
0.5
VDD
10
2.0
15
0.5
1.8
UNIT
µ
A
V
V
V
µ
A
mA
V
pF
µ
s
µ
s
V
TEST CONDITIONS
VIN = VSS or VIN = VDD
ISOH = –1.0 mA
ISOL = 1.0 mA
IO = –5.0 mA
O0 to O20 Output
VDD to VO = 40 V
O0 to O20 Output
All Input = [High]
All Output = Open
Drop VDD on latch
DATA (MIN.)
f = 1.0 MHz
Function Operate
µ
PD6323
6
SWITCHING CHARACTERISTICS
SCK
SI
t
KCY
t
KLW
t
KHW
V
IL MAX.
V
IH MIN.
t
SIK
t
KSI
Fig. 1
Fig. 2
SCK
LH
t
LHW
t
CLL
Fig. 3
BI
t
BHW
t
BKQ
t
BKQ
O
n
(n = 0 to 20)
Fig. 4
t
KSO
V
IL MAX.
V
IH MIN.
V
IL MAX.
SCK
SO
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
DD
V
SS
V
IH MIN.
V
IL MAX.
V
IH MIN.
V
IL MAX.
V
IH MIN.
V
OL MAX.
V
OH MIN.
µ
PD6323
7
TIMING CHART
SCK
SI
SO
O
0
to O
20
LH
0 1 20 21 n
0 n – 21
Latch
Through
t
KSO
t
LHW
t
CLL
t
SIK
t
KSI
t
KCY
µ
PD6323
8
APPLICATION CIRCUIT
(1) AUTOMOTIVE DASHBOARD SYSTEM
SYSTEM CONSTRUCTION
MICRO COMPUTER
A/D CONVERTER
FAILSAFE IC
REGULATOR
DC-DC CONVERTER
1
1
1
1
2 to 3
4PD6323
µ
H
C
Temperature
Fuel
F
E
SI
SO
O
19
O
10
O
9
O
0
SCK
BI
LH
O
20
( PD6323)
µ
SO
O
20
O
0
( PD6323)
µ
SI
SO
O
20
O
0
SCK
LH
SI
BI
SCK
LH
BI
( PD6323)
µ
Engine speed
× 1000
r.p.m.
filter
0
1
2
3
4
5
8
7
6
Speedmeter
km/h
Mile/h
O
0
-
O
4
O
5
-
O
11
O
12
-
O
18
O
19
-
O
20
SOSI
SCK LH BI
( PD6323)
µ
LH
2
LH
3
LH
1
BI
1
BI
2
BI
3
SCK
SO PD7500 series
µ
PD7001C
A/D
CONVERTER
µ
Engine speed
Speed
Temperature
Fuel
REGULATOR
FAIL SAFE
IC
87AD series
Each data of Engine speed, speed, temperature and fuel is divided to each group by LH control.
Each data is transferred by SI and SCK control.
FIP dimmer control is capable by BI’s duty control.
µ
PD6323
9
(2) 12 V FIP DRIVER CIRCUIT
R
G
R
F
GRID
F
I
P
S
E
G
U
M
E
N
T
V
DD
R
L
FILAMENT
SO
SI
( PD6323)
µ
V
SS
O
0
O
20
SCK
LH
BI
SI
R
BI
1 chip
CPU
REGULATER 5 V
8.0 to 14 V
C
BATTERY
VOLTAGE
SENSOR
(A/D CONVERTER)
(3) HIGH VOLTAGE (18 to 35 V) FIP DRIVER CIRCUIT
GRID
F
I
P
S
E
G
U
M
E
N
T
12 V
V
DD
FILAMENT
–6.0 to –23 V
( PD6323BC)
µ
O
0
O
20
V
DD
V
SS
–6.0 to –23 V
µ
PD6323
10
(4) LED DRIVER CIRCUIT
V
SS
V
DD
O
20
8.0 to 14 V
1SS53 2SA733
390 Ω4.3 kΩ
(Cathode common)LED
LED
( PD6323)
µ
V
SS
V
DD
O
20
8.0 to 14 V
2SC945
(Anode common)
51 kΩ
390 Ω
4.3 kΩ
( PD6323)
µ
µ
PD6323
11
(5) EXAMPLE OF SOFTWARE
Using of serial I/O of
µ
-COM 75 series
Subroutine of 24 bit data transfer
SI OUT: ANP 6, 7
LHLI 05H
LOOP : LAM HL–
TAMSIO
SIO
SKI 2
JCP $–2
DLS
JCP LOOP
ORP 6, 8
ANP 6, 7
RT
RAM TRANSFER BIT
(ADD) 3210
00H O3O2O1O0
01H O7O6O5O4
02H O11 O10 O9O8
03H O15 O14 O13 O12
04H O19 O18 O17 O16
05H O23 O22 O21 O20
Allot port
P63 - LH
START
LH = 0
HL ← 05H
A
CC
← (HL)
HL ← HL – 1
SIO
7 - 4
← A
CC
SIO
3 - 0
← (HL)
N
Y
START
SIO
INTS
RQF = 1
L ← L – 1
L = 0FH
N
Y
LH = 1
LH = 0
Loop
RETURN
µ
PD6323
12
PACKAGE DIMENSION
µ
PD6323C/BC
28PIN PLASTIC DIP (400 mil)
ITEM MILLIMETERS INCHES
NOTES
1) Each lead centerline is located within 0.25 mm (0.01 inch) of
its true position (T.P.) at maximum material condition.
N 0.25 0.01
P 0.9 MIN. 0.035 MIN.
A 35.56 MAX. 1.400 MAX.
B 1.27 MAX. 0.050 MAX.
F 1.1 MIN. 0.043 MIN.
G 3.5±0.3 0.138±0.012
J 5.72 MAX. 0.226 MAX.
K 10.16 (T.P.) 0.400 (T.P.)
C 2.54 (T.P.) 0.100 (T.P.)
D 0.50±0.10 0.020+0.004
–0.005
H 0.51 MIN. 0.020 MIN.
I 4.31 MAX. 0.170 MAX.
L 8.6 0.339
M 0.25 0.010+0.004
–0.003
+0.10
–0.05
M
R
M
I
H
G
F
DN
C
B
K
P28C-100-400-1
R 0~15°0~15°
2) ltem "K" to center of leads when formed parallel.
P
114
28 15
A
L
J
µ
PD6323
13
RECOMMENDED SOLDERING CONDITIONS
The following conditions (see table below) must be met when soldering this product. Please consult with our sales
offices in case other soldering process is used, or in case soldering is done under different conditions.
TYPES OF THROUGH HOLE MOUNT DEVICE
µ
PD6323C/BC
Soldering process Soldering conditions Symbol
Wave soldering Solder temperature: 260 ˚C or below,
Flow time: 10 seconds or below
Reference
“Quality Grades On NEC Semiconductor Devices” (IEI-1209)
“NEC Semiconductor Device Reliability/Quality Controls” (IEI-1206)
“Semiconductor Device Mounting Technology Manual” (IEI-1207)
µ
PD6323
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this
document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
from use of such device. No license, either express, implied or otherwise, is granted under any patents,
copyrights or other intellectual property rights of NEC Corporation or others.
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
NEC devices are classified into the following three quality grades:
“Standard“, “Special“, and “Specific“. The Specific quality grade applies only to devices developed based on
a customer designated “quality assurance program“ for a specific application. The recommended applications
of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each
device before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices in “Standard“ unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact NEC Sales Representative in advance.
Anti-radioactive design is not implemented in this product.
M4 94.11
The application circuits and their parameters are for references only and are not intended for use in actual design-in's.
[MEMO]
