CD74AC139E96 - Texas Instruments

Data sheet acquired from Harris Semiconductor

SCHS235A

Features

• Buffered Inputs

• Typical Propagation Delay

- 5.4ns at VCC = 5V, TA = 25oC, CL = 50pF

• Exceeds 2kV ESD Protection MIL-STD-883, Method

3015

• SCR-Latchup-Resistant CMOS Process and Circuit

Design

• Speed of Bipolar FAST™/AS/S with Signiﬁcantly

Reduced Power Consumption

• Balanced Propagation Delays

• AC Types Feature 1.5V to 5.5V Operation and

Balanced Noise Immunity at 30% of the Supply

•±24mA Output Drive Current

- Fanout to 15 FAST™ ICs

- Drives 50Ω Transmission Lines

Description

The ’AC139 and ’ACT139 are dual 2-to-4-line decod-

ers/demultiplexers that utilize Advanced CMOS Logic tech-

nology. These devices contain two independent binary to

one-of-four decoders, each with a single active LOW enable

input (1E or 2E). Data on the select inputs (1A0 and 1A1 or

2A0 and 2A1) cause one of the four normally HIGH outputs

to go LOW.

If the enable input is HIGH, all four outputs remain HIGH. For

demultiplexer operation, the enable input is the data input.

The enable input also functions as a chip select when these

devices are cascaded.

Pinout

CD54AC139, CD54ACT139

(CERDIP)

CD74AC139, CD74ACT139

(PDIP, SOIC)

TOP VIEW

Ordering Information

PART

NUMBER TEMP.

RANGE (oC) PACKAGE

CD54AC139F3A -55 to 125 16 Ld CERDIP

CD74AC139E 0 to 70oC, -40 to 85,

-55 to 125 16 Ld PDIP

CD74AC139M96 0 to 70oC, -40 to 85,

-55 to 125 16 Ld SOIC

CD54ACT139F3A -55 to 125 16 Ld CERDIP

CD74ACT139E 0 to 70oC, -40 to 85,

-55 to 125 16 Ld PDIP

CD74ACT139M 0 to 70oC, -40 to 85,

-55 to 125 16 Ld SOIC

NOTES:

1. When ordering, use the entire part number. Add the suffix 96 to

obtain the variant in the tape and reel.

2. Wafer and die for this part number is available which meets all elec-

trical specifications. Please contact your local TI sales office or cus-

tomer service for ordering information.

1A0

1A1

1Y0

1Y1

1Y2

GND

1Y3

2A0

2A1

2Y0

2Y1

2Y2

2Y3

September 1998 - Revised May 2000

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

FAST™ is a Trademark of Fairchild Semiconductor.

CD54/74AC139,

CD54/74ACT139

Dual 2-to-4-Line Decoder/Demultiplexer

[ /Title

(CD74

AC139

CD74

ACT13

/Sub-

ject

(Dual

2-to-4-

Line

Decod

er/Dem

ulti-

plexer)

/Autho

r ()

/Key-

words

(Har-

ris

Semi-

con-

ductor,

Advan

ced

CMOS

)

/Cre-

ator ()

/DOCI

NFO

Functional Diagram

TRUTH TABLE

INPUTS

OUTPUTSENABLE SELECT

EA1A0Y3 Y2 Y1 Y0

L LLHHHL

L LHHHLH

L HLHLHH

L HHLHHH

H XXHHHH

X = Don’t Care

1A1

1A0

GND = 8

VCC = 16

1Y2

71Y3

1Y1

51Y0

DECODER

2A1

2A0

2Y2

92Y3

2Y1

11 2Y0

DECODER

CD54/74AC139, CD54/74ACT139

Absolute Maximum Ratings Thermal Information

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V

DC Input Diode Current, IIK

For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA

DC Output Diode Current, IOK

For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC Output Source or Sink Current per Output Pin, IO

For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA

DC VCC or Ground Current, ICC or IGND (Note 3) . . . . . . . . .±100mA

Operating Conditions

Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC

Supply Voltage Range, VCC (Note 4)

AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V

ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V

DC Input or Output Voltage, VI, VO . . . . . . . . . . . . . . . . . 0V to VCC

Input Rise and Fall Slew Rate, dt/dv

AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)

AC Types, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)

ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)

Thermal Resistance (Typical, Note 5) θJA (oC/W)

PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90

SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160

Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150oC

Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC

Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation

of the device at these or any other conditions above those indicated in the operational sections of this speciﬁcation is not implied.

NOTES:

3. For up to 4 outputs per device, add ±25mA for each additional output.

4. Unless otherwise specified, all voltages are referenced to ground.

5. θJA is measured with the component mounted on an evaluation PC board in free air.

DC Electrical Speciﬁcations

PARAMETER SYMBOL

TEST

CONDITIONS VCC

(V)

25oC-40oC TO

85oC-55oC TO

125oC

UNITSVI(V) IO(mA) MIN MAX MIN MAX MIN MAX

AC TYPES

High Level Input Voltage VIH - - 1.5 1.2 - 1.2 - 1.2 - V

3 2.1 - 2.1 - 2.1 - V

5.5 3.85 - 3.85 - 3.85 - V

Low Level Input Voltage VIL - - 1.5 - 0.3 - 0.3 - 0.3 V

3 - 0.9 - 0.9 - 0.9 V

5.5 - 1.65 - 1.65 - 1.65 V

High Level Output Voltage VOH VIH or VIL -0.05 1.5 1.4 - 1.4 - 1.4 - V

-0.05 3 2.9 - 2.9 - 2.9 - V

-0.05 4.5 4.4 - 4.4 - 4.4 - V

-4 3 2.58 - 2.48 - 2.4 - V

-24 4.5 3.94 - 3.8 - 3.7 - V

-75

(Note 6, 7) 5.5 - - 3.85 - - - V

-50

(Note 6, 7) 5.5----3.85 - V

CD54/74AC139, CD54/74ACT139

Low Level Output Voltage VOL VIH or VIL 0.05 1.5 - 0.1 - 0.1 - 0.1 V

0.05 3 - 0.1 - 0.1 - 0.1 V

0.05 4.5 - 0.1 - 0.1 - 0.1 V

12 3 - 0.36 - 0.44 - 0.5 V

24 4.5 - 0.36 - 0.44 - 0.5 V

(Note 6, 7) 5.5 - - - 1.65 - - V

(Note 6, 7) 5.5-----1.65 V

Input Leakage Current IIVCC or

GND - 5.5 - ±0.1 - ±1-±1µA

Quiescent Supply Current

MSI ICC VCC or

GND 0 5.5 - 8 - 80 - 160 µA

ACT TYPES

High Level Input Voltage VIH - - 4.5 to

5.5 2-2-2-V

Low Level Input Voltage VIL - - 4.5 to

5.5 - 0.8 - 0.8 - 0.8 V

High Level Output Voltage VOH VIH or VIL -0.05 4.5 4.4 - 4.4 - 4.4 - V

-24 4.5 3.94 - 3.8 - 3.7 - V

-75

(Note 6, 7) 5.5 - - 3.85 - - - V

-50

(Note 6, 7) 5.5----3.85 - V

Low Level Output Voltage VOL VIH or VIL 0.05 4.5 - 0.1 - 0.1 - 0.1 V

24 4.5 - 0.36 - 0.44 - 0.5 V

(Note 6, 7) 5.5 - - - 1.65 - - V

(Note 6, 7) 5.5-----1.65 V

Input Leakage Current IIVCC or

GND - 5.5 - ±0.1 - ±1-±1µA

Quiescent Supply Current

MSI ICC VCC or

GND 0 5.5 - 8 - 80 - 160 µA

AdditionalSupply Currentper

Input Pin TTL Inputs High

1 Unit Load

∆ICC VCC

-2.1 - 4.5 to

5.5 - 2.4 - 2.8 - 3 mA

NOTES:

6. Test one output at a time for a 1-second maximum duration. Measurement is made by forcing current and measuring voltage to minimize

power dissipation.

7. Test verifies a minimum 50Ω transmission-line-drive capability at 85oC, 75Ω at 125oC.

ACT Input Load Table

INPUT UNIT LOAD

A0, A1 1

E 0.67

NOTE: Unit load is ∆ICC limit specified in DC Electrical Specifications

Table, e.g., 2.4mA max at 25oC.

DC Electrical Speciﬁcations (Continued)

PARAMETER SYMBOL

TEST

CONDITIONS VCC

(V)

25oC-40oC TO

85oC-55oC TO

125oC

UNITSVI(V) IO(mA) MIN MAX MIN MAX MIN MAX

CD54/74AC139, CD54/74ACT139

Switching Speciﬁcations Input tr, tf = 3ns, CL= 50pF (Worst Case)

PARAMETER SYMBOL VCC (V)

-40oC TO 85oC -55oC TO 125oC

UNITSMIN TYP MAX MIN TYP MAX

AC TYPES

Propagation Delay, A0, A1 to

Outputs tPLH, tPHL 1.5 - - 119 - - 131 ns

3.3

(Note 9) 3.9 - 13.4 3.7 - 14.7 ns

(Note 10) 2.8 - 9.5 2.6 - 10.5 ns

Propagation Delay,

E to Outputs tPLH, tPHL 1.5 - - 119 - - 131 ns

3.1 3.9 - 13.4 3.7 - 14.7 ns

5 2.8 - 9.5 2.6 - 10.5 ns

Input Capacitance CI- - -10- -10pF

Power Dissipation Capacitance CPD

(Note 11) - - 83 - - 83 - pF

ACT TYPES

Propagation Delay, A0, A1 to

Outputs tPLH, tPHL 5

(Note 10) 3.1 - 10.5 2.9 - 11.5 ns

Propagation Delay,

E to Outputs tPLH, tPHL 5 3.2 - 10.9 3 - 12 ns

Input Capacitance CI- - -10- -10pF

Power Dissipation Capacitance CPD

(Note 11) - - 83 - - 83 - pF

NOTES:

8. Limits tested at 100%.

9. 3.3V Min at 3.6V, Max at 3V.

10. 5V Min at 5.5V, Max at 4.5V.

11. CPD is used to determine the dynamic power consumption per decoder/demultiplexer.

AC: PD = VCC2 fi(CPD + CL)

ACT: PD = VCC2 fi(CPD + CL) + VCC ∆ICC where fi = input frequency, CL = output load capacitance, VCC = supply voltage.

FIGURE 1. FIGURE 2.

tr = 3ns

90%

tf = 3ns

10%

tPHL

INPUT E

tPLH

INPUT Y3

INPUT

GND

LEVEL

INPUT

LEVEL

GND

OUTPUT Y3

3ns3ns

90%

10%

tPHL tPLH

CD54/74AC139, CD54/74ACT139

DUT

OUTPUT

RL (NOTE)

OUTPUT

LOAD

500Ω

50pF

NOTE: For AC Series Only: When VCC = 1.5V, RL = 1kΩ.

FIGURE 3. PROPAGATION DELAY TIMES

AC ACT

Input Level VCC 3V

Input Switching Voltage, VS0.5 VCC 1.5V

Output Switching Voltage, VS0.5 VCC 0.5 VCC

CD54/74AC139, CD54/74ACT139

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