INDUSTRIAL TEMPERATURE RANGE
IDT74LVC138A
3.3V CMOS 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
1AUGUST 1999INDUSTRIAL TEMPERATURE RANGE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
©1999 Integrated Device Technology, Inc. DSC-4722/1
FEATURES:
• 0.5 MICRON CMOS Technology
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
•VCC = 3.3V ± 0.3V, Normal Range
•VCC = 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µµ
µµ
µ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• All inputs, outputs, and I/Os are 5V tolerant
• Supports hot insertion
• Available in QSOP, SOIC, SSOP, and TSSOP packages
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Reduced system switching noise
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
IDT74LVC138A
DESCRIPTION:
The LVC138A 3-line to 8-line decoder/demultiplexer is built using
advanced dual metal CMOS technology. This device is designed for high-
performance memory-decoding or data-routing applications requiring very
short propagation delay times. In high performance memory systems, this
decoder minimizes the effects of system decoding. When employed with
high-speed memories utilizing a fast enable circuit, the delay times of these
decoders and the enable time of the memory are usually less than the typical
access time of the memory. This means that the effective system delay
introduced by the decoder is negligible.
The conditions at the binary-select inputs and the three enable inputs
select one of eight output lines. Two active-low enable inputs and one active-
high enable input reduce the need for external gates or inverters when
expanding. A 24-line decoder can be implemented without external invert-
ers and a 32-line decoder requires only one inverter. An enable input can
be used as a data input for demultiplexing applications.
Inputs can be driven from either 3.3V or 5V devices. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
The LVC138A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
3.3V CMOS
3-LINE TO 8-LINE
DECODER/DEMULTIPLEXER
WITH 5 VOLT TOLERANT I/O
Y0
15
G1
Y1
14
Y2
13
Y3
12
A1
2
3
B
Select
Inputs
Data
Outputs
Enable
Inputs G2A
G2B
6
4
5
C
Y4
11
Y5
10
Y6
9
Y7
7
INDUSTRIAL TEMPERATURE RANGE
2
IDT74LVC138A
3.3V CMOS 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
NOTE:
1. As applicable to the device type.
Symbol Parameter(1) Conditions Typ. Max. Unit
CIN Input Capacitance VIN = 0V 4.5 6 pF
COUT Output Capacitance VOUT = 0V 5.5 8 pF
CI/O I/O Port Capacitance VIN = 0V 6.5 8 pF
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Symbol Description Max Unit
VTERM Terminal Voltage with Respect to GND –0.5 to +6.5 V
TSTG Storage Temperature –65 to +150 °C
IOUT DC Output Current –50 to +50 mA
IIK Continuous Clamp Current, –50 mA
IOK VI < 0 or VO < 0
ICC Continuous Current through each ±10 0 mA
ISS VCC or GND
ABSOLUTE MAXIMUM RATINGS(1)
NOTE:
1 . Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
PIN CONFIGURATION
QSOP/ SOIC/ SSOP/ TSSOP
TOP VIEW
Enable Inputs Select Inputs Outputs
G1 G2A G2B C B A Y0Y1Y2Y3Y4Y5Y6Y7
XH XX XX HHHHHHHH
XX HX XX HHHHHHHH
LX XX XX HHHHHHHH
HL L L L L LHHHHHHH
HL L L LH HLHHHHHH
HL L L H L HHLHHHHH
HL L L HH HHHLHHHH
HL LH L L HHHHLHHH
HL LH LH HHHHHLHH
HL LH H L HHHHHHLH
HL LH HH HHHHHHHL
PIN DESCRIPTION
Pin Names Description
G1 Input Enable
G2A, G2B Input Enables (Active LOW)
Yx Data Outputs
A, B, C Select Data Inputs
NOTE:
1 . H = HIGH Voltage Level
L = LOW Voltage Level
X = Don't Care
2
3
4
5
6
7
89
10
11
12
13
14
15
16
1
A
B
G2A
GND
Y7
G1
C
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
VCC
FUNCTION TABLE(1)
INDUSTRIAL TEMPERATURE RANGE
IDT74LVC138A
3.3V CMOS 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
3
Symbol Parameter Test Conditions Min. Typ.(1) Max. Unit
VIH Input HIGH Voltage Level VCC = 2.3V to 2.7V 1.7 — — V
VCC = 2.7V to 3.6V 2 — —
VIL Input LOW Voltage Level VCC = 2.3V to 2.7V — — 0.7 V
VCC = 2.7V to 3.6V — — 0.8
IIH Input Leakage Current VCC = 3.6V VI = 0 to 5.5V — — ±5µA
IIL
IOZH High Impedance Output Current VCC = 3.6V VO = 0 to 5.5V — — ±10 µA
IOZL (3-State Output pins)
IOFF Input/Output Power Off Leakage VCC = 0V, VIN or VO ≤ 5.5V — — ±50 µA
VIK Clamp Diode Voltage VCC = 2.3V, IIN = –18mA — –0.7 –1.2 V
VHInput Hysteresis VCC = 3.3V — 100 — mV
ICCL Quiescent Power Supply Current VCC = 3.6V, VIN = GND or VCC —— 10µA
ICCH
ICCZ
∆ICC Quiescent Power Supply Current One input at VCC - 0.6V, other inputs at VCC or GND — — 50 0 µA
Variation
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: TA = –40°C to +85°C
NOTE:
1. Typical values are at VCC = 3.3V, +25°C ambient.
NOTE:
1. VIH and VIL must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate VCC range.
TA = – 40°C to + 85°C.
OUTPUT DRIVE CHARACTERISTICS
Symbol Parameter Test Conditions(1) Min. Max. Unit
VOH Output HIGH Voltage VCC = 2.3V to 3.6V IOH = – 0.1mA VCC – 0.2 — V
VCC = 2.3V IOH = – 6mA 2 —
VCC = 2.3V IOH = – 12mA 1 .7 —
VCC = 2.7V 2.2 —
VCC = 3V 2.4 —
VCC = 3V IOH = – 24mA 2 .2 —
VOL Output LOW Voltage VCC = 2.3V to 3.6V IOL = 0.1mA — 0.2 V
VCC = 2.3V IOL = 6mA — 0.4
IOL = 12mA — 0. 7
VCC = 2.7V IOL = 12mA — 0. 4
VCC = 3V IOL = 24mA — 0.55
INDUSTRIAL TEMPERATURE RANGE
4
IDT74LVC138A
3.3V CMOS 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
OPERATING CHARACTERISTICS, TA = 25°C
VCC = 2.5V±0.2V VCC = 3.3V±0.3V
Symbol Parameter Test Conditions Typical Typical Unit
CPD Power Dissipation Capacitance CL = 0pF, f = 10Mhz — 27 pF
SWITCHING CHARACTERISTICS(1)
VCC = 2.5V ± 0.2V VCC = 2.7V VCC = 3.3V ± 0.3V
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit
tPLH Propagation Delay — — — 7.9 1 6.7 ns
tPHL A to B, C to Yx
tPLH Propagation Delay — — — 7.4 1 6.5 ns
tPHL G2A or G2B to Yx
tPLH Propagation Delay — — — 6.4 1 5.8 ns
tPHL G1 to Yx
tSU Setup Time, at A, B, and C before G 2 . 4 — 2 . 5 — 2. 3 — n s
tHHold Time, at A, B, and C after G 1 .6 — 1. 5 — 1 .5 — ns
tSK(o) Output Skew(2) —————1ns
NOTES:
1. See TEST CIRCUITS AND WAVEFORMS. TA = – 40°C to + 85°C.
2 Skew between any two outputs of the same package and switching in the same direction.
INDUSTRIAL TEMPERATURE RANGE
IDT74LVC138A
3.3V CMOS 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
5
Open
VLOAD
GND
VCC
Pulse
Generator D.U.T.
500Ω
500Ω
CL
RT
VIN VOUT
(1, 2)
LVC QUAD Link
INPUT
VIH
0V
VOH
VOL
tPLH1
tSK (x )
OUTPUT 1
OUTPUT 2
tPHL1
tSK (x)
tPLH2 tPHL2
VT
VT
VOH
VT
VOL
tSK(x) = tPLH2 - tPLH1 or tPHL2 - tPHL1
LVC QUA D Li nk
DATA
INPUT 0V
0V
0V
0V
tREM
TIMING
INPUT
ASYNCHRONOUS
CONTROL
SYNCHRONOUS
CONTROL
tSU tH
tSU tH
VIH
VT
VIH
VT
VIH
VT
VIH
VT
LOW-HIGH-LOW
PULSE
HIGH-LOW-HIGH
PULSE
VT
tW
SAME PH ASE
INPUT TRANSITION
OPPOSIT E PH AS E
INPUT TRANSITION
0V
0V
VOH
VOL
tPLH tPHL
tPHL
tPLH
OUTPUT
VT
VIH
VT
VT
VIH
VT
CONTROL
INPUT tPLZ 0V
OUTPUT
NORMALLY
LOW tPZH
0V
SWITCH
CLOSED
OUTPUT
NORMALLY
HIGH
ENABLE DISABLE
SWITCH
OPEN
tPHZ
0V
VLZ
VOH
VT
VT
tPZL
VLOAD/2 VLOAD/2
VIH
VT
VOL
VHZ
LVC QUA D Li nk
LVC QUA D Li nk
LVC QUAD Link
LVC QUAD Link
TEST CIRCUITS AND WAVEFORMS
Propagation Delay
Test Circuit for All Outputs
Set-up, Hold, and Release Times
NOTES:
1. For tSK(o) OUTPUT1 and OUTPUT2 are any two outputs.
2. For tSK(b) OUTPUT1 and OUTPUT2 are in the same bank.
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
NOTES:
1. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2ns; tR ≤ 2ns.
2. Pulse Generator for All Pulses: Rate ≤ 10MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
Output Skew - tSK(X)Pulse Width
Symbol VCC(1)= 2.5V±0.2V VCC(2)= 3.3V±0.3V & 2.7V Unit
VLOAD 2 x Vcc 6 V
VIH Vcc 2.7 V
VTVcc / 2 1.5 V
VLZ 150 300 mV
VHZ 150 300 mV
CL30 50 pF
TEST CONDITIONS
SWITCH POSITION
Test Switch
Open Drain
Disable Low VLOAD
Enable Low
Disable High GND
Enable High
All Other Tests Open
NOTE:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
Enable and Disable Times
INDUSTRIAL TEMPERATURE RANGE
6
IDT74LVC138A
3.3V CMOS 3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
ORDERING INFORMATION
CORPORATE HEADQUARTERS for SALES: for Tech Support:
2975 Stender Way 800-345-7015 or 408-727-6116 logichelp@idt.com
Santa Clara, CA 95054 fax: 408-492-8674 (408) 654-6459
www.idt.com
IDT XX LVC XXXX XX
Package
Devi ce T ype
3-Li ne to 8- Line Decod er/ Dem ul tip lexer, ±24mA
138A
Temp. Range
74 -40°C to +85°C
Q
DC
PY
PG
Quarter Size Outline Package
Small Outline IC
Shrink Small Outline Package
Thin Shrink Small Outline Package
