TC4423A/TC4424A/TC4425A 3A Dual High-Speed Power MOSFET Drivers Features General Description * High Peak Output Current: 4.5A (typical) * Wide Input Supply Voltage Operating Range: - 4.5V to 18V * High Capacitive Load Drive Capability: - 1800 pF in 12 ns * Short Delay Times: 40 ns (typical) * Matched Rise/Fall Times * Low Supply Current: - With Logic `1' Input - 1.0 mA (maximum) - With Logic `0' Input - 150 A (maximum) * Low Output Impedance: 2.5 (typical) * Latch-Up Protected: Will Withstand 1.5A Reverse Current * Logic Input Will Withstand Negative Swing Up To 5V * Pin compatible with the TC4423/TC4424/TC4425 and TC4426A/TC4427A/TC4428A devices * Space-saving 8-Pin 150 mil body SOIC and 8-Pin 6x5 DFN Packages The TC4423A/TC4424A/TC4425A devices are a family of dual-output 3A buffers/MOSFET drivers. These devices are improved versions of the earlier TC4423/ TC4424/TC4425 dual-output 3A driver family. This improved version features higher peak output current drive capability, lower shoot-throught current, matched rise/fall times and propagation delay times. The TC4423A/TC4424A/TC4425A devices are pincompatible with the existing TC4423/TC4424/TC4425 family. An 8-pin SOIC package option has been added to the family. The 8-pin DFN package option offers increased power dissipation capability for driving heavier capacitive or resistive loads. The TC4423A/TC4424A/TC4425A MOSFET drivers can easily charge and discharge 1800 pF gate capacitance in under 20 ns, provide low enough impedances in both the on and off states to ensure the MOSFET's intended state will not be affected, even by large transients. The TC4423A/TC4424A/TC4425A inputs may be driven directly from either TTL or CMOS (2.4V to 18V). In addition, the 300 mV of built-in hysteresis provides noise immunity and allows the device to be driven from slow rising or falling waveforms. Applications * * * * Switch Mode Power Supplies Pulse Transformer Drive Line Drivers Direct Drive of Small DC Motors The TC4423A/TC4424A/TC4425A dual-output 3A MOSFET driver family is offerd with a -40oC to +125oC temperature rating, making it useful in any wide temperature range application. Package Types 8-Pin PDIP/SOIC TC4423A TC4424A TC4425A NC IN A GND IN B 8 1 2 TC4423A 7 3 TC4424A 6 4 TC4425A 5 8-Pin 6x5 DFN (1) NC 1 IN A 2 GND 3 IN B 4 NC OUT A VDD OUT B TC4423A TC4424A TC4425A NC OUT A VDD OUT B NC OUT A VDD OUT B TC4423A TC4424A TC4425A 8 NC NC NC 7 OUT A OUT A OUT A 6 VDD VDD VDD 5 OUT B OUT B OUT B TC4423A TC4424A TC4425A 16-Pin SOIC (Wide) NC IN A NC GND GND NC IN B NC 1 16 2 15 3 4 5 6 7 8 TC4423A TC4424A TC4425A 14 13 12 11 10 9 NC OUT A OUT A VDD VDD OUT B OUT B NC NC OUT A OUT A VDD VDD OUT B OUT B NC NC OUT A OUT A VDD VDD OUT B OUT B NC Note 1: Exposed pad of the DFN package is electrically isolated. 2: Duplicate pins must both be connected for proper operation. (c) 2007 Microchip Technology Inc. DS21998B-page 1 TC4423A/TC4424A/TC4425A Functional Block Diagram(1) Inverting VDD 750 A 300 mV Output Non-inverting Input Effective Input C = 20 pF (Each Input) GND 4.7V TC4423A Dual Inverting TC4424A Dual Non-inverting TC4425A Inverting / Non-inverting Note 1: Unused inputs should be grounded. DS21998B-page 2 (c) 2007 Microchip Technology Inc. TC4423A/TC4424A/TC4425A 1.0 ELECTRICAL CHARACTERISTICS Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings Supply Voltage ................................................................+20V Input Voltage, IN A or IN B .......... (VDD + 0.3V) to (GND - 5V) Package Power Dissipation (TA=50C) 8L PDIP .......................................................................1.2W 8L SOIC.................................................................... 0.61W 16L SOIC.....................................................................1.1W 8L DFN .................................................................... Note 3 DC CHARACTERISTICS (NOTE 2) Electrical Specifications: Unless otherwise indicated, TA = +25C, with 4.5V VDD 18V. Parameters Sym Min Typ Max Units Logic `1', High Input Voltage VIH 2.4 1.5 -- V Logic `0', Low Input Voltage VIL -- 1.3 0.8 V Input Current IIN -1 -- 1 A Input Voltage VIN -5 -- VDD+0.3 V Conditions Input 0V VIN VDD Output High Output Voltage VOH VDD - 0.025 -- -- V DC Test Low Output Voltage VOL -- -- 0.025 V DC Test Output Resistance, High ROH -- 2.2 3.0 IOUT = 10 mA, VDD = 18V Output Resistance, Low ROL -- 2.8 3.5 IOUT = 10 mA, VDD = 18V Peak Output Current IPK -- 4.5 -- A 10V VDD 18V (Note 2) Latch-Up Protection Withstand Reverse Current IREV -- >1.5 -- A Duty cycle 2%, t 300 sec. Rise Time tR -- 12 21 ns Figure 4-1, Figure 4-2, CL = 1800 pF Fall Time tF -- 12 21 ns Figure 4-1, Figure 4-2, CL = 1800 pF Delay Time tD1 -- 40 48 ns Figure 4-1, Figure 4-2, CL = 1800 pF Delay Time tD2 -- 41 48 ns Figure 4-1, Figure 4-2, CL = 1800 pF VDD 4.5 -- 18 V IS -- 1.0 2.0 mA VIN = 3V (Both inputs) IS -- 0.15 0.25 mA VIN = 0V (Both inputs) Switching Time (Note 1) Power Supply Supply Voltage Power Supply Current Note 1: 2: 3: Switching times ensured by design. Tested during characterization, not production tested. Package power dissipation is dependent on the copper pad area on the PCB. (c) 2007 Microchip Technology Inc. DS21998B-page 3 TC4423A/TC4424A/TC4425A DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE) Electrical Specifications: Unless otherwise indicated, operating temperature range with 4.5V VDD 18V. Parameters Sym Min Typ Max Units Logic `1', High Input Voltage VIH 2.4 Logic `0', Low Input Voltage VIL -- Input Current IIN High Output Voltage Low Output Voltage Conditions -- -- V -- 0.8 V -10 -- +10 A VOH VDD - 0.025 -- -- V VOL -- -- 0.025 V Output Resistance, High ROH -- 3.1 6 IOUT = 10 mA, VDD = 18V Output Resistance, Low ROL -- 3.7 7 IOUT = 10 mA, VDD = 18V Rise Time tR -- 20 31 ns Figure 4-1, Figure 4-2, CL = 1800 pF Fall Time tF -- 22 31 ns Figure 4-1, Figure 4-2, CL = 1800 pF Delay Time tD1 -- 50 66 ns Figure 4-1, Figure 4-2, CL = 1800 pF Delay Time tD2 -- 50 66 ns Figure 4-1, Figure 4-2, CL = 1800 pF IS -- -- 2.0 0.2 3.0 0.3 mA VIN = 3V (Both inputs) VIN = 0V (Both inputs) Input 0V VIN VDD Output Switching Time (Note 1) Power Supply Power Supply Current Note 1: Switching times ensured by design. TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V VDD 18V. Parameters Sym Min Typ Max Units Conditions Temperature Ranges Specified Temperature Range (V) TA -40 -- +125 C Maximum Junction Temperature TJ -- -- +150 C Storage Temperature Range TA -65 -- +150 C Thermal Resistance, 8L-6x5 DFN JA -- 33.2 -- C/W Thermal Resistance, 8L-PDIP JA -- 84.6 -- C/W Thermal Resistance, 8L-SOIC JA -- 163 -- C/W Thermal Resistance, 16L-SOIC JA -- 90 -- C/W Package Thermal Resistances DS21998B-page 4 Typical four-layer board with vias to ground plane (c) 2007 Microchip Technology Inc. TC4423A/TC4424A/TC4425A 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25C with 4.5V <= VDD <= 18V. 80 80 70 4,700 pF 60 Fall Time (ns) Rise Time (ns) 70 3,300 pF 50 1,800 pF 40 1,000 pF 30 20 10 4700 pF 60 3300 pF 50 40 1800 pF 30 20 10 470 pF 0 470 pF 1000 pF 0 4 6 8 10 12 14 16 18 4 6 8 Supply Voltage (V) FIGURE 2-1: Voltage. Rise Time vs. Supply FIGURE 2-4: Voltage. 60 Fall Time (ns) Rise Time (ns) 40 10V 30 20 15V 10 16 18 Fall Time vs. Supply 5V 50 40 10V 30 15V 20 10 0 100 1000 0 100 10000 1000 Capacitive Load (pF) FIGURE 2-2: Load. Rise Time vs. Capacitive FIGURE 2-5: Load. Fall Time vs. Capacitive 145 Propagation Delay (ns) tFALL 18 16 tRISE 14 10000 Capacitive Load (pF) CLOAD = 1800 pF 20 Time (ns) 14 60 5V 22 12 70 50 24 10 Supply Voltage (V) 12 10 VDD = 12V 125 CLOAD = 1800 pF 105 tD1 85 65 45 tD2 25 -40 -25 -10 5 20 35 50 65 80 95 110 125 2 o FIGURE 2-3: Temperature. Rise and Fall Times vs. (c) 2007 Microchip Technology Inc. 3 4 5 6 7 8 9 10 Input Amplitude (V) Temperature ( C) FIGURE 2-6: Amplitude. Propagation Delay vs. Input DS21998B-page 5 TC4423A/TC4424A/TC4425A Typical Performance Curves (Continued) Note: Unless otherwise indicated, TA = +25C with 4.5V <= VDD <= 18V. 100 Propagation Delay (ns) Propagation Delay (ns) 70 CLOAD = 1800 pF 90 tD1 80 tD2 70 60 50 40 CLOAD = 1800 pF VDD = 18V VIN = 5V 65 60 50 tD1 45 40 35 30 30 4 6 8 10 12 14 16 -40 -25 -10 18 5 FIGURE 2-7: Supply Voltage. Propagation Delay Time vs. FIGURE 2-10: Temperature. 0.5 VDD = 18V 0.4 0.3 Both Inputs = 1 0.2 Both Inputs = 0 0.1 35 50 65 80 95 110 125 Temperature ( C) Quiescent Current (mA) Quiescent Current (mA) 0.5 20 o Supply Voltage (V) Propagation Delay Time vs. VDD = 18V 0.4 Both Inputs = 1 0.3 0.2 Both Inputs = 0 0.1 0 0 4 6 8 10 12 14 16 -40 -25 -10 18 5 FIGURE 2-8: Supply Voltage. 20 35 50 65 80 95 110 125 o Supply Voltage (V) Temperature ( C) Quiescent Current vs. FIGURE 2-11: Temperature. Quiescent Current vs. 8 7 VIN = 5V (TC4424A) VIN = 0V (TC4423A) o 6 TJ = 150 C 7 5 4 ROUT-HI ( :) ROUT-LO ( :) tD2 55 TJ = 25oC 3 2 VIN = 0V (TC4424A) VIN = 5V (TC4423A) TJ = 150oC 6 5 TJ = 25oC 4 3 1 2 4 6 8 10 12 14 16 18 Supply Voltage (V) FIGURE 2-9: Output Resistance (Output Low) vs. Supply Voltage. DS21998B-page 6 4 6 8 10 12 14 16 18 Supply Voltage (V) FIGURE 2-12: Output Resistance (Output High) vs. Supply Voltage. (c) 2007 Microchip Technology Inc. TC4423A/TC4424A/TC4425A Typical Performance Curves (Continued) Note: Unless otherwise indicated, TA = +25C with 4.5V <= VDD <= 18V. VDD = 18V 650 kHz 100 Supply Current (mA) Supply Current (mA) 120 50 kHz 80 100 kHz 60 40 400 kHz 200 kHz 20 0 100 1000 100 90 80 70 60 50 40 30 20 10 0 10000 VDD = 18V 10,000 pF 4,700 pF 470 pF 1,800 pF 1,000 pF 100 pF 10 100 Capacitive Load (pF) Supply Current (mA) 140 Supply Current vs. VDD = 12V 120 FIGURE 2-16: Frequency. 140 2 MHz 100 kHz Supply Current (mA) FIGURE 2-13: Capacitive Load. 200 kHz 100 80 60 500 kHz 40 20 1 MHz 0 100 Supply Current vs. VDD = 12V 4,700 pF 120 10,000 pF 100 80 1,800 pF 60 1,000 pF 470 pF 40 20 100 pF 0 1000 10000 10 100 Capacitive Load (pF) Supply Current (mA) 120 Supply Current vs. VDD = 6V 140 2 MHz 80 100 kHz 60 40 FIGURE 2-17: Frequency. 3.5 MHz 100 1 MHz 200 kHz 500 kHz 20 0 100 10000 Supply Current vs. VDD = 6V 4,700 pF 120 100 80 1,800 pF 60 1,000 pF 40 10,000 pF 20 100 pF 470 pF 0 1000 10000 10 Capacitive Load (pF) FIGURE 2-15: Capacitive Load. 1000 Frequency (kHz) Supply Current (mA) FIGURE 2-14: Capacitive Load. 1000 Frequency (kHz) Supply Current vs. (c) 2007 Microchip Technology Inc. 100 1000 10000 100000 Frequency (kHz) FIGURE 2-18: Frequency. Supply Current vs. DS21998B-page 7 TC4423A/TC4424A/TC4425A Typical Performance Curves (Continued) Note: Unless otherwise indicated, TA = +25C with 4.5V <= VDD <= 18V. 1.00E-06 -6 Crossover Energy (A*sec) 10 10-7 1.00E-07 10-8 1.00E-08 10 -9 1.00E-09 4 6 8 10 12 14 16 18 Supply Voltage (V) Note: The values on this graph represents the loss seen by both drivers in a package during one complete cycle. For a single driver, divide the stated values by 2. For a single transition of a single driver, divide the stated value by 4. FIGURE 2-19: Supply Voltage. DS21998B-page 8 Crossover Energy vs. (c) 2007 Microchip Technology Inc. TC4423A/TC4424A/TC4425A 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE (1) 8-Pin PDIP 8-Pin DFN 16-Pin SOIC (Wide) Symbol 1 1 1 NC No connection 2 2 2 IN A Input A -- -- 3 NC 3 3 4 GND -- -- 5 GND -- -- 6 NC No connection 4 4 7 IN B Input B -- -- 8 NC No connection -- -- 9 NC 5 5 10 OUT B -- -- 11 OUT B 6 6 12 VDD Supply input -- -- 13 VDD Supply input No connection Ground Ground No connection Output B Output B 7 7 14 OUT A Output A -- -- 15 OUT A Output A 8 8 16 NC No connection PAD -- NC Exposed Metal Pad -- Note 1: 3.1 Description Duplicate pins must be connected for proper operation. Inputs A and B 3.4 Ground (GND) Inputs A and B are TTL/CMOS compatible inputs that control outputs A and B, respectively. These inputs have 300 mV of hysteresis between the high and low input levels, allowing them to be driven from slow rising and falling signals, and to provide noise immunity. Ground is the device return pin. The ground pin should have a low-impedance connection to the bias supply source return. High peak currents will flow out the ground pin when the capacitive load is being discharged. 3.2 3.5 Outputs A and B Outputs A and B are CMOS push-pull outputs that are capable of sourcing and sinking 3A peaks of current (VDD = 18V). The low output impedance ensures the gate of the external MOSFET will stay in the intended state even during large transients. These outputs also have a reverse current latch-up rating of 1.5A. 3.3 Exposed Metal Pad The exposed metal pad of the DFN package is not internally connected to any potential. Therefore, this pad can be connected to a ground plane or other copper plane on a printed circuit board to aid in heat removal from the package. Supply Input (VDD) VDD is the bias supply input for the MOSFET driver and has a voltage range of 4.5V to 18V. This input must be decoupled to ground with a local ceramic capacitor. This bypass capacitor provides a localized lowimpedance path for the peak currents that are to be provided to the load. (c) 2007 Microchip Technology Inc. DS21998B-page 9 TC4423A/TC4424A/TC4425A 4.0 APPLICATIONS INFORMATION VDD = 18V VDD = 18V 1 F WIMA MKS-2 Input 1 F WIMA MKS-2 0.1 F Ceramic Output CL = 1800 pF 1 2 Input TC4424A (1/2 TC4425A) Input: 100 kHz, square wave, tRISE = tFALL 10 ns +5V Input: 100 kHz, square wave, tRISE = tFALL 10 ns +5V 90% Input 0V Output CL = 1800 pF 1 2 TC4423A (1/2 TC4425A) 0.1 F Ceramic 90% Input 10% 18V Output tD1 tF tD2 90% 90% 0V FIGURE 4-1: Time. DS21998B-page 10 0V tR 10% 18V tD1 90% Output 10% 10% Inverting Driver Switching 0V FIGURE 4-2: Switching Time. 10% tR 90% tD2 tF 10% Non-inverting Driver (c) 2007 Microchip Technology Inc. TC4423A/TC4424A/TC4425A 5.0 PACKAGING INFORMATION 5.1 Package Marking Information (Not to Scale) 8-Lead DFN (6x5) XXXXXXX XXXXXXX XXYYWW NNN TC4423A e3 VMF^^ 0520 256 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW 16-Lead SOIC (300 mil) XXXXXXXXXXX XXXXXXXXXXX XXXXXXXXXXX YYWWNNN e3 Note: Example: TC4423AV OA^^0520 e3 256 XXXXXXXX XXXXYYWW NNN * Example: TC4423AV e3 PA^^256 0520 8-Lead SOIC (150 mil) Legend: XX...X Y YY WW NNN Example: Example: TC4423A VOE^^ e3 0420256 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. (c) 2007 Microchip Technology Inc. DS21998B-page 11 TC4423A/TC4424A/TC4425A 8-Lead Plastic Dual Flat, No Lead Package (MF) - 6x5 mm Body [DFN-S] PUNCH SINGULATED Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D D1 e b N L N K E E2 E1 EXPOSED PAD NOTE 1 2 2 1 1 NOTE 1 D2 TOP VIEW BOTTOM VIEW A2 A A1 A3 NOTE 2 Units Dimension Limits Number of Pins MILLIMETERS MIN N NOM MAX 8 Pitch e Overall Height A - 1.27 BSC 0.85 Molded Package Thickness A2 - 0.65 0.80 Standoff A1 0.00 0.01 0.05 Base Thickness A3 0.20 REF Overall Length D 4.92 BSC Molded Package Length D1 Exposed Pad Length D2 Overall Width E Molded Package Width E1 Exposed Pad Width E2 2.16 2.31 Contact Width b 0.35 0.40 0.47 Contact Length L 0.50 0.60 0.75 Contact-to-Exposed Pad K 0.20 - - Model Draft Angle Top - - 12 1.00 4.67 BSC 3.85 4.00 4.15 5.99 BSC 5.74 BSC 2.46 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Package may have one or more exposed tie bars at ends. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-113B DS21998B-page 12 (c) 2007 Microchip Technology Inc. TC4423A/TC4424A/TC4425A 8-Lead Plastic Dual In-Line (PA) - 300 mil Body [PDIP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging N NOTE 1 E1 1 3 2 D E A2 A L A1 c e eB b1 b Units Dimension Limits Number of Pins INCHES MIN N NOM MAX 8 Pitch e Top to Seating Plane A - - .210 Molded Package Thickness A2 .115 .130 .195 Base to Seating Plane A1 .015 - - Shoulder to Shoulder Width E .290 .310 .325 Molded Package Width E1 .240 .250 .280 Overall Length D .348 .365 .400 Tip to Seating Plane L .115 .130 .150 Lead Thickness c .008 .010 .015 b1 .040 .060 .070 b .014 .018 .022 eB - - Upper Lead Width Lower Lead Width Overall Row Spacing .100 BSC .430 Notes: 1. Pin 1 visual index feature may vary, but must be located with the hatched area. 2. Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. Microchip Technology Drawing C04-018B (c) 2007 Microchip Technology Inc. DS21998B-page 13 TC4423A/TC4424A/TC4425A 8-Lead Plastic Small Outline (OA) - Narrow, 3.90 mm Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D e N E E1 NOTE 1 1 2 3 h b h A2 A c L A1 L1 Units Dimension Limits Number of Pins MILLIMETERS MIN N NOM MAX 8 Pitch e Overall Height A - 1.27 BSC - Molded Package Thickness A2 1.25 - - Standoff A1 0.10 - 0.25 Overall Width E Molded Package Width E1 3.90 BSC Overall Length D 4.90 BSC 1.75 6.00 BSC Chamfer (optional) h 0.25 - 0.50 Foot Length L 0.40 - 1.27 Footprint L1 1.04 REF Foot Angle 0 - 8 Lead Thickness c 0.17 - 0.25 Lead Width b 0.31 - 0.51 Mold Draft Angle Top 5 - 15 Mold Draft Angle Bottom 5 - 15 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-057B DS21998B-page 14 (c) 2007 Microchip Technology Inc. TC4423A/TC4424A/TC4425A 16-Lead Plastic Small Outline (OE) - Wide, 7.50 mm Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 1 2 3 e b h h A c A2 L A1 Units Dimension Limits Number of Pins L1 MILLIMETERS MIN N NOM MAX 16 Pitch e Overall Height A - 1.27 BSC - Molded Package Thickness A2 2.05 - - Standoff A1 0.10 - 0.30 Overall Width E Molded Package Width E1 7.50 BSC Overall Length D 10.30 BSC 2.65 10.30 BSC Chamfer (optional) h 0.25 - 0.75 Foot Length L 0.40 - 1.27 Footprint L1 1.40 REF Foot Angle 0 - 8 Lead Thickness c 0.20 - 0.33 Lead Width b 0.31 - 0.51 Mold Draft Angle Top 5 - 15 Mold Draft Angle Bottom 5 - 15 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-102B (c) 2007 Microchip Technology Inc. DS21998B-page 15 TC4423A/TC4424A/TC4425A NOTES: DS21998B-page 16 (c) 2007 Microchip Technology Inc. TC4423A/TC4424A/TC4425A APPENDIX A: REVISION HISTORY Revision B (April 2007) * Correct numerous errors throughout document. * Page 3: Added Package Power Dissipation information about DC Characteristic Table. * Page 3: Added Note 3 to DC Characteristic Table. * Page 4: Changed Thermal Resistance for 8L-PDIP device from 125 to 84.6. Changed Thermal Resistance for 8L-SOIC from 155 to 163. * Page 12: Updated Package Outline Drawing. * Page 13: Updated Package Outline Drawing. * Page 14: Updated Package Outline Drawing. * Page 15: Added 16-Lead SOIC Package Outline Drawing * Page 17: Updated Revision History. Revision A (June 2006) * Original Release of this Document. (c) 2007 Microchip Technology Inc. DS21998B-page 17 TC4423A/TC4424A/TC4425A NOTES: DS21998B-page 18 (c) 2007 Microchip Technology Inc. TC4423A/TC4424A/TC4425A PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range Device: XX XXX Package Tape & Reel TC4423A: 3A Dual MOSFET Driver, Inverting TC4424A: 3A Dual MOSFET Driver, Non-Inverting TC4425A: 3A Dual MOSFET Driver, Complementary Temperature Range: V = Package: * MF = Dual, Flat, No-Lead (6x5 mm Body), 8-lead MF713 = Dual, Flat, No-Lead (6x5 mm Body), 8-lead (Tape and Reel) OA = Plastic SOIC (150 mil Body), 8-Lead OA713 = Plastic SOIC (150 mil Body), 8-Lead (Tape and Reel) OE = Plastic SOIC (Wide Body), 16-lead OE713 = Plastic SOIC (Wide Body), 16-lead (Tape and Reel) PA = Plastic DIP, (300 mil body), 8-lead Examples: a) TC4423AVOA: 3A Dual Inverting MOSFET Driver, 8LD SOIC package. b) TC4423AVPA: 3A Dual Inverting MOSFET Driver, 8LD PDIP package. c) TC4423AVMF: 3A Dual Inverting MOSFET Driver, 8LD DFN package. d) TC4423AVOE: 3A Dual Inverting MOSFET Driver, 16LD SOIC package. a) TC4424AVOA713: 3A Dual Non-Inverting, MOSFET Driver, 8LD SOIC package, Tape and Reel. b) TC4424AVPA: 3A Dual Non-Inverting, MOSFET Driver, 8LD PDIP package. a) TC4425AVOA: 3A Dual Complementary, MOSFET Driver, 8LD SOIC package. b) TC4425AVPA: 3A Dual Complementary, MOSFET Driver, 8LD PDIP package. c) TC4425AVOE713: 3A Dual Complementary, MOSFET Driver, 16LD SOIC package, Tape and Reel. -40C to +125C * All package offerings are Pb Free (Lead Free) (c) 2007 Microchip Technology Inc. DS21998B-page 19 TC4423A/TC4424A/TC4425A NOTES: DS21998B-page 20 (c) 2007 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2007 Microchip Technology Inc. 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