AOZX2U54QI-08
28V/10A Synchronous EZBuck Regulator
Preliminary
Datasheet
Rev. 0.1 July 2017 www.aosmd.com 1
General Description
The AOZX2U54QI-08 is a high-efficiency, easy-to-use
DC/DC synchronous buck regulator that operates up to
28V. The device is capable of supplying 10A of
continuous output current with an output voltage
adjustable down to 0.8V ±1%.
The AOZX2U54QI-08 integrates an internal linear
regulator to generate 5.3V VCC from input. If input
voltage is lower than 5.3V, the linear regulator operates
at low drop output mode, which allows the VCC voltage
is equal to input voltage minus the drop-output voltage
of the internal linear regulator.
A proprietary constant on-time PWM control with input
feed-forward results in ultra-fast transient response
while maintaining relatively constant switching
frequency over the entire input voltage range.
The device features multiple protection functions such
as VCC under-voltage lockout, cycle-by-cycle current
limit, output over-voltage protection, short-circuit
protection, and thermal shutdown.
The AOZX2U54QI-08 is available in a 4mm×4mm
QFN-22L package and is rated over a -40°C to +85°C
ambient temperature range.
Features
Wide input voltage range:
o 6.5V to 28V
10A continuous output current
Output voltage adjustable to 0.8V ±1.0%
Low RDS(ON) internal NFETs
o 11m high-side
o 11m low-side
Constant On-Time with input feed-forward
Ceramic capacitor stable
Adjustable soft start
Power Good output
Integrated bootstrap diode
Cycle-by-cycle current limit
Short-circuit protection
Thermal shutdown
Thermally enhanced 22-pin 4 × 4 QFN
Applications
Compact desktop PCs
Graphics cards
Set top boxes
LCD TVs
Cable modems
Point of load dc/dc converters
Telecom/Networking/Datacom equipment
AOZX2U54QI-08
Rev. 0.1 July 2017 www.aosmd.com 2
Typical Application
POWER GROUND
ANALOG GROUND
LX
C3
88µF
BST
R2
R1
R3
100k
OUTPUT
3.3V, 10A
FB
AGND
PGND
VCC
PGOOD
EN
SS
AOZX2U54QI-08
ONOFF
POWER GOOD
C4
4.7µF
C5
0.1µF
L1
1.5µH
CSS
IN INPUT
6.5V TO 28V
C2
22µF
5V
AOZX2U54QI-08
Rev. 0.1 July 2017 www.aosmd.com 3
Recommended Start-up Sequence
Ordering Information
Part Number
Temperature Range
Package
Environmental
AOZX2U54QI-08
-40°C to +85°C
22-Pin 4×4 QFN
Green
All AOS Products are offering in packaging with Pb-free plating and compliant to RoHS standards.
Please visit www.aosmd.com/web/rohs_compliant.jsp for additional information.
Pin Configuration
1
2
3
4
5
6
PGOOD
FB
AGND
NC
NC
AIN
AOZX2U54QI-08
22-Pin 4mm x 4mm QFN
7
9
10
IN
IN
18
19
20
21
LX
EN
BST
VCC
SS
16
15
13
12
LX
LX
LX
PGND
PGND
IN
22
14
PGND
8IN
LX
11
LX
17
PGND
AOZX2U54QI-08
Rev. 0.1 July 2017 www.aosmd.com 4
Pin Description
Pin Name
Pin Function
PGOOD
Power Good Signal Output. PGOOD is an open-drain output used to
indicate the status of the output voltage. It is internally pulled low when
the output voltage is 15% lower than the nominal regulation voltage for
or 20% higher than the nominal regulation voltage. PGOOD is pulled
low during soft-start and shut down.
FB
Feedback Input. Adjust the output voltage with a resistive voltage-
divider between the regulator’s output and AGND.
AGND
Analog Ground.
AIN
Supply to internal analog function. AIN pin must be connected to IN
pins. For noisy operation, it’s better to have a RC filter from IN to AIN
for better noise immunity.
IN
Supply Input. IN is the regulator input. All IN pins must be connected
together.
LX
Switching Node.
PGND
Power Ground.
EN
Enable Input. The AOZX2U54QI-08 is enabled when EN is pulled high.
The device shuts down when EN is pulled low.
BST
Bootstrap Capacitor Connection. The AOZX2U54QI-08 includes an
internal bootstrap diode. Connect an external capacitor between BST
and LX as shown in Typical Application diagram.
VCC
Supply Input for analog functions.
Bypass VCC to AGND with a 4.7µF~10µF ceramic capacitor. Place the
capacitor close to VCC pin.
SS
Soft-Start Time Setting Pin. Connect a capacitor between SS and
AGND to set the soft-start time.
AOZX2U54QI-08
28V/10A Synchronous EZBuck Regulator
Preliminary
Datasheet
Rev. 0.1 July 2017 www.aosmd.com 5
Absolute Maximum Ratings(1)
IN to AGND ………...........................-0.3V to 30V
LX to AGND(4)…………………………-0.3V to 30V
BST to AGND…………………………-0.3V to 36V
SS, PGOOD, FB, EN, VCC to AGND……………
…-0.3V to 6V
PGND to AGND…………………….-0.3V to +0.3V
Junction Temperature (TJ)………………..+150°C
Storage Temperature (TS)………-65°C to +150°C
ESD Rating(3)……………………………………2kV
Maximum Operating Ratings(2)
Supply Voltage (VIN)………………......6.5V to 28V
Output Voltage Range……………0.8V to 0.85*VIN
Ambient Temperature (TA)………..-40°C to +85°C
Package Thermal Resistance
(θJA)……………………………………………40°C/W
(θJC)……………………………………………0.6°C/W
Electrical Characteristics
TA = 25°C, VIN=12V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of -40°C to +85°C.
Parameter
Symbol
Conditions
MIN
TYP
MAX
UNITS
IN Supply Voltage
VIN
6.5
28
V
Under-Voltage Lockout
Threshold of VIN
VUVLO
VIN rising
VIN falling
3.2
4.0
3.7
4.4
V
V
Quiescent Supply
Current of AIN
Iq
IOUT = 0A, VEN > 2V, PFM
Mode
0.16
mA
Shutdown Supply
Current
IOFF
VEN = 0V
15
A
Feedback Voltage
VFB
TA = 25°C
TA = 0°C to 85°C
0.792
0.788
0.800
0.800
0.808
0.812
V
Load Regulation
0.5
%
Line Regulation
1
%
FB Input Bias Current
IFB
200
nA
Enable
EN Input Threshold
VEN
Off threshold
On threshold
1.6
0.5
V
V
EN Input Hysteresis
VEN_HYS
100
mV
Modulator
Minimum On Time
TON_MIN
60
ns
Minimum Off Time
TOFF_MIN
300
ns
Soft-Start
SS Source Current
ISS_OUT
VSS = 0
CSS = 0.001F to 0.1F
7
11
15
A
Power Good Signal
PGOOD Low Voltage
VPG_LOW
IOL = 1mA
0.5
V
PGOOD Leakage
Current
±1
A
PGOOD Threshold
(Low level to High level)
VPGH
FB rising
90
%
PGOOD Threshold
(High level to Low level)
VPGL
FB rising
FB falling
120
85
%
%
PGOOD Threshold
Hysteresis
5
%
AOZX2U54QI-08
Rev. 0.1 July 2017 www.aosmd.com 6
Electrical Characteristics
TA = 25°C, VIN=12V, VCC=5V, EN = 5V, unless otherwise specified. Specifications in BOLD indicate a temperature range of -40°C to +85°C.
Under Voltage and Over Voltage Protection
Under Voltage threshold
VPL
FB falling
70
%
Under Voltage Delay
Time
TPL
32
uS
Over Voltage Threshold
VPH
FB rising
120
%
Power Stage Output
High-Side NFET On-
Resistance
RDS(ON)
VIN = 12V
11
m
High-Side NFET
Leakage
VEN = 0V, VLX = 0V
10
A
Low-Side NFET On-
Resistance
RDS(ON)
VLX = 12V
11
m
Low-Side NFET
Leakage
VEN = 0V
10
A
Over-current and Thermal Protection
Current Limit
ILIM
15
A
Thermal Shutdown
Threshold
TJ rising
TJ falling
150
100
°C
°C
Notes:
1. Exceeding the Absolute Maximum ratings may damage the device.
2. The device is not guaranteed to operate beyond the Maximum Operating ratings.
3. Devices are inherently ESD sensitive, handling precautions are required. Human body model rating: 1.5K in series with 100pF.
4. LX to PGND Transient (t<20ns) ------- -7V to Vin+7V.
AOZX2U54QI-08
Rev. 0.1 July 2017 www.aosmd.com 7
Functional Block Diagram
+
S
R
Q
TIMER
Q
TOFF_MIN
FB
0.8V
ILIM
ERROR COMP
ILIM COMP
TIMER
Q
TON VCC
BST IN
LX
PGND
VCC
AGND
Current
information
processing
ISENSE
ISENSE
(AC)
ISENSE
ISENSE
(AC)
+
UVLO
EN
OTP
FB
DECODE
SS
REFERENCE
& BIAS
Light Load
Threshold
Light Load
Comp
ISENSE
EN
LDO
PG logic
PGood
AOZX2U54QI-08
Rev. 0.1 July 2017 www.aosmd.com 8
Detailed Description
The AOZX2U54QI-08 is a high-efficiency, easy-to-
use, synchronous buck regulator optimized for
notebook computers. The regulator is capable of
supplying 10A of continuous output current with an
output voltage adjustable down to 0.8V.
The input voltage of AOZX2U54QI-08 can be as low
as 6.5V. The highest input voltage of AOZX2U54QI-
08 can be 28V. Constant on-time PWM with input
feed-forward control scheme results in ultra-fast
transient response while maintaining relatively
constant switching frequency over the entire input
range. True AC current mode control scheme
guarantees the regulator can be stable with
ceramics output capacitor. Protection features
include VCC under-voltage lockout, current limit,
output over voltage and under voltage protection,
short-circuit protection, and thermal shutdown.
The AOZX2U54QI-08 is available in 22-pin
4mm×4mm QFN package.
Input Power Architecture
The AOZX2U54QI-08 integrates an internal linear
regulator to generate 5.3V (±5%) VCC from input. If
input voltage is lower than 5.3V, the linear regulator
operates at low drop-output mode; the VCC voltage is
equal to input voltage minus the drop-output voltage
of internal linear regulator.
Enable and Soft Start
The AOZX2U54QI-08 has external soft start feature
to limit in-rush current and ensure the output voltage
ramps up smoothly to regulation voltage. A soft start
process begins when VCC rises to 4.5V and voltage
on EN pin is HIGH. An internal current source
charges the external soft-start capacitor; the FB
voltage follows the voltage of soft-start pin (VSS)
when it is lower than 0.8V. When VSS is higher than
0.8V, the FB voltage is regulated by internal precise
band-gap voltage (0.8V). When VSS is higher than
3.3V, the PGOOD signal is high. The soft-start time
for PGOOD can be calculated by the following
formula:
)(*330)( nFCusTssss
If CSS is 1nF, the soft-start time will be 330u second;
if CSS is 10nF, the soft-start time will be 3.3m second.
Figure 1. Soft Start Sequence of AOZX2U54QI-08.
Constant-On-Time PWM Control with
Input Feed-Forward
The control algorithm of AOZX2U54QI-08 is
constant-on-time PWM control with input feed-
forward.
The simplified control schematic is shown in
Figure. 2. The high-side switch on-time is
determined solely by a one-shot whose pulse width
is inversely proportional to input voltage (IN). The
one-shot is triggered when the internal 0.8V is
higher than the combined information of FB voltage
and the AC current information of inductor, which is
processed and obtained through the sensed lower-
side MOSFET current once it turns-on. The added
AC current information can help the stability of
constant-on time control even with pure ceramic
output capacitors, which have very low ESR. The
AC current information has no DC offset, which does
not cause offset with output load change, which is
fundamentally different from other V2 constant-on
time control schemes.
0.8V
FB Voltage /AC
current Information
Comp
Programmable
One-Shot
IN
PWM
+
-
Figure 2. Simplified Control Schematic of
AOZX2U54QI-08.
AOZX2U54QI-08
Rev. 0.1 July 2017 www.aosmd.com 9
True Current Mode Control
The constant-on-time control scheme is intrinsically
unstable if output capacitor’s ESR is not large
enough as an effective current-sense resistor.
Ceramic capacitors usually can not be used as
output capacitor.
The AOZX2U54QI-08 senses the low-side MOSFET
current and processes it into DC current and AC
current information using AOS proprietary technique.
The AC current information is decoded and added
on the FB pin on phase. With AC current
information, the stability of constant-on-time control
is significantly improved even without the help of
output capacitor’s ESR; and thus the pure ceramic
capacitor solution can be applicant. The pure
ceramic capacitor solution can significantly reduce
the output ripple (no ESR caused overshoot and
undershoot) and less board area design.
Current-Limit Protection
The AOZX2U54QI-08 has the current-limit protection
by using Rdson of the low-side MOSFET to be as
current sensing. To detect real current information, a
minimum constant off (300nS typical) is
implemented after a constant-on time. If the current
exceeds the current-limit threshold, the PWM
controller is not allowed to initiate a new cycle. The
actual peak current is greater than the current-limit
threshold by an amount equal to the inductor ripple
current. Therefore, the exact current-limit
characteristic and maximum load capability are a
function of the inductor value and input and output
voltages. The current limit will keep the low-side
MOSFET on and will not allow another high-side on-
time, until the current in the low-side MOSFET
reduces below the current limit.
After 8 switching cycles, the AOZX2U54QI-08
considers this is a true failed condition and thus
turns-off both high-side and low-side MOSFETs and
shuts down. The AOZX2U54QI-08 enters hiccup
mode to periodically restart the part. When the
current limit protection is removed, the
AOZX2U54QI-08 exits hiccup mode.
Output Voltage Under-voltage Protection
If the output voltage is lower than 70% by over-
current or short circuit, AOZX2U54QI-08 will wait for
32us (typical) and turns-off both high-side and low-
side MOSFETs and shuts down. When the output
voltage under-voltage protection is removed, the
AOZX2U54QI-08 restarts again.
Output Voltage Over-voltage Protection
The threshold of OVP is set 20% higher than 0.8V.
When the VFB voltage exceeds the OVP threshold,
high-side MOSFET is turn-off and low-side
MOSFETs is turn-on 1uS, then shuts down. When
the output voltage over-voltage protection is
removed, the AOZX2U54QI-08 restarts again.
Power Good Output
The power good (PGOOD) output, which is an open
drain output, requires the pull-up resistor. When the
output voltage is 15% below than the nominal
regulation voltage for, the PGOOD is pulled low.
When the output voltage is 20% higher than the
nominal regulation voltage, the PGOOD is also pull
low.
When combined with the under-voltage-protection
circuit, this current-limit method is effective in almost
every circumstance.
Application Information
The basic AOZX2U54QI-08 application circuit is
shown in the first page. Component selection is
explained below.
Input capacitor
The input capacitor must be connected to the IN
pins and PGND pin of the AOZX2U54QI-08 to
maintain steady input voltage and filter out the
pulsing input current. A small decoupling capacitor,
usually 4.7µF, should be connected to the VCC pin
and AGND pin for stable operation of the
AOZX2U54QI-08. The voltage rating of input
capacitor must be greater than maximum input
voltage plus ripple voltage.
The input ripple voltage can be approximated by
equation below:
IN
O
IN
O
IN
O
IN V
V
V
V
Cf I
V
)1(
AOZX2U54QI-08
Rev. 0.1 July 2017 www.aosmd.com 10
Since the input current is discontinuous in a buck
converter, the current stress on the input capacitor is
another concern when selecting the capacitor. For a
buck circuit, the RMS value of input capacitor current
can be calculated by:
)1(
_IN
O
IN
O
ORMSCIN V
V
V
V
II
if let m equal the conversion ratio:
The relation between the input capacitor RMS
current and voltage conversion ratio is calculated
and shown in Figure. 3. It can be seen that when VO
is half of VIN, CIN is under the worst current stress.
The worst current stress on CIN is 0.5·IO.
Figure 3. ICIN vs. Voltage Conversion Ratio.
For reliable operation and best performance, the
input capacitors must have current rating higher than
ICIN-RMS at worst operating conditions. Ceramic
capacitors are preferred for input capacitors
because of their low ESR and high ripple current
rating. Depending on the application circuits, other
low ESR tantalum capacitor or aluminum electrolytic
capacitor may also be used. When selecting ceramic
capacitors, X5R or X7R type dielectric ceramic
capacitors are preferred for their better temperature
and voltage characteristics. Note that the ripple
current rating from capacitor manufactures is based
on certain amount of life time. Further de-rating may
be necessary for practical design requirement.
Inductor
The inductor is used to supply constant current to
output when it is driven by a switching voltage. For
given input and output voltage, inductance and
switching frequency together decide the inductor
ripple current, which is,
)1(
IN
OO
LV
V
LfV
I
The peak inductor current is:
2L
OLpeak I
II
High inductance gives low inductor ripple current but
requires larger size inductor to avoid saturation. Low
ripple current reduces inductor core losses. It also
reduces RMS current through inductor and switches,
which results in less conduction loss. Usually, peak
to peak ripple current on inductor is designed to be
30% to 50% of output current.
When selecting the inductor, make sure it is able to
handle the peak current without saturation even at
the highest operating temperature.
The inductor takes the highest current in a buck
circuit. The conduction loss on inductor needs to be
checked for thermal and efficiency requirements.
Surface mount inductors in different shape and
styles are available from Coilcraft, Elytone and
Murata. Shielded inductors are small and radiate
less EMI noise. But they cost more than unshielded
inductors. The choice depends on EMI requirement,
price and size.
Output Capacitor
The output capacitor is selected based on the DC
output voltage rating, output ripple voltage
specification and ripple current rating.
The selected output capacitor must have a higher
rated voltage specification than the maximum
desired output voltage including ripple. De-rating
needs to be considered for long term reliability.
Output ripple voltage specification is another
important factor for selecting the output capacitor. In
a buck converter circuit, output ripple voltage is
determined by inductor value, switching frequency,
output capacitor value and ESR. It can be calculated
by the equation below:
m
V
V
IN
O
0 0.5 1
0
0.1
0.2
0.3
0.4
0.5
0.5
0
ICIN_RMS m( )
IO
10 m
AOZX2U54QI-08
Rev. 0.1 July 2017 www.aosmd.com 11
)
81
(
O
COLO Cf
ESRIV
where CO is output capacitor value and ESRCO is the
Equivalent Series Resistor of output capacitor.
When low ESR ceramic capacitor is used as output
capacitor, the impedance of the capacitor at the
switching frequency dominates. Output ripple is
mainly caused by capacitor value and inductor ripple
current. The output ripple voltage calculation can be
simplified to:
O
LO Cf
IV
81
If the impedance of ESR at switching frequency
dominates, the output ripple voltage is mainly
decided by capacitor ESR and inductor ripple
current. The output ripple voltage calculation can be
further simplified to:
COLO ESRIV
For lower output ripple voltage across the entire
operating temperature range, X5R or X7R dielectric
type of ceramic, or other low ESR tantalum are
recommended to be used as output capacitors.
In a buck converter, output capacitor current is
continuous. The RMS current of output capacitor is
decided by the peak to peak inductor ripple current.
It can be calculated by:
12
_L
RMSCO I
I
Usually, the ripple current rating of the output
capacitor is a smaller issue because of the low
current stress. When the buck inductor is selected to
be very small and inductor ripple current is high,
output capacitor could be overstressed.
Thermal management and layout
consideration
In the AOZX2U54QI-08 buck regulator circuit, high
pulsing current flows through two circuit loops. The
first loop starts from the input capacitors, to the VIN
pin, to the LX pins, to the filter inductor, to the output
capacitor and load, and then return to the input
capacitor through ground. Current flows in the first
loop when the high side switch is on. The second
loop starts from inductor, to the output capacitors
and load, to the low side switch. Current flows in the
second loop when the low side low side switch is on.
In PCB layout, minimizing the two loops area
reduces the noise of this circuit and improves
efficiency. A ground plane is strongly recommended
to connect input capacitor, output capacitor, and
PGND pin of the AOZX2U54QI-08.
In the AOZX2U54QI-08 buck regulator circuit, the
major power dissipating components are the
AOZX2U54QI-08 and the output inductor. The total
power dissipation of converter circuit can be
measured by input power minus output power.
OOININlosstotal IVIVP
_
The power dissipation of inductor can be
approximately calculated by DCR of inductor and
output current.
1.1
2
_ inductorOlossindcutor RIP
The actual junction temperature can be calculated
with power dissipation in the AOZX2U54QI-08 and
thermal impedance from junction to ambient.
JAlossinductorlosstotaljunction PPT )( __
The maximum junction temperature of
AOZX2U54QI-08 is 150ºC, which limits the
maximum load current capability.
The thermal performance of the AOZX2U54QI-08 is
strongly affected by the PCB layout. Extra care
should be taken by users during design process to
ensure that the IC will operate under the
recommended environmental conditions.
AOZX2U54QI-08
Rev. 0.1 July 2017 www.aosmd.com 12
Layout Considerations
Several layout tips are listed below for the best
electric and thermal performance.
1. The LX pins and pad are connected to internal
low side switch drain. They are low resistance
thermal conduction path and most noisy
switching node. Connected a large copper plane
to LX pin to help thermal dissipation.
2. The IN pins and pad are connected to internal
high side switch drain. They are also low
resistance thermal conduction path. Connected
a large copper plane to IN pins to help thermal
dissipation.
3. Input capacitors should be connected to the IN
pin and the PGND pin as close as possible to
reduce the switching spikes.
4. Decoupling capacitor CVCC should be connected
to VCC and AGND as close as possible.
5. Voltage divider R1 and R2 should be placed as
close as possible to FB and AGND.
6. Keep sensitive signal traces such as feedback
trace far away from the LX pins.
7. Pour copper plane on all unused board area and
connect it to stable DC nodes, like VIN, GND or
VOUT.
1
2
3
4
5
6
PGOOD
FB
AGND
NC
NC
AIN
7
9
10
IN
IN
18
19
20
21
16
15
13
12
LX
LX
LX
PGND
PGND
IN
22
14
PGND
8IN
LX
11
LX
17
PGND
LX
EN
BST
VCC
SS
VOUT
Cout
L
CVCC Cb
VOUT
R1
R2
Cin
VIN
PGND
AOZX2U54QI-08
Rev. 0.1 July 2017 www.aosmd.com 13
Package Outline