Features
1 of 12
Optimum Technology
Matching® Applied
GaAs HBT
InGaP HBT
GaAs MESFET
SiGe BiCMOS
Si BiCMOS
SiGe HBT
GaAs pHEMT
Si CMOS
Si BJT
GaN HEMT
RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trade-
mark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc.
Product Description
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
InP HBT
LDMOS
RF MEMS
FPD750SOT89E
LOW-NOISE HIGH-LINEARITY PACKAGED
pHEMT
The FPD750SOT89CE is a packaged depletion mode AlGaAs/InGaAs pseudomor-
phic High Electron Mobility Transistor (pHEMT). It features a 0.25mx1500m
Schottky barrier gate, defined by high-resolution stepper-based photolithography.
The double recessed gate structure minimizes parasitics to optimize performance.
The epitaxial structure is designed for improved linearity over a range of bias condi-
tions and input power levels.
25dBm Output Power (P1dB)
18dB Small-Signal Gain
(SSG)
0.6dB Noise Figure
39dBm OIP3
55% Power-Added Efficiency
FPD750SOT89CE: RoHS
Compliant (Directive
2002/95/EC)
Applications
Drivers or Output Stages in
PCS/Cellular Base Station
Transmitter Amplifiers
High Intercept-point LNAs
WLL, WLAN, and Other Types
of Wireless Infrastructure
Systems.
DS110331
Package Style: SOT89
FPD750SOT89
E Low-Noise
High-Linearity
Packaged
pHEMT
Parameter Specification Unit Condition
Min. Typ. Max.
P1dB Gain Compression 23 25 dBm VDS=5 V, IDS=50% IDSS
Small-Signal Gain (SSG) 16.5 18 dB VDS=5V, IDS =50% IDSS
PAE 50 % VDS=5V, IDS=50% IDSS, POUT =P1dB
Noise Figure (NF) 0.8 1.0 dB VDS=5V, IDS=50%
0.6 dB VDS=5V, IDS=25%
OIP336 38 dBm VDS =5V, IDS =50% IDSS. Matched for optimal
power.
39 dBm Matched for best IP3
Saturated Drain-Source Current (IDSS) 185 230 280 mA VDS= 1.3V, VGS =0V
Maximum Drain-Source Current
(IMAX)375 mA VDS=1.3V, VGS +1V
Transconductance (GM) 200 ms VDS =1.3V, VGS =0V
Gate-Source Leakage Current (IGSO) 1 15 AV
GS=-5V
Pinch-Off Voltage (VP) |0.7| |1.0| |1.3| V VDS= 1.3V, IDS=0.75mA
Gate-Source Breakdown Voltage
(VBDGS)|12| |16| V IGS=0.75mA
Gate-Drain Breakdown Voltage
(VBDGD)|12| |16| V IGD=0.75mA
Thermal Resistivity (JC) * 83 C/W
*Note: TAMBIENT= 22 °C, RF specifications measured at f=1850MHz using CW signal (except as noted).
2 of 12 DS110331
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT89E
Biasing Guidelines
Active bias circuits provide good performance stabilization over variations of operating temperature, but require a larger num-
ber of components compared to self-bias or dual-biased. Such circuits should include provisions to ensure that gate bias is
applied before drain bias, otherwise the pHEMT may be induced to self-oscillate.
Dual-bias circuits are relatively simple to implement, but will require a regulated negative voltage supply for depletion-mode
devices.
For standard Class A operation, an operating point of 50% of IDSS is recommended. A small amount of RF gain expansion prior
to the onset of compression is normal for this operating point. A class A/B Bias of 25% to 33% of IDSS to achieve better OIP3
and Noise Figure performance is suggested.
Absolute Maximum Ratings1
Parameter Rating Unit
Drain-Source Voltage (VDS)
(-3V<VGS <0.5V)
8V
Gate-Source Voltage (VGS)
(0V<VDS <+8V)
-3 V
Drain-Source Current (IDS)
(For VDS>2V)
IDSS
Gate Current (IG) (Forward or reverse) 7.5 mA
RF Input Power (PIN)2
(Under any acceptable bias state)
175 mW
Channel Operating Temperature (TCH)
(Under any acceptable bias state)
175 °C
Storage Temperature (TSTG)
(Non-Operating Storage)
-55 to 150 °C
Total Power Dissipation (PTOT)3, 4 1.8 W
Gain Compression
(Under bias conditions) 5dB
Simultaneous Combination of Limits6
(2 or more max. limits)
Notes:
1TAMBIENT =22°C unless otherwise noted; exceeding any one of these absolute max-
imum ratings may cause permanent damage to the device.
2Max. RF input limit must be further limited if input VSWR>2.5:1.
3Users should avoid exceeding 80% of 2 or more Limits simultaneously.
4Total Power Dissipation (PTOT) defined as (PDC +PIN)–POUT, where PDC: DC Bias
Power, PIN: RF Input Power, POUT: RF Output Power.
Total Power Dissipation to be de-rated as follows above 22°C:
PTOT =1.8-(0.012W/°C)xTPACK, where TPACK =source tab lead temperature
above 22°C. (Coefficient of de-rating formula is Thermal Conductivity.)
Exampe: For a 65°C carrier temperature: PTOT =1.8W - (0.012x(65- 22))=1.28W
Caution! ESD sensitive device.
Exceeding any one or a combination of the Absolute Maximum Rating conditions may
cause permanent damage to the device. Extended application of Absolute Maximum
Rating conditions to the device may reduce device reliability. Specified typical perfor-
mance or functional operation of the device under Absolute Maximum Rating condi-
tions is not implied.
The information in this publication is believed to be accurate and reliable. However, no
responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any
infringement of patents, or other rights of third parties, resulting from its use. No
license is granted by implication or otherwise under any patent or patent rights of
RFMD. RFMD reserves the right to change component circuitry, recommended appli-
cation circuitry and specifications at any time without prior notice.
RFMD Green: RoHS compliant per EU Directive 2002/95/EC, halogen free
per IEC 61249-2-21, < 1000ppm each of antimony trioxide in polymeric
materials and red phosphorus as a flame retardant, and <2% antimony in
solder.
3 of 12DS110331
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT89E
Frequency Response
Temperature Response
Note: Device tuned for minimum noise figure.
0. 5 1. 5 2. 5 3 .5 4. 5 5. 5 6 .5 7 .5 8
Frequency (GHz)
Biased @ 5V 50%I DSS
0
5
10
15
20
25
30
35
Mag S21 & MSG
MS G
S21
Bias ed @ 5V, 1 00 mA
0
0.2
0.4
0.6
0.8
1
1.2
0. 5
0.9
1.3
1.7
2.1
2.5
2.9
3. 3
3.7
4.1
4.5
4.9
5.3
5.7
Freq ue ncy ( GHz)
Noise Figure (dB)
N.F. (dB)
Note: Data taken on evaluation board tuned for maximum power. Acheivable noise figure is lower when optimized.
B iased @ 5V,50%IDSS
D ata take n on Ev al Board at 1.85GH z
14.0
15.0
16.0
17.0
18.0
19.0
20.0
-20
-10
0
10
20
30
40
50
60
70
80
90
Temperature (C)
SSG (dB)
16.0
17.0
18.0
19.0
20.0
21.0
22.0
23.0
24.0
25.0
26.0
P1dB (dBm
)
SSG (dB)
P1dB (dBm)
Biased @ 5V, 33%IDSS
Data taken on Eval board @ 1.85GHz
0.40
0.60
0.80
1.00
1.20
1.40
1.60
1.80
-20
-10
0
10
20
30
40
50
60
70
80
90
Temp erat ure (C)
Noise Fig ure (dB)
N.F. (dB)
4 of 12 DS110331
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT89E
Typical Tuned RF Performance
Note: Typical power and efficiency is shown above. The devices were biased nominally
at VDS=5V, IDS=50% of IDSS, at a test frequency of 1.85GHz. The test devices were
tuned (input and output tuning) for maximum output power at 1dB gain compression.
Power Transfer Characteristic
VD S = 5V I D S = 50 % I D SS a t f = 1.85 GHz
22 .0
22 .5
23 .0
23 .5
24 .0
24 .5
25 .0
25 .5
26 .0
45678 9101112
Input Power (dB m)
Ou tp u t P o we r (d Bm )
-0 . 50
0.0 0
0.5 0
1.0 0
1.5 0
2.0 0
2.5 0
3.0 0
3.5 0
Ga in Compre ss ion ( dB)
Pout (dBm) Comp Point
Drain Effi ciency and PAE
10. 0%
20. 0%
30. 0%
40. 0%
50. 0%
60. 0%
1357911
In pu t P o we r (d B m )
PA E (%
)
10 .0%
20 .0%
30 .0%
40 .0%
50 .0%
60 .0%
Drain Efficiency (%
PA E Eff.
V
DS = 5V IDS = 50% I DS S at f = 1.85GHz
3rd Order I M Products (dBc)
DC IV Cu r ves FPD 75 0SO T8 9
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.0 0.5 1.01.52.02.53.03.54.04.55.05.56.0
Drain-So urce Vo ltage (V)
Drai n-Sour ce Curren t (A
)
VG= -1.50
VG= -1.25V
VG= -1.00V
VG= -0.75V
VG= -0.50V
VG= -0.25V
VG= 0V
Note: pHEMT devices have enhanced intermodulation per-
formance. This yields OIP3 values of about
P1dB+14dBm.This IMD enhancement is affected by the
quiescent bias and the matching applied to the device.
Note: The recommended method for measuring IDSS, or
any particular IDS, is to set the Drain-Source voltage (VDS)
at 1.3V. This measurement point avoids the onset of spuri-
ous self-oscillation which would normally distort the cur-
rent measurement (this effect has been filtered from the I-
V curves presented above). Setting the VDS>1.3V will gen-
erally cause errors in the current measurements, even in
stabilized circuits.
5 of 12DS110331
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT89E
Typical Output Plane Power Contours
(VDS=5V, IDS=50% IDSS)
Typical Scattering Parameters
(50 System)
1850 MHz
Contours swept with a constant input power, set so that optimum P1dB is
achieved at the point of output match.
Input (Source plane) s:
0.50142.8º
0.37+ j0.35 (normalized)
18.5-j17.5
Nominal IP3 performance is obtained with this input plane match, and
the output plane match as shown.
900 MHz
Contours swept with a constant input power, set so that optimum P1dB is
achieved at the point of output match.
Input (Source plane) s:
0.7936.9º
1.0+j2.6 (normalized)
50+j130
Nominal IP3 performance is obtained with this input plane match, and
the output plane match as shown.
0
1.0 1.0-1.0
10.0
10.0
-10.0
5.0
5.0
-5.0
2.0
2.0
-2.0
3.0
3.0
-3.0
4.0
4.0
-4.0
0.2
0.2
-0.2
0. 4
0.4
-0.4
0.6
0.6
-0.6
0.8
0.8
-0.8
F PD750SOT89 POWER CONTU ORS 900MHz
Swp Max
151
Swp Min
1
24 dB m
23dBm 22dBm
21d Bm
20dBm
19 dB m
25dBm
0
1. 0 1.0-1. 0
10.0
10
.0
-1
0.0
5. 0
5.
0
-5
.
0
2.0
2.
0
-2
.0
3.0
3.0
-3.
0
4.0
4
.0
-
4.
0
0. 2
0.
2
-0
.2
0.4
0.
4
-0
.4
0. 6
0
.6
-
0.
6
0. 8
0.8
-0.
8
FPD750SOT89 5V / 50%IDSS
Sw p Max
8GH z
Sw p Min
0. 5 G Hz
S11 1 GHz
1. 5 G Hz
2 GHz
2. 5 GH z
3 GH z
3.5 GHz
4 GHz
5 GH z 6 GHz
7 GHz
0
1. 0 1. 0-1 . 0
10.0
1
0.
0
-
10
.0
5.0
5.0
-5.
0
2.0
2.
0
-2
.0
3. 0
3.0
-3.
0
4.0
4.
0
-4
.0
0. 2
0.
2
-0
.2
0. 4
0
.4
-
0.4
0. 6
0
.6
-
0.6
0. 8
0.
8
-0
.8
FPD750SOT89 5V / 5 0%IDSS
Swp Max
8GHz
Swp Min
0.5GHz
S22
1 G Hz
2 G H z
3 GHz
4 GHz
5 GHz
6 GHz 7 G Hz
6 of 12 DS110331
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT89E
Reference Design (0.9GHz)
Note: OIP3 measured at 10dBm per tone.
Evaluation Board Layout
Component Values
Evaluation board material: 31mil thick FR4 with 1/2oz.
Cu on both sides.
DC-blocking capacitors are ATC series 600S. A tantalum
1.0µF is used at the drain terminal. All other capacitors
are 0603 and 0805 standard chip capacitors. A 0603
size 20 chip resistor from Vishay is used on the gate DC
bias line for stability.
Parameter Typical Unit
Gain 23 dB
P1dB 23.5 dBm
OIP335 dBm
NF 0.6 dB
S11 -5 dB
S22 -20 dB
VD5V
VG-0.4 to -0.6 V
ID100 mA
Component Value Description
Lg 56nH LL 1608 Toko chip inductor
Ld 56nH LL 1608 Toko chip inductor
L1 12nH LL 1608 Toko chip inductor
L2 6.8nH LL 1608 Toko chip inductor
C1 0.5pF ATC 600S chip capacitor
C2 1.2pF ATC 600S chip capacitor
0 .0 1uF
C1 C2
0.01uF
Q1Q1
3 3pF L1
33 pF
20O
L2 33 pF
3 3pF
1.0uF
+
+
Vg Vd
Lg Ld
1.45"
0.63"
33pF 33pF
20 Ohm
33pF
33pF
0.01uF
0. 01uF 1.0uF
Vd
-Vg
FPD750SOT89 EVAL Board
Schematic
56 nH 56 nH
L1 L2
C2
C1
@ 0.9GHz
RF IN RF OUT
7 of 12DS110331
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT89E
Reference Design (1.85 GHz)
Note: OIP3 measured at 10dBm per tone.
Evaluation Board Layout
Component Values
Evaluation board material: 31mil thick FR4 with 1/2 oz.
Cu on both sides.
DC-blocking capacitors are ATC series 600S. A tantalum
1.0µF is used at the drain terminal. All other capacitors
are 0603 and 0805 standard chip capacitors. A 0603
size 20 chip resistor from Vishay is used on the gate DC
bias line for stability.
Parameter Typical Unit
Gain 17.2 dB
P1dB 24 dBm
OIP335 dBm
NF 0.7 dB
S11 -5 dB
S22 -10 dB
VD5V
VG-0.4 to -0.6 V
ID100 mA
Component Value Description
Lg 27nH LL 1608 Toko chip inductor
Ld 27nH LL 1608 Toko chip inductor
L1 6.8nH LL 1608 Toko chip inductor
L2 1.8nH LL 1608 Toko chip inductor
C1 2.7pF ATC 600S chip capacitor
C2 0.5pF ATC 600S chip capacitor
0.01u F
3 3pF
0.01u F
C2
3 3pF
20
O
C133 pF
L1
L2
Q1Q1
33p F +
+1.0uF
Vg Vd
Lg Ld
1.45"
0.63"
33pF 33pF
20 O h m
33p F
33pF
0.01uF
0.01uF 1.0uF
Vd-Vg
FPD750SOT89 EVAL Board
Schematic
27 nH 27 nH
C1 L2
C2
@ 1.85GHz
RF IN RF OU T
L1
8 of 12 DS110331
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT89E
Reference Design (2.4GHz to 2.6GHz)
Note: OIP3 measured at 10dBm per tone.
Evaluation Board Layout
Component Values
Evaluation board material: 31mil thick FR4 with 1/2oz.
Cu on both sides.
DC-blocking capacitors are ATC series 600S. A tantalum
1.0µF is used at the drain terminal. All other capacitors
are 0603 and 0805 standard chip capacitors. A 0603
size 20 chip resistor from Vishay is used on the gate DC
bias line for stability.
Frequency 2.4 2.5 2.6 Unit
SSG 15.4 15.2 15.0 dB
P1dB 24.3 24.3 24.4 dBm
OIP334.0 35.0 34.0 dBm
NF 0.95 0.95 1.0 dB
S11 -5.0-5.5-6.0 dB
S22 -9.5 -10.0 -10.0 dB
VD5V
VG-0.4 to -0.6 V
ID100 mA
Component Value Description
Lg 22nH LL 1608 Toko chip inductor
Ld 22nH LL 1608 Toko chip inductor
L1 8.2nH LL 1005 Toko chip inductor
C1 2.0pF ATC 600S chip capacitor
C2 0.8pF ATC 600S chip capacitor
Tab Copper tab (no component)
Tab
Q1
C133 pF
L1
0. 0 1u F
Lg
20O
33pF
33 pF
33pF
C2
+
0.01uF
Ld
+1.0uF
Vg Vd
1.45"
0.63"
33pF 33pF
20 Ohm
33pF
33pF
0. 01u F
0.01uF 1.0uF
Vd-VgFPD750SOT89 EVAL Board
Sc hema tic
22 nH 22 nH
C1
RF I N RF OUT
@2.4 to 2.6GHz
L1
C2
9 of 12DS110331
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT89E
Statistical Sample of RF Performance
Note: The devices were tested by a high-speed automatic test system in a matched circuit based on an evalu-
ation board design. This circuit is a dual-bias, single-pole, low-pass topology, and the devices were biased at
VDS=4.0V, IDS=100mA, test frequency=2.0GHz.
Small Si gn al Gain
0
20 00
40 00
60 00
80 00
10000
12000
14000
16000
18000
15
15.4
15.8
16.2
16.6
17
17.4
17.8
18.2
18.6
19
19.4
19.8
More
SSG (dB)
Fr eq ue ncy
No ise F igure
0
100 0
200 0
300 0
400 0
500 0
600 0
0.5
0.58
0.66
0.74
0.82
0.9
0.98
1.06
1.14
1.22
1.3
NF ( dB)
Frequency
Output Power at 1dB gain
Compression
0
2000
4000
6000
8000
10000
20
20.6
21.2
21.8
22.4
23
23.6
24.2
24.8
P1dB (dBm)
Frequenc
y
Output 3rd Order Intercept Point
0
1000
2000
3000
4000
5000
6000
7000
8000
9000
10000
25
26
28
29
31
32
34
35
37
38
40
OIP3 - (dBm)
Frequency
10 of 12 DS110331
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT89E
S-Parameters
(Biased @ 5V, 50% IDSS)
FREQ[GHz] S11m S11a S21m S21a S12m S12a S22m S22a
0.050 0.998 -5.6 19.465 172.4 0.003 94.4 0.448 -8.1
0.300 0.959 -30.9 16.931 154.5 0.016 77.5 0.438 -20.6
0.550 0.868 -52.5 15.126 137.7 0.028 64.7 0.406 -37.7
0.800 0.809 -72.3 13.452 124.3 0.038 55.2 0.379 -51.8
1.050 0.755 -90.2 12.024 112.1 0.046 47.2 0.352 -64.3
1.300 0.713 -106.5 10.762 101.4 0.052 40.7 0.324 -74.4
1.550 0.679 -121.5 9.707 91.8 0.057 35.1 0.294 -83.0
1.800 0.653 -135.6 8.828 82.7 0.062 29.2 0.267 -91.1
2.050 0.634 -148.8 8.080 74.1 0.066 24.3 0.241 -98.8
2.300 0.62 -161.8 7.441 66.0 0.069 19.4 0.214 -106.3
2.550 0.613 -173.5 6.890 58.1 0.073 14.9 0.188 -115.6
2.800 0.603 175.0 6.407 50.2 0.076 10.5 0.169 -125.9
3.050 0.611 164.6 5.948 43.0 0.078 6.0 0.14 -140.7
3.300 0.614 154.5 5.557 35.7 0.080 2.2 0.123 -156.6
3.550 0.619 145.1 5.194 28.7 0.082 -2.4 0.113 -175.2
3.800 0.627 136.2 4.873 21.9 0.084 -6.0 0.11 164.9
4.050 0.636 127.9 4.594 15.4 0.085 -10.3 0.114 146.6
4.300 0.659 119.7 4.345 8.8 0.086 -13.3 0.133 132.4
4.550 0.663 110.6 4.138 1.8 0.089 -17.5 0.138 115.2
4.800 0.666 104.1 3.892 -4.8 0.090 -21.4 0.153 107.8
5.050 0.68 96.9 3.690 -11.0 0.091 -25.1 0.167 99.7
5.300 0.695 89.7 3.511 -17.4 0.092 -29.2 0.182 92.6
5.550 0.706 82.6 3.342 -23.7 0.093 -32.6 0.196 85.4
5.800 0.719 75.9 3.190 -30.1 0.094 -36.8 0.208 78.5
6.050 0.732 69.2 3.041 -36.5 0.095 -41.0 0.222 71.6
6.300 0.741 62.7 2.898 -42.8 0.096 -45.1 0.237 65.0
6.550 0.754 56.9 2.766 -49.1 0.096 -49.1 0.252 58.0
6.800 0.766 51.1 2.634 -55.3 0.095 -53.0 0.27 51.3
7.050 0.779 45.4 2.507 -61.6 0.095 -57.4 0.291 44.6
7.300 0.793 39.9 2.387 -67.8 0.095 -61.4 0.314 38.5
7.550 0.809 34.4 2.267 -73.9 0.093 -65.7 0.337 33.2
7.800 0.823 28.9 2.151 -79.9 0.092 -70.0 0.363 28.4
8.050 0.839 23.6 2.036 -85.7 0.091 -74.0 0.387 24.3
8.300 0.851 18.8 1.925 -91.3 0.089 -78.3 0.412 20.3
8.550 0.86 14.2 1.825 -96.7 0.087 -81.9 0.436 17.1
8.800 0.871 9.8 1.728 -102.0 0.084 -85.5 0.457 14.0
9.050 0.881 5.7 1.640 -106.9 0.083 -89.4 0.477 11.0
9.300 0.889 2.0 1.563 -111.8 0.082 -93.9 0.496 8.6
9.550 0.895 -1.5 1.494 -116.6 0.081 -98.4 0.514 6.0
9.800 0.904 -4.6 1.433 -121.2 0.080 -101.8 0.531 3.1
10.050 0.913 -8.3 1.384 -126.5 0.078 -107.1 0.548 -0.1
10.300 0.909 -12.0 1.323 -132.0 0.075 -111.9 0.552 -3.6
10.550 0.903 -15.2 1.264 -136.8 0.074 -116.6 0.557 -6.7
11 of 12DS110331
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT89E
Part Identification
Package Outline
Dimensions in millimeters (mm)
Tape Dimensions and Part Orientation
Tape & Reel on this material is in accordance to EIA-481-1 except where exceptions are identified.
Device Footprint
Units in inches
12 of 12 DS110331
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT89E
Preferred Assembly Instructions
This package is compatible with both lead-free and leaded solder reflow processes as defined within IPC/JEDEC J-STD-020C.
The maximum package temperature should not exceed 260°C.
Handling Precautions
To avoid damage to the devices, care should be exercised during handling. Proper Electro-
static Discharge (ESD) precautions should be observed at all stages of storage, handling,
assembly, and testing.
ESD Rating
These devices should be treated as Class 0 (0V to 250V) using the human body model as defined in JEDEC Standard No. 22-
A114. Further information on ESD control measures can be found in MIL-STD-1686 AND MIL-HDBK-263.
MSL Rating
The device has an MSL rating of Level 2. To determine this rating, preconditioning was performed to the device per the Pb-free
solder profile defined within IPC/JEDEC J-STD-020C, Moisture/Reflow sensitivity classification for non-hermetic solid state sur-
face mount devices.
Application Notes and Design Data
Application Notes and design data including S-parameters, noise parameters, and device model are available on request from
www.rfmd.com.
Reliability
An MTTF of 4.2 million hours at a channel temperature of 150°C is achieved for the process used to manufacture this device.
Disclaimers
This product is not designed for use in any space-based or life-sustaining/supporting equipment.
Ordering Information
Description Ordering Code
RoHS-Compliant Packaged pHEMT with enhanced passivation
(recommended for new designs) FPD750SOT89E
Packaged pHEMT evaluation board (2.0GHz) FPD750SOT89PCK
Delivery Quantity Ordering Code
Reel of 1000 FPD750SOT89E
Reel of 100 FPD750SOT89ESR
Bag of 25 FPD750SOT89ESQ
Bag of 5 FPD750SOT89ESB