TCM5040T CMOS Area Image Sensor TCM5040T 1/4-inch 330 k-Pixel CMOS Image Sensor with Built-in ADC for VGA The TCM5040T is a B/W CMOS image sensor with a built-in ADC for VGA. It outputs a signal for each pixel in sequence every 1/30 s. (This is known as progressive scanning.) This element is equipped with 492 vertical and 660 horizontal signal pixels, and the image size conforms to the 1/4-inch optical format. Use of the CMOS process enables low power-consumption using a single power supply voltage. The device is perfect for use as an image input device for machine vision, 2-D barcode use and surveillance camera. Weight: 0.54 g (typ.) Features * Optical size: 1/4-inch optical format * Total number of pixels: 698 (H) x 502 (V) * Number of signal pixels: 660 (H) x 492 (V) * Pixel pitch: 5.4 m (H) x 5.4 m (V) (square pixel) * Image size: 3.564 mm (H) x 2.657 mm (V) * Package: 32-pin CLCC * Color filter: N/A. Micro-lens is applicable * Frame frequency: 30 Hz * Power supply voltage: 2.8 V * Additional functions : Variable speed electronic shutter (1/30 s~1/8000 s) Internal sync. mode (command setting) 2H to 524H by 1H, 1 V to 16 V by 1H External sync. mode (ESR input) 1H to 524H by 1H, 1 V to 16 V by 1H Gain control amplifier Internal feedback clamp circuit Built-in sync. signal generator 1 2002-01-31 TCM5040T Maximum Ratings (Ta = 25C) Characteristics Symbol Rating VDVDDIO -0.5~4.4 VAVDD, VDVDD -0.5~3.7 Input voltage VIN -0.3~VDD + 0.3 V Storage temperature Tstg -30~85 C Power supply voltage Unit V Recommended Operating Conditions Characteristics Symbol Min Typ. Max VAVDD 2.6 2.8 3.0 VDVDD 2.6 2.8 3.0 VDVDDIO 2.3 2.8 3.6 Power supply voltage Unit V Input voltage VIN 0~VDVDDIO V Operating temperature Topr -20~60 C 27 26 25 24 23 22 21 VRR (VD) DSTOP TEST4 DVDDIO DATACLK DVSSO DATA9 (MSB) C2 28 ESR (STR) C3 Pin Connection (top view) and Application Circuit 29 HP (HD) 30 SGMODE AVSS DATA8 20 DATA7 19 31 TEST5 DATA6 18 32 RESET DATA5 17 1 SCLK DATA4 16 2 SDATA DATA3 15 3 EN DATA2 14 AVSS TEST3 AVDD AVSS MCK DVDD DATA0 (LSB) C3 5 6 7 8 9 10 11 12 DATA1 13 C1 C3 C2 C3 C3 4 TEST1 C2 DVDDI0 TEST2 R1 AVDD C1: 4.7 mF (aluminum electrolytic capacitor or tantalum capacitor) C2: 2.2 mF C3: 0.1 mF R1: 100 kW~1 MW Recommended output impedance of DVDD supply circuit: less than 0.5 W at 10 kHz 2 2002-01-31 TCM5040T Block Diagram The SGMODE pin can be used to select either internal or external synchronization. The SGMODE pin is pulled down. When the SGMODE pin is open, External Synchronization Mode is selected. When the SGMODE pin is High, Internal Synchronization Mode is selected. In External Synchronization Mode, the HPA and VDD sync. signals and the electronic shutter signal are input from an external source. In Internal Synchronization Mode, HD and VD sync. signals are output and the value of the electronic shutter signal must be set using a command. (i) External Synchronization Mode MPU or similar EN, SCLK, SDATA Command Decoder VREF 10-bit digital output Image Area CDS GCA AD DATACLK TG and SG MCK DATA9~DATA0 (LSB) SGMODE = L HPA, VRR, SER (ii) Internal Synchronization Mode MPU or similar EN, SCLK, SDATA Command Decoder VREF 10-bit digital output Image Area CDS GCA DATA9~DATA0 (LSB) DATACLK TG and SG MCK AD SGMODE = H HD, VD 3 2002-01-31 TCM5040T Pin Configuration Pin No. Symbol I/O Function 1 SCLK I Serial clock input for commands 2 SDATA I Serial data input for commands 3 EN I Data enable input for commands 4 TEST1 3/4 TEST terminal 3 Normally this pin is connected to AVSS (2.2 mF) via a bypass capacitor. 5 TEST2 3/4 TEST terminal 4 Normally this pin is connected to AVSS (0.1 mF) via a bypass capacitor. 6 AVSS 3/4 Analog VSS 7 TEST3 3/4 TEST terminal 5 8 AVDD 3/4 Analog power supply. VDD = 2.8 V 0.2 V 9 DVSS 3/4 Digital VSS 10 MCK I 11 DVDD 3/4 Digital power supply. 2.8 V 0.2 V 12 DATA0 I/O AD output (LSB) 13 DATA1 I/O AD output 14 DATA2 I/O AD output 15 DATA3 I/O AD output 16 DATA4 I/O AD output 17 DATA5 I/O AD output 18 DATA6 I/O AD output 19 DATA7 I/O AD output 20 DATA8 I/O AD output 21 DATA9 I/O AD output (MSB) 22 DVSSIO 3/4 Digital I/O VSS 23 DATACLK O Data clock output (half of master clock) 24 DVDDIO 3/4 Digital I/O power supply 25 TEST4 3/4 TEST terminal 1 26 DSTOP I 27 VRR (VD) I/O 28 ESR (STR) I Electrical shutter start pulse input/STR pulse output 29 HPA (HD) I/O Horizontal timing start pulse input/HD pulse output 30 SGMODE I Internal/External sync select pin Pulled low (0 V) L: HPA, VRR, ESR input H: HD, VD, STR output 31 TEST5 3/4 TEST terminal 2 Must be connected to GND 32 RESET I Parameter Mode reset input Pulled up L: Level H: Active reset Master clock input Read stop control input H: Active L: Read stop Vertical timing start pulse input/VD pulse output 4 2002-01-31 TCM5040T Optical Characteristics (Note 1) Characteristics Symbol Sensitivity Test Conditions (Note 2) Min Typ. Max Unit 250 (479 LSB) 300 (575 LSB) 3/4 mV 350 (671 LSB) 500 (959 LSB) 3/4 mV R Standard conditions Saturation voltage VSAT Saturation exposure Output Blooming margin BLM Light intensity is 500 times standard conditions (Note 3) S/N (dark) S/N Output 55 57 3/4 dB Decay lag LAG Output = 20 mV 3/4 3 (5 LSB) 7 (13 LSB) mV 3/4 No blooming Note 1: Amplifier gain setting: 1 (0dB) Actual digital output includes black level (64 LSB). Note 2: Standard conditions for measuring sensitivity * 100 nt * Other conditions are based on Note 3. Note 3: Standard conditions (TC = 60C centigrade) as follows * Light source: 3200 K, halogen light box * Optical filter: IR cut filter (cut in half at 650 nm) * Optical lense: Fujinon f = 25 mm, F number 2.8 * Standard signal level: Output = 250 mV * Driving conditions: frame rate = 30 fps, electronic shutter OFF The analog output level can be estimated as follows when a 1 gain DA converter (500 mVpp) is used. Digital (10 bits) 1023 479 Black level = 64 0 250 500 (standard) (saturation) Analog (mV) Optical lens performance influences sensor characteristics. (1) F number: Less than F2.8 is recommended to maintain a high level of sensitivity and an acceptable S/N ratio. (2) Exit pupil may influence shading level. 5 2002-01-31 TCM5040T Electrical Characteristics DC Characteristics (Ta = 25C, VDD = 2.8 V) Symbol Test Circuit High level input voltage VIH 3/4 Low level input voltage VIL 3/4 High level input current IIH 3/4 IIL 3/4 High level output voltage VOH 3/4 Low level output voltage VOL Power supply current IDD Characteristics Low level input current Test Condition Min Typ. Max Unit (Note 4) 2 3/4 3/4 V (Note 4) 3/4 3/4 0.8 V (Note 7) 150 250 (Note 4 except DSTOP) -10 10 VIN = VSS (Note 4 except SGMODE) -10 10 VIN = VSS (Note 6) -220 -80 IOH = -4 mA (Note 5) VDD -0.4 3/4 IOL = 4 mA (Note 5) 3/4 30fps VIN = VDD 3/4 3/4 mA mA V 3/4 3/4 0.4 V 3/4 21 3/4 mA Min Typ. Max Unit -10 3/4 10 -1/4 (Note 8) SCLK 3/4 1/4 SCLK Note 4: DSTOP, VRR, ESR, HPA, SGMODE, RESET, SCLK, SDATA, EN, MCK Note 5: VD, STR, HD, DATACLK, DATA0~DATA9 Note 6: DSTOP Note 7: SGMODE AC Characteristics (Ta = 25C, VDD = 2.8 V) Characteristics Timing margin for input pulse Output delay time Command clock frequency Symbol Test Circuit tm1 3/4 tm2 3/4 tm3 3/4 -1/4 SCLK 3/4 1/4 SCLK tpd1 3/4 3/4 3/4 20 tpd2 3/4 3/4 3/4 30 tpd3 3/4 3/4 12 30 fsclk 3/4 3/4 3/4 6 Test Condition Based on MCK Based on MCK, C = 15 pF (Note 9) (Note 10) ns ns MHz Note 8: DSTOP, VRR, ESR, HPA, Note 9: DATACLK, DATA0~DATA9 Note 10: SCLK 6 2002-01-31 TCM5040T Inputs/Outputs Other than Commands tm1 tm2 MCK VDD/2 VDD/2 VRR, HPA, ESR VDD/2 VDD/2 DATACLK (tpd1) VDD/2 DATACLK (tpd2) VDD/2 HD, VD (tpd3) VDD/2 Command Inputs tm2 SCLK VDD/2 EN VDD/2 SDATA VDD/2 tm3 tm2 VDD/2 7 2002-01-31 1 2 3 4 5 6 493 494 495 496 497 498 499 500 501 502 1 Starting pixel Vertical Pixel Configuration 3 4 S S S S 5 S S S S 6 S S S S S: Signal pixel Horizontal Signal pixels 8 Light-shielded pixels 660 pixels Signal pixels Light-shielded pixels are used as optical black reference. Light-shielded dummy pixels Definition of pixels 2 S S S S S S S S S S S S 492 pixels S S S S S S S S S S S S 6 pixels 30 pixels Dummy pixels 691 692 693 694 695 696 697 698 Test dummy pixels Lightshielded pixels Test dummy pixels 659 660 661 662 663 664 S S S S S S S S S S S S 2002-01-31 TCM5040T TCM5040T Command Input Timing Diagram 16SCLK (min) max: 1/4MCK (6 MHz) EN SCLK D D D D D D D D D D D D D D D D 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 SDATA Settings Item D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 Gain 0 0 0 0 MSB Data (10 bit) LSB Electronic shutter speed 1 0 1 0 MSB Data (10 bit) LSB Monitoring mode 1 1 1 1 Feed back clamp 1 1 1 1 D1 D0 Remarks 2H to 16 V 0: 30fps (default) 1: 60fps * 0: Auto (default) 1: Manual (OFF) * Examples of Gain Settings Settings Gain Factor (dB) D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 1 1 1 1 1 1 1 1 1 1 0 (default) 1 1 0 0 0 0 0 0 0 0 3 1 0 0 0 1 0 0 0 0 0 6 0 1 1 0 0 0 0 0 0 1 9 0 1 0 0 0 1 0 0 0 0 12 0 0 1 1 0 0 0 0 0 1 18 0 0 0 1 1 0 0 0 0 1 20 (recommended max) 0 0 0 1 0 0 1 1 0 1 -2.4 (min) Examples of Electronic Shutter Speed Settings on Internal Sync. Mode Settings OFF (525H) 0 0 0 0 0 0 0 0 0 0 2 (H) 0 0 0 0 0 0 0 0 0 1 3 (H) 0 0 0 0 0 0 0 0 1 0 ~ D2 ~ D3 ~ D4 ~ D5 ~ D6 ~ D7 ~ D8 ~ D9 ~ D10 ~ D11 ~ Electronic Shutter Speed (exposure time) 523 (H) 1 0 0 0 0 0 1 0 1 0 524 (H) 1 0 0 0 0 0 1 0 1 1 9 2002-01-31 Signal output ESR VRR HPA MCK Horizontal period Signal output SDATA EN SCLK Once a frame ESR (storage time) VRR HPA Effective signal 492H 489 490 491 492 493 494 Vertical period External Synchronization Mode (1 V = 525H) 178.5CK Light-shielded dummy period 2H 10 Effective signal Light-shielded period Invalid period 660 pixels 30 pixels 88 pixels Light-shielded dummy pixels Light-shielded dummy pixels Light-shielded dummy pixels 2 pixels 2 pixels 2 pixels 8CK 8CK 4CK Invalid period 31H 2H Effective signal 492H Effective signal 660 pixels 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 35H 34H 33H 32H 31H 30H 29H 28H 27H 26H 25H 24H 23H 22H 21H 20H 19H 18H 17H 16H 15H 14H 13H 12H 11H 10H 9H 8H 7H 6H 5H 4H 3H 2H 1H 651 652 653 654 655 656 657 658 659 660 661 662 TCM5040T 524H 523H 522H 521H 520H 519H 518H 517H 516H 515H 514H 513H 512H 511H 510H 509H 508H 507H 506H 505H 504H 503H 502H 501H 500H 499H 498H 497H 496H 495H 494H 2002-01-31 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 VRR HPA Signal output ESR VRR HPA MCK Horizontal period Signal output SDATA EN SCLK Once a frame ESR (storage time) Vertical period External Synchronization and Monitoring Mode (1 V = 263H) Effective signal 244H 8CK 8CK 4CK Invalid period 17H 2H Light-shielded dummy period 2H 11 Effective signal Light-shielded period Invalid period 660 pixels 30 pixels 88 period Light-shielded dummy pixels Light-shielded dummy pixels Light-shielded dummy pixels 2 pixels 2 pixels 2 pixels 651 652 653 654 655 656 657 658 659 660 661 662 TCM5040T Effective signal 244H Effective signal 660 pixels 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 36H 35H 34H 33H 32H 31H 30H 29H 28H 27H 26H 25H 24H 23H 22H 21H 20H 19H 18H 17H 16H 15H 14H 13H 12H 11H 10H 9H 8H 7H 6H 5H 4H 3H 2H 1H 454 457 458 461 462 465 466 469 470 473 474 477 478 481 482 485 486 489 490 262H 261H 260H 259H 258H 257H 256H 255H 254H 253H 252H 251H 250H 249H 248H 247H 246H 245H 244H 243H 242H 241H 240H 239H 238H 237H 236H 235H 234H 233H 232H 231H 2002-01-31 1 2 5 6 9 10 13 14 17 18 21 22 25 26 29 30 33 34 37 38 41 42 45 46 49 50 53 54 57 58 61 SDATA EN SCLK VD HD Signal output VD HD MCK Horizontal period Signal output Vertical period Effective signal 492H 39CK Invalid period 31H 26H 141CK 2H Light-shielded dummy period 2H 174CK 12 Effective signal Light-shielded period Invalid period 660 pixels 30 pixels 88 pixels Light-shielded dummy pixels Light-shielded dummy pixels Light-shielded dummy pixels 2 pixels 2 pixels 2 pixels 4H Effective signal 492H Effective signal 660 pixels 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Internal Synchronization Mode (1 V = 525H) 484 485 486 487 488 489 490 491 492 493 494 651 652 653 654 655 656 657 658 659 660 661 662 TCM5040T 2002-01-31 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 Signal output VD HD MCK Horizontal period Signal output SDATA EN SCLK VD HD Effective signal 244H 466 469 470 473 474 477 478 481 482 485 486 489 490 3H Invalid period 17H 13H 2H Light-shielded dummy period 2H Effective signal 244H 39CK 141CK 174CK 13 Effective signal Light-shielded period Invalid period 660 pixels 30 pixels 88 pixels Light-shielded dummy pixels Light-shielded dummy pixels Light-shielded dummy pixels 2 pixels 2 pixels 2 pixels 651 652 653 654 655 656 657 658 659 660 661 662 Vertical period Internal Synchronization and Monitoring Mode (1 V = 263H) 1 2 5 6 9 10 13 14 17 18 21 22 25 26 29 30 33 34 37 38 41 42 45 46 49 50 53 54 TCM5040T Effective signal 660 pixels 2002-01-31 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 TCM5040T Long Storage Mode a) External synchronization mode Intermittent of VRR pulse realize long storage mode. b) Internal synchronization mode Command setting can control long storage mode. Settings Storage Time D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 2V 1 1 0 0 0 0 0 0 0 1 3V 1 1 0 0 0 0 0 0 1 0 ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ ~ 15 V 1 1 0 0 0 0 1 1 1 0 16 V 1 1 0 0 0 0 1 1 1 1 Timing Diagram 1V 16 V 15 V 14 V 13 V 12 V 11 V 10 V 6V 5V 4V 3V 2V 1V 16 V Normal mode VRR ESR Storage time = 262 H Signal output (assumed as analog output) Long storage mode (1 V~16 V: by 1H) Example 1) VRR ESR Storage time = 1V + 262 H Signal output (assumed as analog output) Example 2) VRR ESR Storage time = 15V + 262 H Signal output (assumed as analog output) 14 2002-01-31 TCM5040T Spectral response 1.0 Relative sensitivity 0.8 0.6 0.4 0.2 0 400 500 600 700 800 Wavelength 15 900 1000 1100 1200 (nm) 2002-01-31 TCM5040T Package Dimensions Weight: 0.54 g (typ.) 16 2002-01-31 TCM5040T RESTRICTIONS ON PRODUCT USE 000707EBA * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice. 17 2002-01-31