NCP167AFCT180T2G - APTINA IMAGING

September, 2019 − Rev. 3

1Publication Order Number:

NCP167/D

NCP167

LDO Regulator - Ultra-Low

Noise, High PSRR, RF and

Analog Circuits

700 mA

The NCP167 is a linear regulator capable of supplying 700 mA

output current. Designed to meet the requirements of RF and analog

circuits, the NCP167 device provides low noise, high PSRR, low

quiescent current, and very good load/line transients. The device is

designed to work with a 1 mF input and a 1 mF output ceramic capacitor.

It is available in two thickness ultra−small 0.35P, 0.65 mm x 0.65 mm

Chip Scale Package (CSP) and XDFN4 0.65P, 1 mm x 1 mm.

Features

•Operating Input Voltage Range: 1.9 V to 5.5 V

•Available in Fixed Voltage Option: 1.8 V to 5.2 V

•±2% Accuracy Over Load/Temperature

•Ultra Low Quiescent Current Typ. 12 mA

•Standby Current: Typ. 0.1 mA

•Very Low Dropout: 210 mV at 700 mA

•Ultra High PSRR: Typ. 85 dB at 20 mA, f = 1 kHz

•Ultra Low Noise: 8.5 mVRMS

•Stable with a 1 mF Small Case Size Ceramic Capacitors

•Available in −WLCSP4 0.65 mm x 0.65 mm x 0.33 mm

−XDFN4 1 mm x 1 mm x 0.4 mm

•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Typical Applications

•Battery−powered Equipment

•Wireless LAN Devices

•Smartphones, Tablets

•Cameras, DVRs, STB and Camcorders

GND

OUT

OFF

Figure 1. Typical Application Schematics

VOUT

COUT

1 mF

Ceramic

VIN

NCP167

CIN

1 mF

Ceramic

www.onsemi.com

See detailed ordering and shipping information on page 10 of

this data sheet.

ORDERING INFORMATION

PIN CONNECTIONS

A1 A2

B1 B2

IN OUT

EN GND

(Top View)

MARKING

DIAGRAMS

X or XX = Specific Device Code

M = Date Code

XDFN4

CASE 711AJ

WLCSP4

CASE 567JZ

1XX M

X M

NCP167

www.onsemi.com

Figure 2. Simplified Schematic Block Diagram

THERMAL

SHUTDOWN

MOSFET

DRIVER WITH

CURRENT LIMIT

INTEGRATED

SOFT−START

BANDGAP

REFERENCE

ENABLE

LOGIC

OUT

GND

* ACTIVE DISCHARGE

Version A only

PIN FUNCTION DESCRIPTION

Pin No.

CSP4

Pin No.

XDFN4

Name Description

A1 4 IN Input voltage supply pin

A2 1 OUT Regulated output voltage. The output should be bypassed with small 1 mF ceramic capacitor.

B1 3 EN Chip enable: Applying VEN < 0.4 V disables the regulator, Pulling VEN > 1.2 V enables the LDO.

B2 2 GND Common ground connection

−EPAD EPAD Expose pad should be tied to ground plane for better power dissipation

ABSOLUTE MAXIMUM RATINGS

Rating Symbol Value Unit

Input Voltage (Note 1) VIN −0.3 V to 6V

Output Voltage VOUT −0.3 to VIN + 0.3, max. 6 V V

Chip Enable Input VCE −0.3 to VIN + 0.3, max. 6 V V

Output Short Circuit Duration tSC unlimited s

Maximum Junction Temperature TJ150 °C

Storage Temperature TSTG −55 to 150 °C

ESD Capability, Human Body Model (Note 2) ESDHBM 2000 V

ESD Capability, Machine Model (Note 2) ESDMM 200 V

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.

2. This device series incorporates ESD protection and is tested by the following methods:

ESD Human Body Model tested per EIA/JESD22−A114

ESD Machine Model tested per EIA/JESD22−A115

Latchup Current Maximum Rating tested per JEDEC standard: JESD78.

THERMAL CHARACTERISTICS

Rating Symbol Value Unit

Thermal Characteristics, WLCSP4 (Note 3)

Thermal Resistance, Junction−to−Air

RqJA

108

°C/W

Thermal Characteristics, XDFN4 (Note 3)

Thermal Resistance, Junction−to−Air 198

3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7

NCP167

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ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 125°C; VIN = VOUT(NOM) + 1 V; IOUT = 1 mA, CIN = COUT = 1 mF, unless otherwise

noted. VEN = 1.2 V. Typical values are at TJ = +25°C (Note 4).

Parameter Test Conditions Symbol Min Typ Max Unit

Operating Input Voltage VIN 1.9 5.5 V

Output Voltage Accuracy (Note 5) VIN = VOUT(NOM) + 1 V to 5.5 V

0 mA ≤ IOUT ≤ 700 mA VOUT −2 +2 %

Line Regulation VOUT(NOM) + 1 V ≤ VIN ≤ 5.5 V LineReg 0.02 %/V

Load Regulation IOUT = 1 mA to

700 mA

WLCSP4

LoadReg

0.001

%/mA

XDFN4 0.002

Dropout Voltage (Note 6) IOUT = 700 mA VOUT(NOM) = 1.8 V

VDO

315 450

VOUT(NOM) = 3.3 V 190 290

Output Current Limit VOUT = 90% VOUT(NOM) ICL 800 1000

Short Circuit Current VOUT = 0 V ISC 1050

Quiescent Current IOUT = 0 mA IQ9.7 18 mA

Shutdown Current VEN ≤ 0.4 V, VIN = 4.8 V IDIS 0.01 1 mA

EN Pin Threshold Voltage EN Input Voltage “H” VENH 1.2

EN Input Voltage “L” VENL 0.4

EN Pull Down Current VEN = 4.8 V IEN 0.2 0.5 mA

Turn−On Time COUT = 1 mF, From assertion of VEN to

VOUT = 95% VOUT(NOM) 120 ms

Power Supply Rejection Ratio VOUT(NOM) = 3.3 V,

IOUT = 20 mA

f = 100 Hz

f = 1 kHz

f = 10 kHz

f = 100 kHz

PSRR

Output Voltage Noise f = 10 Hz to 100 kHz IOUT = 20 mA VN8.5 mVRMS

Thermal Shutdown Threshold Temperature rising TSDH 160 °C

Temperature falling TSDL 140 °C

Active output discharge resistance VEN < 0.4 V, Version A only RDIS 280 W

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C.

Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.

5. Respect SOA.

6. Dropout voltage is characterized when VOUT falls 100 mV below VOUT(NOM).

NCP167

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TYPICAL CHARACTERISTICS

Figure 3. Output Voltage vs. Temperature −

VOUT = 2.85 V

Figure 4. Quiescent Current vs. Input Voltage

TJ, JUNCTION TEMPERATURE (°C) VIN, INPUT VOLTAGE (V)

120806040200−20−40

2.80

2.81

2.83

2.90

5.04.03.53.02.01.00.50

Figure 5. Ground Current vs. Output Current Figure 6. Dropout Voltage vs. Output Current −

VOUT = 1.8 V

IOUT

, OUTPUT CURRENT (mA) IOUT

, OUTPUT CURRENT (A)

10001001010.10.010.001

200

400

600

1000

1200

1600

1800

0.70.60.50.40.30.20.10

0.05

0.10

0.20

0.30

0.35

0.40

0.50

Figure 7. Dropout Voltage vs. Output Current −

VOUT = 2.85 V

Figure 8. Dropout Voltage vs. Output Current −

VOUT = 3.3 V

IOUT

, OUTPUT CURRENT (A) IOUT

, OUTPUT CURRENT (A)

0.70.60.50.40.30.20.10

0.03

0.06

0.09

0.15

0.21

0.27

0.30

0.70.60.50.40.30.20.10

0.03

0.06

0.09

0.18

0.21

0.27

0.30

VOUT

, OUTPUT VOLTAGE (V)

IQ, QUIESCENT CURRENT (mA)

IGND, GROUND CURRENT (mA)

VDROP

, DROPOUT VOLTAGE (V)

VDROP

, DROPOUT VOLTAGE (V)

VDROP

, DROPOUT VOLTAGE (V)

IOUT = 10 mA

VIN = 3.85 V

VOUT = 2.85 V

CIN = 1 mF

COUT = 1 mF

100

2.82

2.84

2.86

2.85

2.87

2.89

2.88

VOUT = 2.85 V

CIN = 1 mF

COUT = 1 mF

1.5 2.5 4.5 5.5

TJ = 125°C

TJ = 25°C

TJ = −40°C

TJ = 125°C

TJ = 25°C

TJ = −40°C

VOUT = 1.8 V

CIN = 1 mF

COUT = 1 mF

TJ = 125°C

TJ = 25°C

TJ = −40°C

VOUT = 2.85 V

CIN = 1 mF

COUT = 1 mF

VOUT = 3.3 V

CIN = 1 mF

COUT = 1 mF

TJ = 125°C

TJ = 25°C

TJ = −40°C

TJ = 125°C

TJ = 25°C

TJ = −40°C

VIN = 3.85 V

VOUT = 2.85 V

CIN = 1 mF

COUT = 1 mF

800

1400

0.8

0.15

0.25

0.45

0.8

0.12

0.18

0.24

0.8

0.12

0.15

0.24

NCP167

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TYPICAL CHARACTERISTICS

Figure 9. Current Limit vs. Temperature Figure 10. Short Circuit Current vs.

Temperature

TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)

100806040200−20−40

550

600

700

750

850

900

1000

1050

1201008040200−20−40

550

600

700

750

850

900

1000

1050

Figure 11. Short Circuit Current vs. Input

Voltage

Figure 12. Disable Current vs. Temperature

VIN, INPUT VOLTAGE (V) TJ, JUNCTION TEMPERATURE (°C)

5.04.03.02.01.51.00.50

100

300

400

500

700

800

1000

1201006040200−20−40

0.05

0.10

0.20

0.30

0.35

0.40

0.50

Figure 13. Current to Enable Pin vs.

Temperature

Figure 14. Enable Voltage Threshold vs.

Temperature

TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)

100806040200−20−40

120

160

240

280

320

400

100806040200−20−40

300

350

400

500

600

650

700

800

ICL, CURRENT LIMIT (mA)

ISC, SHORT CIRCUIT CURRENT (mA)

IDIS, DISABLE CURRENT (mA)

IEN, ENABLE CURRENT (nA)

VEN, VOLTAGE ON ENABLE PIN (V)

120

650

800

950

VIN = 3.85 V

VOUT = 2.85 V

CIN = 1 mF

COUT = 1 mF

VIN = 3.85 V

VOUT = 2.85 V

CIN = 1 mF

COUT = 1 mF

650

800

950

CIN = 1 mF

COUT = 1 mF

TJ = 125°C

TJ = 25°C

TJ = −40°C

2.5 3.5 4.5 5.5

200

600

900

CIN = 1 mF

COUT = 1 mF

0.15

0.25

0.45

VIN = 5.5 V

VIN = 3.85 V

VEN = 5.5 V

OFF −> ON

ON −> OFF

VIN = 5.5 V

VOUT = 2.85 V

IOUT = 1 mA

CIN = 1 mF

COUT = 1 mF

120

200

360

120

VIN = 5.5 V

VOUT = 2.85 V

IOUT = 10 mA

CIN = 1 mF

COUT = 1 mF

450

550

750

NCP167

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TYPICAL CHARACTERISTICS

Figure 15. Power Supply Rejection Ratio vs.

Current, VDROP = 0.5 V, COUT = 1 mF

Figure 16. Power Supply Rejection Ratio vs.

Current, VDROP = 0.3 V, COUT = 1 mF

FREQUENCY (kHz) FREQUENCY (kHz)

10M1M100K10K1K100

100

Figure 17. Power Supply Rejection Ratio vs.

Input Voltage, IOUT = 100 mA, COUT = 1 mF

Figure 18. Power Supply Rejection Ratio vs.

Input Voltage, IOUT = 20 mA, COUT = 1 mF

FREQUENCY (kHz) FREQUENCY (kHz)

Figure 19. Output Voltage Noise Spectral Density

for VOUT = 3.3 V, IOUT = 20 mA, COUT = 1 mF

Figure 20. Output Voltage Noise Spectral Density

for VOUT = 3.3 V, IOUT = 250 mA, COUT = 1 mF

FREQUENCY (kHz) FREQUENCY (kHz)

1M100K10K1K10010

100

10K

100K

1M100K10K1K10010

100

10K

100K

RR, RIPPLE REJECTION (dB)

OUTPUT VOLTAGE NOISE (nV/√Hz)

VIN = 3.8 V

VOUT = 3.3 V

CIN = 1 mF

COUT = 1 mF

MLCC, X7R, 0805

10M1M100K10K1K100

100

VOUT = 3.3 V

IOUT = 100 mA

CIN = 1 mF

COUT = 1 mF

MLCC, X7R, 0805

10M1M100K10K1K100

100

10M1M100K10K1K100

100

VOUT = 3.3 V

IOUT = 20 mA

CIN = 1 mF

COUT = 1 mF

MLCC, X7R, 0805

VIN = 3.6 V

VOUT = 3.3 V

CIN = 1 mF

COUT = 1 mF

MLCC, X7R, 0805

VIN = 3.6 V

VOUT = 3.3 V

IOUT = 20 mA

CIN = 1 mF

COUT = 1 mF

MLCC, X7R, 0805

VIN = 3.8 V

VOUT = 3.3 V

IOUT = 250 mA

CIN = 1 mF

COUT = 1 mF

MLCC, X7R, 0805

100 mA

1 mA

20 mA

100 mA

1 mA

20 mA

4.3 V

3.8 V

3.6 V

4.3 V

3.8 V

3.6 V

NCP167

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APPLICATIONS INFORMATION

General

The NCP167 is an ultra−low noise 700 mA low dropout

regulator designed to meet the requirements of RF

applications and high performance analog circuits. The

NCP167 device provides very high PSRR and excellent

dynamic response. In connection with low quiescent current

this device is well suitable for battery powered application

such as cell phones, tablets and other. The NCP167 is fully

protected in case of current overload, output short circuit and

overheating.

Input Capacitor Selection (CIN)

Input capacitor connected as close as possible is necessary

for ensure device stability. The X7R or X5R capacitor

should be used for reliable performance over temperature

range. The value of the input capacitor should be 1 mF or

greater to ensure the best dynamic performance. This

capacitor will provide a low impedance path for unwanted

AC signals or noise modulated onto constant input voltage.

There is no requirement for the ESR of the input capacitor

but it is recommended to use ceramic capacitors for their low

ESR and ESL. A good input capacitor will limit the

influence of input trace inductance and source resistance

during sudden load current changes.

Output Decoupling (COUT)

The NCP167 requires an output capacitor connected as

close as possible to the output pin of the regulator. The

recommended capacitor value is 1 mF and X7R or X5R

dielectric due to its low capacitance variations over the

specified temperature range. The NCP167 is designed to

remain stable with minimum effective capacitance of 0.7 mF

to account for changes with temperature, DC bias and

package size. Especially for small package size capacitors

such as 0201 the effective capacitance drops rapidly with the

applied DC bias. Please refer Figure 21.

Figure 21. Capacity vs DC Bias Voltage

There is no requirement for the minimum value of

Equivalent Series Resistance (ESR) for the COUT but the

maximum value of ESR should be less than 1.7 W. Larger

output capacitors and lower ESR could improve the load

transient response or high frequency PSRR. It is not

recommended to use tantalum capacitors on the output due

to their large ESR. The equivalent series resistance of

tantalum capacitors is also strongly dependent on the

temperature, increasing at low temperature.

Enable Operation

The NCP167 uses the EN pin to enable/disable its device

and to deactivate/activate the active discharge function. If

the EN pin voltage is <0.4 V the device is guaranteed to be

disabled. The pass transistor is turned−off so that there is

virtually no current flow between the IN and OUT. The

active discharge transistor is active so that the output voltage

VOUT is pulled to GND through a 280 W resistor. In the

disable state the device consumes as low as typ. 10 nA from

the VIN. If the EN pin voltage >1.2 V the device is

guaranteed to be enabled. The NCP167 regulates the output

voltage and the active discharge transistor is turned−off. The

EN pin has internal pull−down current source with typ. value

of 200 nA which assures that the device is turned−off when

the EN pin is not connected. In the case where the EN

function isn’t required the EN should be tied directly to IN.

Output Current Limit

Output Current is internally limited within the IC to a

typical 1000 mA. The NCP167 will source this amount of

current measured with a voltage drops on the 90% of the

nominal VOUT. If the Output Voltage is directly shorted to

ground (VOUT = 0 V), the short circuit protection will limit

the output current to 1050 mA (typ.). The current limit and

short circuit protection will work properly over whole

temperature range and also input voltage range. There is no

limitation for the short circuit duration.

Thermal Shutdown

When the die temperature exceeds the Thermal Shutdown

threshold (TSD = 160°C typical), Thermal Shutdown event

is detected and the device is disabled. The IC will remain in

this state until the die temperature decreases below the

Thermal Shutdown Reset threshold (TSDU = 140°C typical).

Once the IC temperature falls below the 140°C the LDO is

enabled again. The thermal shutdown feature provides the

protection from a catastrophic device failure due to

accidental overheating. This protection is not intended to be

used as a substitute for proper heat sinking.

Reverse Current

The PMOS pass transistor has an inherent body diode

which will be forward biased in the case that VOUT > VIN.

Due to this fact in cases, where the extended reverse current

condition can be anticipated the device may require

additional external protection.

NCP167

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Power Supply Rejection Ratio

The NCP167 features very high Power Supply Rejection

ratio. If desired the PSRR at higher frequencies in the range

100 kHz – 10 MHz can be tuned by the selection of COUT

capacitor and proper PCB layout.

Turn−On Time

The turn−on time is defined as the time period from EN

assertion to the point in which VOUT will reach 98% of its

nominal value. This time is dependent on various

application conditions such as VOUT(NOM), COUT, TA.

Power Dissipation

As power dissipated in the NCP167 increases, it might

become necessary to provide some thermal relief. The

maximum power dissipation supported by the device is

dependent upon board design and layout. Mounting pad

configuration on the PCB, the board material, and the

ambient temperature affect the rate of junction temperature

rise for the part. The maximum power dissipation the

NCP167 can handle is given by:

PD(MAX) +ƪ125oC*TAƫ

qJA

(eq. 1)

The power dissipated by the NCP167 for given application

conditions can be calculated from the following equations:

PD[VIN @IGND )IOUTǒVIN *VOUTǓ(eq. 2)

Figure 22. qJA and PD (MAX) vs. Copper Area (CSP4)

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

100

110

120

130

140

150

160

0 100 200 300 400 500 600 700

PCB COPPER AREA (mm2)

qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)

PD(MAX), MAXIMUM POWER DISSIPATION (W)

qJA, 2 oz Cu

qJA, 1 oz Cu

PD(MAX), TA = 25°C, 1 oz Cu

PD(MAX), TA = 25°C, 2 oz Cu

NCP167

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Figure 23. qJA and PD (MAX) vs. Copper Area (XDFN4)

0.3

0.4

0.5

0.6

0.8

0.7

0.9

1.0

150

160

170

180

190

200

210

220

0 100 200 300 400 500 600 700

PCB COPPER AREA (mm2)

qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)

PD(MAX), MAXIMUM POWER DISSIPATION (W)

qJA, 2 oz Cu

qJA, 1 oz Cu

PD(MAX), TA = 25°C, 1 oz Cu

PD(MAX), TA = 25°C, 2 oz Cu

PCB Layout Recommendations

To obtain good transient performance and good regulation

characteristics place CIN and COUT capacitors close to the

device pins and make the PCB traces wide. In order to

minimize the solution size, use 0402 or 0201 capacitors with

appropriate capacity. Larger copper area connected to the

pins will also improve the device thermal resistance. The

actual power dissipation can be calculated from the equation

above (Equation 2). Expose pad can be tied to the GND pin

for improvement power dissipation and lower device

temperature.

NCP167

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ORDERING INFORMATION (XDFN4)

Device Nominal Output Voltage Description Marking Package Shipping

NCP167AMX180TBG 1.8 V

700 mA, Active

Discharge

XDFN4

(Pb−Free)

3000 / Tape

& Reel

NCP167AMX280TBG 2.8 V CP

NCP167AMX285TBG 2.85 V CK

NCP167AMX300TBG 3.0 V CQ

NCP167AMX330TBG 3.3 V CR

NCP167AMX350TBG 3.5 V CL

NCP167BMX330TBG 3.3 V 700 mA, Non-Active

Discharge AR

ORDERING INFORMATION (WLCSP4)

Device

Nominal

Output

Voltage Description Marking* Rotation Package Shipping†

NCP167AFCT180T2G 1.8 V

700 mA, Active Discharge

H 0°

WLCSP4

(Pb-Free)

5000 / Tape

& Reel

NCP167AFCT285T2G 2.85 V K 0°

NCP167AFCT295T2G 2.95 V P 0°

NCP167AFCT330T2G 3.3 V R 0°

NCP167AFCT350T2G 3.5 V L 0°

NCP167AFCTC350T2G 3.5 V 700 mA, Active Discharge,

Backside Coating

L 0°

NCP167BFCT330T2G 3.3 V 700 mA, Non−Active

Discharge

R 180°

*Marking letter with overbar.

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

WLCSP4, 0.64x0.64

CASE 567JZ

ISSUE A

DATE 03 AUG 2016

SEATING

PLANE

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. COPLANARITY APPLIES TO SPHERICAL

CROWNS OF SOLDER BALLS.

DIM

MIN NOM

−−−

MILLIMETERS

b0.195 0.210

e0.35 BSC

−−−

PIN A1

REFERENCE

A0.03 BC

0.05 C

4X b

0.05 C

0.04 0.06

SCALE 4:1

TOP VIEW

SIDE VIEW

BOTTOM VIEW

NOTE 3

A2 0.23 REF

PITCH 0.20

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

0.35

RECOMMENDED

A1 PACKAGE

OUTLINE

PITCH

MAX

0.610 0.640

0.225

0.33

0.08

0.670

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

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ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98AON85781F

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1

WLCSP4, 0.64X0.64

XDFN4 1.0x1.0, 0.65P

CASE 711AJ

ISSUE A

DATE 13 NOV 2015

SCALE 4:1

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED TERMINAL

AND IS MEASURED BETWEEN 0.15 AND

0.20 mm FROM THE TERMINAL TIPS.

4. COPLANARITY APPLIES TO THE EXPOSED

PAD AS WELL AS THE TERMINALS.

ÉÉ

BOTTOM VIEW

NOTE 3

2X 0.05 C

PIN ONE

REFERENCE

TOP VIEW

2X 0.05 C

(A3)

0.05 C

CSEATING

PLANE

SIDE VIEW

DIM MIN MAX

MILLIMETERS

A0.33 0.43

A1 0.00 0.05

A3 0.10 REF

b0.15 0.25

D1.00 BSC

D2 0.43 0.53

E1.00 BSC

e0.65 BSC

L0.20 0.30

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

MOUNTING FOOTPRINT*

1.20

0.26

0.24 4X

DIMENSIONS: MILLIMETERS

0.39

RECOMMENDED

GENERIC

MARKING DIAGRAM*

XX = Specific Device Code

M = Date Code

*This information is generic. Please refer

to device data sheet for actual part

marking.

Pb−Free indicator, “G” or microdot “ G”,

may or may not be present.

XX M

PACKAGE

OUTLINE

NOTE 4

e/2

45 5

0.05 BC

0.65

PITCH

DETAIL A

b2 0.02 0.12

L2 0.07 0.17

0.52

0.11

L24X

DETAIL A

b24X

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

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