Description
Agilent’s MGA-87563 is an
economical, easy-to-use GaAs
MMIC amplifier that offers low
noise and excellent gain for
applications from 0.5 to 4 GHz.
Packaged in an ultra-miniature
SOT-363 package, it requires half
the board space of a SOT-143
package.
With the addition of a simple
shunt-series inductor at the input,
the device is easily matched to
achieve a noise of 1.6 dB at
2.4 GHz. For 2.4 GHz applications
and above, the output is well
matched to 50 Ohms. Below
2 GHz, gain can be increased by
using conjugate matching.
The circuit uses state-of-the-art
PHEMT technology with self-
biasing current sources, a source-
follower interstage, resistive
feedback, and on-chip impedance
matching networks. A patented,
on-chip active bias circuit allows
operation from a single +3 V or
+5 V power supply. Current
consumption is only 4.5 mA,
making this part ideal for battery
powered designs.
0.5– 4 GHz 3 V Low Current
GaAs MMIC LNA
Technical Data
MGA-87563
Features
• Ultra-Miniature Package
• 1.6 dB Min. Noise Figure at
2.4 GHz
• 12.5 dB Gain at 2.4 GHz
• Single +3 V or 5 V Supply,
4.5 mA Current
Applications
• LNA or Gain Stage for PCS,
ISM, Cellular, and GPS
Applications
Pin Connections and
Package Marking
Surface Mount SOT-363
(SC-70) Package
Note:
Package marking provides orientation
and identification.
Equivalent Circuit
OUTPUT
GND
V
dd
87
GND
GND
INPUT
1
2
3
6
5
4
RF
INPUT
V
dd
RF
OUTPUT
GROUND
3
1, 2, 5
4
6
2
Thermal Resistance[2]:
θch-c = 160°C/W
Notes:
1. Operation of this device above any one
of these limits may cause permanent
damage.
2. TC = 25°C (TC is defined to be the
temperature at the package pins where
contact is made to the circuit board).
Absolute Maximum Ratings Absolute
Symbol Parameter Units Maximum[1]
Vdd Device Voltage, RF V 6
Output to Ground
Vin RF input or RF Output V +0.5
Vout Voltage to Ground –1.0
Pin CW RF Input Power dBm +13
Tch Channel Temperature °C 150
TSTG Storage Temperature °C - 65 to 150
MGA-87563 Electrical Specifications[3], TC = 25°C, ZO = 50 Ω, Vdd = 3 V
Symbol Parameters and Test Conditions Units Min. Typ. Max.
Gtest[3] f = 2.0 GHz 11 14
NFtest[3] f = 2.0 GHz 1.8 2.3
NFoOptimum Noise Figure f = 0.9 GHz dB 1.9
(Tuned for lowest noise figure) f = 1.5 GHz 1.6
f = 2.0 GHz 1.6
f = 2.4 GHz 1.6
f = 4.0 GHz 2.0
GaAssociated Gain at NFOf = 0.9 GHz dB 14.6
(Tuned for lowest noise figure) f = 1.5 GHz 14.5
f = 2.0 GHz 14.0
f = 2.4 GHz 12.5
f = 4.0 GHz 10.3
P1dB Output Power at 1 dB Gain Compression f = 0.9 GHz dBm -2.0
f = 1.5 GHz -1.8
f = 2.0 GHz -2.0
f = 2.4 GHz -2.0
f = 4.0 GHz -2.6
IP3Third Order Intercept Point f = 2.4 GHz dBm +8
VSWR Output VSWR f = 2.4 GHz 1.8
Idd Device Current mA 4.5
Note:
3. Guaranteed specifications are 100% tested in the circuit in Figure 10 in the Applications Information section.
3
Figure 7. Input and Output VSWR
(into 50 Ω) vs. Frequency. Figure 8. 50 Ω Noise Figure and
Associated Gain vs. Frequency. Figure 9. Device Current vs. Voltage.
Figure 1. Minimum Noise Figure
(Optimum Tuning) vs. Frequency and
Temperature.
Figure 2. Associated Gain (Optimum
Tuning) vs. Frequency and
Temperature.
Figure 4. Minimum Noise Figure
(Optimum Tuning) vs. Frequency and
Voltage.
MGA-87563 Typical Performance, TC = 25°C, Vdd = 3 V
NOISE FIGURE (dB)
0.5
0
FREQUENCY (GHz)
2.0
5
2
1
4.0
4
3.0
1.0 1.5 2.5 3.5
2.7 V
3.0 V
3.3 V
3
Figure 5. Associated Gain (Optimum
Tuning) vs. Frequency and Voltage. Figure 6. Output Power for 1 dB Gain
Compression (into 50 Ω) vs.
Frequency and Voltage.
Figure 3. Output Power for 1 dB Gain
Compression (into 50 Ω) vs.
Frequency and Temperature.
NOISE FIGURE (dB)
0.5
0
FREQUENCY (GHz)
2.0
5
2
1
4.0
4
3.0
1.0
+25
3
1.5 2.5 3.5
+85
-40
ASSOCIATED GAIN (dB)
0.5
0
FREQUENCY (GHz)
2.0
20
5
4.0
15
3.0
1.5
+25
+85
10 -40
1.0 2.5 3.5
P 1 dB (dBm)
0.5
-5
FREQUENCY (GHz)
2.0
0
-3
-4
4.0
-1
3.0
1.0 1.5 2.5 3.5
+85
+25
-40
-2
ASSOCIATED GAIN (dB)
0.5
0
FREQUENCY (GHz)
2.0
20
5
4.0
15
3.0
1.5
3.0 V
2.7 V
10 3.3 V
1.0 2.5 3.5
P 1dB (dBm)
0.5
-5
FREQUENCY (GHz)
2.0
0
-4
4.0
-2
3.0
1.5
3.0 V
2.7 V
-3
3.3 V
-1
1.0 2.5 3.5
VSWR (n:1)
0.5
1.0
FREQUENCY (GHz)
3.0
4.0
1.5
3.0
4.0
1.0
2.5
3.5
2.0
2.0
INPUT
OUTPUT
1.5 3.52.5
NOISE FIGURE (dB)
0.5
1.0
FREQUENCY (GHz)
3.0
5.0
1.5
4.0
3.5
1.5
3.0
4.5
2.5
2.0
ASSOCIATED GAIN (dB)
4.0
2.0
0
20
10
15
5
Ga 50
NF 50
NF OPT
1.0 2.5 3.5
CURRENT (mA)
0
0
VOLTAGE (V)
3
6
1
5
4
4
1
3
5
2
2
+85
+50
+25
0
-40
4
MGA-87563 Typical Noise Parameters[4], TC = 25°C,
ZO = 50 Ω, Vdd = 3 V
Frequency NFo
(GHz) (dB) Mag. Ang. RN/50 Ω
0.5 2.6 0.71 1 1.57
1.0 1.7 0.68 17 0.96
1.5 1.6 0.68 28 0.75
2.0 1.6 0.66 36 0.67
2.5 1.6 0.63 42 0.56
3.0 1.6 0.59 49 0.53
3.5 1.8 0.56 55 0.55
4.0 2.0 0.53 62 0.58
Notes:
4. Reference plane per Figure 11 in Applications Information section.
MGA-87563 Typical Scattering Parameters[4], TC = 25°C, ZO = 50 Ω, Vdd = 3 V
Freq. S11 S21 S12 S22 K
GHz Mag Ang dB Mag Ang dB Mag Ang Mag Ang Factor
0.1 0.92 -5 -5.6 0.53 -90 -22.7 0.073 -7 0.86 -11 0.41
0.2 0.91 -8 -0.7 0.92 -100 -22.7 0.073 -9 0.85 -18 0.29
0.5 0.88 -20 6.7 2.15 -131 -23.4 0.068 -18 0.78 -43 0.33
1.0 0.79 -35 10.1 3.22 -170 -25.2 0.055 -26 0.61 -75 0.72
1.5 0.73 -49 11.2 3.63 163 -26.2 0.049 -33 0.50 -100 1.02
2.0 0.67 -60 11.4 3.72 140 -26.6 0.047 -39 0.42 -122 1.32
2.5 0.59 -69 11.0 3.54 119 -29.1 0.035 -40 0.31 -141 2.38
3.0 0.50 -78 10.7 3.41 101 -32.5 0.024 -52 0.25 -167 4.29
3.5 0.43 -83 10.1 3.20 85 -35.1 0.018 -12 0.20 172 6.74
4.0 0.37 -96 10.0 3.16 71 -37.7 0.013 -10 0.24 143 9.83
4.5 0.31 -91 8.7 2.72 52 -26.1 0.050 20 0.11 123 3.33
5.0 0.30 -105 8.1 2.55 42 -25.9 0.050 -3 0.17 127 3.48
Γopt
5
MGA-87563 Applications
Information
Introduction
The MGA-87563 low noise RF
amplifier is designed to simplify
wireless RF applications in the
0.5 to 4 GHz frequency range. The
MGA-87563 is a two-stage, GaAs
Microwave Monolithic Integrated
Circuit (MMIC) amplifier that
uses feedback to provide
wideband gain. The output is
matched to 50 Ω and the input is
partially matched for optimum
noise figure.
A patented, active bias circuit
makes use of current sources to
“re-use” the drain current in both
stages of gain, thus minimizing
the required supply current and
decreasing sensitivity to varia-
tions in power supply voltage.
Test Circuit
The circuit shown in Figure 10 is
used for 100% RF testing of Noise
Figure and Gain. The input of this
circuit is fixed tuned for a
conjugate power match (maxi-
mum power transfer, or, mini-
mum Input VSWR) at 2 GHz.
Tests in this circuit are used to
guarantee the NFtest and Gtest
parameters shown in the
Electrical Specifications table.
The 4.7 nH inductor, L1 (Coilcraft,
Cary, IL part number series
1008CT-040) placed in series with
the input of the amplifier is all
that is necessary to match the
input to 50 Ω at 2 GHz.
Phase Reference Planes
The positions of the reference
planes used to measure
S-Parameters and to specify Γopt
for the Noise Parameters are
shown in Figure 11. As seen in the
illustration, the reference planes
are located at the extremities of
the package leads.
Biasing
The MGA-87563 is a voltage-
biased device and operates from
a single +3 volt power supply.
With a typical current drain of
only 4.5 mA, the MGA-87563 is
very well suited for use in battery
powered applications. All bias
regulation circuitry is integrated
into the MMIC, eliminating the
need for external DC compo-
nents. RF performance is very
consistent for 3-volt battery
supplies that may range from 2.7
to 3.3 volts, depending on battery
“freshness” or state of charge for
rechargeable batteries. Operation
up to +5 volts is discussed at the
end of the Applications section.
The test circuit in Figure 10
illustrates a suitable method for
bringing bias into the MGA-87563.
The bias connection must be
designed so that it adequately
bypasses the Vdd terminal while
not inadvertently creating any
resonances at frequencies where
the MGA-87563 has gain.
The 10 Ω resistor, R1, serves to
“de-Q” any potential resonances
in the bias line that could lead to
low gain, unwanted gain varia-
tions or device instability. The
power supply end of R1 is
bypassed to ground with
capacitor C1. The suggested value
for C1 is 100 pF. Significantly
higher values for C1 are not
recommended. Many higher value
chip capacitors (e.g., 1000 pF) are
not of sufficiently high quality at
these frequencies to function well
as a RF bypass without adding
harmful parasitics or self-
resonances.
While the input and output
terminals are internally resistively
grounded, these pins should not
be considered to be current sinks.
Connection of the MGA-87563
amplifier to circuits that are at
ground potential may be made
without the additional cost and
PCB space needed for DC block-
ing capacitors. If the amplifier is
to be cascaded with active circuits
having non-zero voltages present,
the use of series blocking
capacitors is recommended.
Input Matching
The input of the MGA-87563 is
partially matched internally to
50 Ω. The use of a simple input
conjugate matching circuit (such
as shown in Figure 10 for 2 GHz),
will lower the noise figure
considerably. A significant advan-
tage of the MGA-87563’s design is
that the impedance match for NFo
(minimum noise figure) is very
close to a conjugate power
match. This means that a very
low noise figure can be realized
simultaneously with a low input
VSWR. The typical difference
Figure 10. Test Circuit for 2 GHz. Figure 11. Reference Planes.
REFERENCE
PLANES
TEST CIRCUIT
V
dd
C1
L1
4.7 nH50 Ω
RF
INPUT RF
OUTPUT
50 Ω
10 Ω
6
of the MGA-87563. The layout is
shown with a nominal SOT-363
package footprint superimposed
on the PCB pads.
RF Layout
The RF layout in Figure 14 is
suggested as a starting point for
designs using the MGA-87563
amplifier. Adequate grounding is
needed to obtain maximum per-
formance and to obviate potential
instability. All three ground pins
of the MMIC should be connected
to RF ground by using plated
through holes (vias) near the
package terminals.
It is recommended that the PCB
traces for the ground pins NOT be
connected together underneath
the body of the package. PCB
pads hidden under the package
cannot be adequately inspected
for SMT solder quality.
FR-4 or G-10 PCB material is a
good choice for most low cost
wireless applications. Typical
board thickness is 0.025 or
0.031 inches. The width of 50 Ω
microstriplines in these PCB
thicknesses is also convenient for
mounting chip components such
as the series inductor at the input
between the noise figure obtain-
able with a conjugate power
match at the input and NFo is only
about 0.2 dB.
Output Matching
The output of the MGA-87563 is
matched internally to 50 Ω above
1.8 GHz. The use of a conjugate
matching circuit, such as a simple
series inductor, can increase the
gain considerably at lower
frequencies. Matching the output
will not affect the noise figure.
Stability
If the MGA-87563 is cascaded
with highly reactive stages (such
as filters) some precautions may
be needed to ensure stability. The
low frequency stability (under
1.5 GHz) of the MGA-87563 can
be enhanced by adding a series
R-L network in shunt with the
output, as shown in Figure 12.
The inductor can be either a chip
component or a high impedance
transmission line as shown in the
figure. Component values are
selected such that the output of
the MGA-87563 will be resistively
loaded at low frequencies while
allowing high frequency signals to
pass the stability load with
minimal loss.
Typical values for the resistor are
in the 25 to 50 Ω range. A
suggested starting place for the
inductor is a 0.35 to 0.40-inch long
microstripline with a width of
0.020 inches, using 0.031-inch
thick FR-4 (εr = 4.8) circuit board
as the substrate.
For applications near 1.5 GHz,
gain (and output power) may be
traded off for increased stability.
Some precautions regarding the
Vdd connection of the MGA-87563
are also recommended to ensure
stability within the operating
frequency range of the device. It
is important that the connection
to the power supply be properly
bypassed to realize full amplifier
performance. Refer to the Biasing
section above for more
information.
SOT-363 PCB Layout
A PCB pad layout for the minia-
ture SOT-363 (SC-70) package is
shown in Figure 13 (dimensions
are in inches). This layout provides
ample allowance for package
placement by automated assem-
bly equipment without adding
parasitics that could impair the
high frequency RF performance
Figure 12. Output Circuitry for Low
Frequency Stability. Figure 13. PCB Pad Layout
(dimensions in inches).
0.026
0.07
0.016
0.035
MGA
87563
RF
OUTPUT
25-50 Ω
HIGH IMPEDANCE
TRANSMISSION
OR INDUCTOR
DC BLOCKING
CAPACITOR
Figure 14. RF Layout.
RF OUTPUT
V
DD
RF INPUT
50 Ω
50 Ω
87
7
for impedance matching or for
DC blocking capacitors. For noise
figure sensitive applications, the
use of PTFE/glass dielectric
materials may be warranted to
minimize transmission line losses
at the amplifier input.
Higher Bias Voltages
While the MGA-87563 is designed
for use in +3 volt battery powered
applications, the internal bias
regulation circuitry allows it to be
easily operated with any power
supply voltage from +2.7 to
5 volts. Figure 15 shows an
increase of approximately 1 dB in
the associated gain with +5 volts
applied. The P1dB output power
(Figure 17) is also higher by
about 1 dBm. The effect of higher
Vdd on noise figure is negligible as
indicated in Figure 16.
MGA-87563 Part Number Ordering Information
Part Number Devices per Container Container
MGA-87563-TR1 3,000 7" reel
MGA-87563-BLK 100 Antistatic bag
Figure 15. Associated Gain vs.
Frequency at Vdd = 5 Volts. Figure 16. Optimum Noise Figure vs.
Frequency at Vdd = 5 Volts. Figure 17. Output Power at 1 dB Gain
Compression vs. Frequency at Vdd =
5 Volts.
P 1 dB (dBm)
0.6
-2.00
FREQUENCY (GHz)
0.00
-1.50
2.41.2
-1.00
-0.50
1.8 3.0 3.6 4.2
OPTIMUM NF (dB)
0.5
0.5
FREQUENCY (GHz)
2.0
3.5
1.0
4.0
2.5
2.5
1.0
2.0
3.0
1.5 3.0 3.5
1.5
ASSOCIATED GAIN (dB)
0.5
9
FREQUENCY (GHz)
2.0
17
10
4.0
14
2.5
1.0
13
16
12
1.5 3.0 3.5
15
11
Package Dimensions
Outline 63 (SOT-363/SC-70)
2.20 (0.087)
2.00 (0.079) 1.35 (0.053)
1.15 (0.045)
1.30 (0.051)
REF.
0.650 BSC (0.025)
2.20 (0.087)
1.80 (0.071)
0.10 (0.004)
0.00 (0.00)
0.25 (0.010)
0.15 (0.006)
1.00 (0.039)
0.80 (0.031) 0.20 (0.008)
0.10 (0.004)
0.30 (0.012)
0.10 (0.004)
0.30 REF.
10°
0.425 (0.017)
TYP.
DIMENSIONS ARE IN MILLIMETERS (INCHES)
Tape Dimensions and Product Orientation
For Outline 63
Device Orientation
P
P
0
P
2
FW
C
D
1
D
E
A
0
8° MAX.
t
1
(CARRIER TAPE THICKNESS) T
t
(COVER TAPE THICKNESS)
5° MAX.
B
0
K
0
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A
0
B
0
K
0
P
D
1
2.24 ± 0.10
2.34 ± 0.10
1.22 ± 0.10
4.00 ± 0.10
1.00 + 0.25
0.088 ± 0.004
0.092 ± 0.004
0.048 ± 0.004
0.157 ± 0.004
0.039 + 0.010
CAVITY
DIAMETER
PITCH
POSITION
D
P
0
E
1.55 ± 0.05
4.00 ± 0.10
1.75 ± 0.10
0.061 ± 0.002
0.157 ± 0.004
0.069 ± 0.004
PERFORATION
WIDTH
THICKNESS W
t
1
8.00 ± 0.30
0.255 ± 0.013 0.315 ± 0.012
0.010 ± 0.0005
CARRIER TAPE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
F
P
2
3.50 ± 0.05
2.00 ± 0.05
0.138 ± 0.002
0.079 ± 0.002
DISTANCE
WIDTH
TAPE THICKNESS C
T
t
5.4 ± 0.10
0.062 ± 0.001 0.205 ± 0.004
0.0025 ± 0.00004
COVER TAPE
USER
FEED
DIRECTION COVER TAPE
CARRIER
TAPE
REEL END VIEW
8 mm
4 mm
TOP VIEW
87 87 87 87
www.semiconductor.agilent.com
Data subject to change.
Copyright © 1999 Agilent Technologies
Obsoletes 5964-9984E
5965-9688E (11/99)
