32K x 8 Power Switched and Reprogrammable PROM
CY7C271
CY7C274
Cypress Semiconductor Corporation 198 Champion Court San Jose,CA 95134-1709 408-943-2600
Document #: 38-04008 Rev. *C Revised August 17, 2006
Features
CMOS for optimum speed/power
Windowed for reprogrammability
High speed
30 ns (Commercial)
35 ns (Milit ary)
Low power
660 mW (commercial)
715 mW (military)
Super low standby power
Less than 165 mW when deselected
EPROM technology 100% programma ble
Slim 300-mil package (7C271)
Direct replacement for bipolar PROMs
Capable of withstanding >2001V static discharge
Functional Description
The CY7C271 and CY7C274 are high-performance
32,768-word by 8-bit CMOS PROMs. When disabled (CE
HIGH), the 7C271/7C274 automatically powers down into a
low-power stand-by mode. The CY7C271 is packaged in the
300-mil slim package. The CY7C274 is packaged in the
industry standard 600-mil package. Both the CY7C271 and
CY7C274 are available in a cerDIP package equipped with an
erasure window to provide for reprogrammability. When
exposed to UV light, the PROM is erased and can be repro -
grammed. The memory cells utilize proven EPROM floating
gate technology and byte-wide intelligent programming
algorithms.
The CY7C271 and CY7C274 offer the advantage of lower
power, superior performance, and programming yield. The
EPROM cell requires only 12.5V for the super voltage, and low
current requirements allow for gang programming. The
EPROM cells allow each memory location to be tested 1 00%
because each location is written into, erased, and repeatedl y
exercised prior to encapsulation. Each PROM is also tested
for AC performance to guarantee that after customer
programming, the product will meet DC and AC specification
limits.
Reading the 7C271 is accomplished by placing active LOW
signals on CS1 and CE, and an active H IGH on C S2. Reading the
7C274 is accomplishe d by placing active LOW signa ls on OE and
CE. The cont ents of the memory location addressed by the address
lines (A0A14) will become available on the output lines (O0O7).
Logic Block Diagram Pin Configurations
1
2
3
4
5
6
7
8
9
10
11
12 16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
A8
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VCC
A11
A12
A13
O7
O6
O4
O5
O3
A12
A11
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
POWER-DOWN
O7
O6
O5
O4
O3
O2
O1
O0
CE
256 x 1024
PROGRAMABLE
ARRAY 8 x 1 OF 128
MULTIPLEXER
12
31
4
5
6
7
8
9
10
32130
1314151617
26
25
24
23
22
21
11
V
CC
A5
A4
A3
A2
A6
A1
A13
A14
O7
O6
O4
GND
A12
A7
A8
O3
O1
181920
27
28
29
32
NC
O5
NC
15
A10
A13
(7C271) CS1
(7C274) OE
A9A10
A14
CS1
CS2
CE
A9
A10
A11
CS1
CS2
O0
A14 1
2
3
4
5
6
7
8
9
10
11
12 16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
12
31
4
5
6
7
8
9
10
32130
1314151617
26
25
24
23
22
21
11
A7
V
CC
A12
181920
27
28
29
32
15
NC
A14
A13
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VCC
A13
A8
A9
O7
O6
O4
O5
O3
A9
A11
O7
O6
A8
VPP A14
(7C271) CS2
7C271 7C274
NC
A11
OE
A10
CE
NC
CE
O2
A0NC
A5
A4
A3
A2
A6
A1
O0
A0
VPP
NC
OE
A10
CE
O4
GND
O3
O1
NC
O5
O2
DIP/Flatpack DIP/Flatpack
LCC/PLCC (Opaque Only)
7C271 7C274
X ADDRESS
Y ADDRESS LCC/PLCC (Opaque Only)
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CY7C271
CY7C274
Document #: 38-04008 Rev. *C Page 2 of 13
Maximum Ratings[1]
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ..................................... 65°C to +150°C
Ambient Temperature with
Power Applied..................................................55°C to +125°C
Supply Voltage to Ground Potential.................0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State.....................................................0.5V to +7.0V
DC Input V oltage.................................................3.0V to +7.0V
DC Program Voltage............. .. ... .............. ... .............. ... .13.0V
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current.....................................................>200 mA
UV Exposure .................. .. ... .............. ... ........7258 Wsec/cm2
Selection Guide
7C274-30 7C271-35
7C274-35 7C271-45
7C274-45 7C271-55 Unit
Maximum Access Time 30 35 45 55 ns
Maximum Operating
Current Com’l 120 120 120 120 mA
Military 130 130 130 mA
Standby Current Com’l 30 30 30 30 mA
Military 40 40 40 mA
Operating Range
Range Ambient
Temperature VCC
Commercial 0°C to +70°C 5V ±10%
Military[2] 55°C to +125°C 5V ±10%
Electrical Characteristics Over the Operating Range[3]
7C271- 35, 45, 55
7C274-30, 35, 45,
Parameter Description Test Conditions Min. Max. Unit
VOH Output HIGH Voltage VCC = Min., IOH = 2.0 mA 2.4 V
VOL Output LOW Voltage VCC = Min., IOL = 8.0 mA[4] 0.4 V
VIH Input HIGH Level Guaranteed Input Logical HIGH Voltage for All
Inputs 2.0 VCC V
VIL Input LOW Level Guaranteed Input Logical LOW Voltage for All
Inputs 0.8 V
IIX Input Current GND < VIN < VCC 10 +10 µA
IOZ Output Leakage Current GND < VOUT < VCC, Output Disabled 40 +40 µA
IOS Output Short Circuit Current [5] VCC = Max., VOUT = GND 20 90 mA
ICC Power Supply Current VCC = Max., VIN = 2.0V,
IOUT = 0 mA, CE=VIL Commercial 120 mA
Military 130
ISB Standby Supply Current VCC = Max., CE = VIH,
IOUT = 0 mA Commercial 30 mA
Military 40
VPP Programming Supply Voltage 12 13 V
IPP Programming Supply Cu rrent 50 mA
Notes
1. The voltage on any input or I/ O pin cannot exceed the power pin during power-up.
2. TA is the “instant on” case temperature.
3. See the last page of this specification for Group A subgroup testing information.
4. 6.0 mA military
5. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds.
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CY7C271
CY7C274
Document #: 38-04008 Rev. *C Page 3 of 13
VIHP Input HIGH Programming
Voltage 3.0 V
VILP Input LOW Programming
Voltage 0.4 V
Electrical Characteristics Over the Operating Range[3]
7C271- 35, 45, 55
7C274-30, 35, 45,
Parameter Description Test Conditions Min. Max. Unit
Capacitance[6]
Parameter Description Test Conditions Max. Unit
CIN Input Capacitance TA = 25°C, f = 1 MHz,
VCC = 5.0V 10 pF
COUT Output Capacita nce 10 pF
Note
6. See Introduction to CMOS PROMs for general information on testing.
AC Test Loads and Waveforms[6]
3.0V
5V
OUTPUT
R1 500
658MIL
R2 333
(403 MIL)
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
5ns 5ns
5V
OUTPUT
5pF
INCLUDING
JIG AND
SCOPE
(a) Normal Load (b) HighZ Load
OUTPUT 2.00V COMMERCIAL
Equivalent to: THÉ VENIN EQUIVALENT
200
ALL INPUT PULSES
OUTPUT 1.90V MILITARY
250
R1 500
658MIL
R2 333
(403 MIL) ≤≤
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CY7C271
CY7C274
Document #: 38-04008 Rev. *C Page 4 of 13
Erasure Characteristics
W avelengths of light less than 4000 angstroms begin to erase
the CY7C271 and CY7C274 in the windowed package. For
this reason, an opaque label should be placed over the window
if the PROM is exposed to sunlight or fluore scent lighting for
extended periods of time.
The recommended dose of ultraviolet light for erasure is a
wavelength of 2537 angstroms for a minimum dose (UV
intensity × exposure time) of 25 Wsec/cm2. For an ultraviolet lamp
with a 12 mW/cm2 power rating, the exposure time would be approx-
imately 35 minutes. The CY7C271 or CY7C274 needs to be within 1
inch of the lamp during erasure. Permanent damage may result if the
PROM is exposed to high-intensity UV light for an extended period of
time. 7258 Wsec/cm2 is the recommended maximum dosage.
Programming Modes
Programming support is available from Cypress as well as
from a number of third-party software vendors. For detailed
programming information, including a listing of software
packages, please see the PROM Programming Information
located at the end of this section. Programming algorithms can
be obtained from any Cypress representative.
Switching Characteristics Over the Operating Range[3,6]
7C274-30 7C271-35
7C274-35 7C271-45
7C274-45 7C271-55
Parameter Description Min. Max. Min. Max. Min. Max. Min. Max. Unit
tAA Address to Output Valid 30 35 45 55 ns
tHZCS Chip Select Inactive to High Z (CS1 and CS2,
7C271 Only) 20 25 30 30 ns
tACS Chip Select Active to Output V alid (CS1 and CS2,
7C271 Only) 20 25 30 30 ns
tHZOE Output Enable Inactive to High Z (OE, 7C274
Only) 20 20 25 25 ns
tOE Output Enable Active to Output Valid (O E , 7C274
Only) 20 20 25 25 ns
tHZCE Chip Enable Inactive to High Z (CE Only) 35 40 50 60 ns
tACE Chip Enable Active to Output Valid (CE Only) 35 40 50 60 ns
tPU Chip Enable Active to Power Up 0000ns
tPD Chip Enable Inactive to Power Down 35 40 50 60 ns
tOH Output Hold from Address Change 0000ns
Switching Waveform
tOH
tPU
tPD
tAA (tOE)
tACS(E)
50% 50%
A0A14
ADDRESS
VCC
SUPPLY
CURRENT
CS2
OE,CE,CS
1
O0-O
7PREVIOUS DATA VALID DATA VALID
POWER-DOWN CONTROLLED BY CE
(tHZOE)
tHZCS(E)
HIGH Z
[7]
Note
7. CS2 and CS1 are used on the 7C271 only . OE is used on the 7C274 only .
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CY7C271
CY7C274
Document #: 38-04008 Rev. *C Page 5 of 13
Table 1. CY7C271 Mode Selection
Pin Function[8]
Read or Output Disable A14–A0CE CS2CS1O7–O0
Mode Other A14–A0VFY PGM VPP D7–D0
Read A14–A0VIL VIH VIL O7–O0
Power Down A14–A0VIH X X High Z
Output Disable A14–A0X VIL XHigh Z
Output Disable A14–A0X X VIH High Z
Program A14–A0VIHP VILP VPP D7–D0
Program Verify A14–A0VILP VIHP/VILP VPP O7–O0
Program Inhibit A14–A0VIHP VIHP VPP High Z
Blank Check A14–A0VILP VIHP/VILP VPP O7–O0
Notes
8. X can be VIL (VILP) or VIH (VIHP).
9. VPP should be tied to VCC ±5% in read mode.
Table 2. CY7C274 Mode Selection
Pin Function[8]
Read or Output Disable A14–A0OE CE VPP O7–O0
Mode Other A14–A0VFY PGM VPP D7–D0
Read A14–A0VIL VIL Note 9 O7–O0
Output Disable A14–A0VIH X X High Z
Power Down A14–A0X VIH XHigh Z
Program A14–A0VIHP VILP VPP D7–D0
Program Verify A14–A0VILP VIHP/VILP VPP O7–O0
Program Inhibit A14–A0VIHP VIHP VPP High Z
Blank Check A14–A0VILP VIHP/VILP VPP O7–O0
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CY7C271
CY7C274
Document #: 38-04008 Rev. *C Page 6 of 13
Figure 1. Programming Pinouts
1
2
3
4
5
6
7
8
9
10
11
12 16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
GND
VCC
A10
A11
A12
A13
A14
VPP
PGM
VFY
D7
D6
D4
D5
D3
12
D0
31
4
5
6
7
8
9
10
32130
1314151617
26
25
24
23
22
21
11
A7
VCC
A6
A5
A4
A3
A2
A1
A0PGM
A14
NC
D7
D6
D4
D3
D2
D1
181920
27
28
29
32
NC
NC
D5
15
VPP
7C271 7C271
NC
GND
VFY
A13
A12
A8
A9
A10
A11
DIP
Top View LCC
Top View
1
2
3
4
5
6
7
8
9
10
11
12 16
17
18
19
20
24
23
22
21
13
14
25
28
27
26
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
D0
D1
D2
GND
VCC
A14
A13
A8
A9
A11
A10
PGM
VFY
D7
D6
D4
D5
D3
12
D0
31
4
5
6
7
8
9
10
32130
1314151617
26
25
24
23
22
21
11
A7
VCC
A6
A5
A4
A3
A2
A1
A0PGM
A11
NC
D7
D6
D4
D3
D2
D1
181920
27
28
29
32
NC
NC
D5
15
7C274 7C274
NC
GND
VFY
A9
A8
A12
A13
VPP
A14
A10
DIP
Top View LCC
Top View
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CY7C271
CY7C274
Document #: 38-04008 Rev. *C Page 7 of 13
Typical DC and AC Characteristics
1.4
1.6
1.0
0.8
4.0 4.5 5.0 5.5 6.0 55 25 125
1.2
1.1
1.2
1.0
0.8
0.6
4.0 4.5 5.0 5.5 6.0
NORMALIZED ACCESS TIME
SUPPLYVOLTAGE (V)
NORMALIZED SUPPLY CURRENT
vs. SUPPLY VOLTAGE NORMALIZED SUPPLY CURRENT
vs. AMBIENTTEMPERATURE
AMBIENT TEMPERATURE (°C) SUPPLYVOLTAGE (V)
NORMALIZED ACCESS TIME
vs. SUPPLY VOLTAGE
0.6
1.2
1.6
1.4
1.2
1.0
0.8
55 125
NORMALIZED ACCESS TIME
AMBIENT TEMPERATURE (°C)
NORMALIZED ACCESS TIME
vs. TEMPERATURE
150
175
125
75
50
25
0.0 1.0 2.0 3.0
OUTPUT SINK CURRENT (mA)
0
100
OUTPUT VOLTAGE (V)
OUTPUT SINK CURRENT
vs. OUTPUT VOLTAGE
1.0
0.9
0.8
NORMALIZED I
CC
NORMALIZED I
CC
VCC =5.0V
TA=25°C
TA=25°C
0.6
0.4
60
50
40
30
20
10
01.0 2.03.0
OUTPUT SOURCE CURRENT (mA)
OUTPUT VOLTAGE (V)
40
30
20
10
0 200 400 600 800
DELTA t (ns)
AA
CAPACITANCE (pF)
TYPICAL ACCESS TIME CHANGE
vs. OUTPUT LOADING
4.0 1000
VCC =4.5V
TA=25°C
TA=25°C
f= f
MAX
25 0
OUTPUT SOURCE CURRENT
vs. VOLTAGE
4.0
C271-14
1.1
1.0
0.9
0.8
0.7
0 50 100 150 200
CYCLE PER IOD (n s )
NORMALIZED SUPPLY CURRENT
vs. CYCLE PERIOD
250
NORMALIZED I
CC
0.6
0
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CY7C271
CY7C274
Document #: 38-04008 Rev. *C Page 8 of 13
MILITARY SPECIFICATIONS
Group A Subgroup Testing
Ordering Information
Speed
(ns) Ordering Code Package
Name Package Type Operating
Range
35 CY7C271-35WMB W22 28-Lead (300-Mil) Windowed CerDIP Military
45 CY7C271-45WMB W22 28-Lead (300-Mil) Windowed CerDIP Military
CY7C274-45WMB W16 28-Lead (600-Mil) Windowed CerDIP
55 CY7C271-55WMB W22 28-Lead (300-Mil) Windowed CerDIP Military
DC Characteristics
Parameter Subgroups
VOH 1, 2, 3
VOL 1, 2, 3
VIH 1, 2, 3
VIL 1, 2, 3
IIX 1, 2, 3
IOZ 1, 2, 3
ICC 1, 2, 3
ISB 1, 2, 3
Switching Characteristics
Parameter Subgroups
tAA 7, 8, 9, 10, 11
tACS[10] 7, 8, 9, 10, 11
tOE[11] 7, 8, 9, 10, 11
tACE 7, 8, 9, 10, 11
SMD Cross Reference
SMD
Number Suffix Cypress
Number
5962-89817 01ZX CY7C271-55QMB
5962-89817 02XX CY7C271-45WMB
5962-89817 02ZX CY7C271-45QMB
Notes
10.7C271 only (C S1 and CS2).
11. 7C274 only.
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CY7C274
Document #: 38-04008 Rev. *C Page 9 of 13
Package Diagrams
Figure 2. 28-Lead (300-Mil) PDIP P21
DIMENSIONS IN INCHES [MM] MIN.
MAX.
SEATING PLANE
0.260[6.60]
0.295[7.49]
0.090[2.28]
0.110[2.79]
0.055[1.39]
0.065[1.65]
0.015[0.38]
0.020[0.50]
0.015[0.38]
0.060[1.52]
0.120[3.05]
0.140[3.55]
0.009[0.23]
0.012[0.30]
0.310[7.87]
0.385[9.78]
0.290[7.36]
0.325[8.25]
0.030[0.76]
0.080[2.03]
0.115[2.92]
0.160[4.06]
0.140[3.55]
0.190[4.82]
1.345[34.16]
1.385[35.18]
MIN.
114
15 28
REFERENCE JEDEC MO-095
LEAD END OPTION
SEE LEAD END OPTION
SEE LEAD END OPTION
(LEAD #1, 14, 15 & 28)
PACKAGE WEIGHT: 2.15 gms
51-85014-*D
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CY7C274
Document #: 38-04008 Rev. *C Page 10 of 13
Figure 3. 32-Pin Windowed Rect angular Leadless Chip Carrier Q55
Package Diagrams (continued)
MIL-STD-1835 C-12
51-80103-*A
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CY7C274
Document #: 38-04008 Rev. *C Page 11 of 13
Figure 4. 28-Lead (600-Mil) Windowed CerDIP W16
Package Diagrams (continued)
MIL-STD-1835 D-10 Config. A
51-80020-**
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CY7C274
Document #: 38-04008 Rev. *C Page 12 of 13
© Cypress Semi con duct or Cor po rati on , 20 06 . The information con t a in ed he re i n is subject to change wi t hou t n oti ce. C ypr ess S em ic on duct or Cor po rati on assu me s no resp onsi b i lity f or th e u s e
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significan t injury to the user. The inclusion of Cypre ss
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Figure 5. 28-Lead (300-Mil) Windowed CerDIP W22
All product and company names mentioned in this document may be the trademarks of their respective holders.
Package Diagrams (continued)
MIL-STD-1835 D-15 Config. A
51-80087-**
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CY7C274
Document #: 38-04008 Rev. *C Page 13 of 13
Document History Page
Document Title: CY7C271 CY7C274 32K x 8 Power Switched and Reprogrammable PROM
Document Number: 38-04008
REV. ECN NO. Issue
Date Orig. of
Change Description of Change
** 113864 3/8/02 DSG Changed from Spec number: 38-00068 to 38-04008
A* 118899 10/10/02 GBI Updated Ordering Information
*B 122249 12/27/02 RBI Added power up requirements to Operating Conditions information
*C 499542 See ECN PCI Updated Ordering Information
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