(AA) MOTOROLA MC3232A | Advance Information MEMORY ADDRESS MULTIPLEXER The Motorola MC3232A is an address multiplexer and refresh counter for 16-pin4K dynamic RAMs that require a 64-cycle refresh. It multiplexes twelve system address bits to the six input address pins of the memory device. The MC3232A also contains a 6-bit refresh counter that is clocked externally to generate the 64 sequen- tial addresses required for refresh. The high performance of the MC3232A will enhance the high speed of the fast N-channel RAMs such as the MCM4027. @ Simplifies 16-Pin 4K Dynamic Memory Design Reduces Package Count 6-Bit Binary Counter for 64 Refresh Address Multiplexing: Row Address/Column Address/Refresh Address MEMORY ADDRESS MULTIPLEXER AND REFRESH ADDRESS COUNTER SCHOTTKY SILICON MONOLITHIC INTEGRATED CIRCUITS L SUFFIX CERAMIC PACKAGE CASE 623 High Input Impedance for Minimum Loading of Bus: P SUFFIX If = 0.25 mA Max PLASTIC PACKAGE . CASE 649 @ Schottky TTL for High Performance Address Input to Output Delay tAQ = 25ns @CL = 250 pF, 9.0 ns Max @ CL = 15 pF @ Second Source to Intel 3232 | (Detect Zero Function Not Included and Additional Gount 19 E24 Voc Power Fai} Feature Added at Pin 13) Refresh > L 23 Row Enable Enable Al 304 i 22 AS AT? 40 321 A11 LOGIC DIAGRAM A2 5Co [20 A4 AB 6 CI fr 19 A10 Ait AO 7 J P7118 A3 A6 8 CO i 37 AQ AS _ = = 1 Output oo 9 J 16 O3 | 6210 CI P15 04 ; 6111 C4 1405 121 Gndi2 Co F313 cer Total } Address | 6 Note: AO Through AS Are Row Addresses Lines ! Total A6 Through A11 Are Column Addresses \ *See Pin Definitions | TRUTH TABLE AND DEFINITIONS as Refresh Row Outout Enable Enable urea AQ = H x Refresh Address 0 Output {From Internal Counter} L H Row Address (AO through A5) L L Column Address Refresh 6 Total (AG through A11) Enable a Count Advances Internal Refresh Counter Row Enable 50k 6 Bit Counter ce ORDERING INFORMATION Device Temperature Flange Package Count / MC3232AL 0 to 75 Ceramic DIP See Pin Definitions MC3232AP Oto 75C Plastic DIP This is advance information and specifications are subject to change without notice. @MOTOROLA INC., 1978 ADI-518MC3232A ABSOLUTE MAXIMUM RATINGS (Ta = 25C unless otherwise noted.) Absolute Maximum Ratings are those Rating Symbol Value Unit values beyond which the safety of the device P 3 ly Vol Vv O5to+ V cannot be guaranteed. This is a stress rating ower Supply Voltage ce -0.5 10 +7.0 only and functional operation of the device Input Voltage Vi ~0.5 to +7.0 v at these or any other conditions above those Output Voltage Vo -0.5 to +7.0 Vv indicated in the operational sections of this Output Current lo 100 mA specification is not implied. Exposure to Operating Ambient Temperature Ta 0 to +75 % absolute maximum wanes for extended ty. Storage Temperature Tstg -65 to +150 C Periods may affect reliability Junction Temperature Ty Sc Ceramic Package +175 Plastic Package +150 ELECTRICAL CHARACTERISTICS (Unless otherwise noted, Min/Max values apply with 4.5 V < Voc < 5.5 V, 0C < Ta < 75C; typical values apply with Voc = 5.0 V, Ta = 25C.) Characteristic Symbol Min Typ Max Unit Input Current, Low Logic State Nie - -0.04 -0.25 mA (Vi_ = 0.45 Vv) input Current, High Logic State WH _ - 10 BA (Vin = 5.5 V) Input Voltage, Low Logic State VIL - - 0.8 v Input Voltage, High Logic State Vin 2.0 - _ Vv Output Voltage, Low Logic State VOL - 0.25 0.4 Vv (lot = 5.0 mA) Output Voltage, High Logic State Vou 28 40 - Vv (Igy = -1.0 mA) Input Clamp Voltage Vic = -0.8 -1.6 Vv (We = -12 mA) Power Supply Current lec - 58 90 mA (Voc = 5.5 V) SWITCHING CHARACTERISTICS (Unless otherwise noted, Min/Max values apply with 4.5 V < Voc < 5.5 V, 0C < Ty < 75C; typical values apply with Vcc = 5.0 V, Ta = 25C.) Characteristic Symbol Min Typ Max Unit Propagation Delay Times Address Input to Output tao ns (Load = 1 TTL, Cy = 250 pF) - 12 25 (Load = 1 TTL, CL = 15 PF, Voc = 5.0 V, Ta = 25C) - 6.0 9.0 Row Enable to Output too ns (Load = 1 TTL, Cy = 250 pF) - 32 a (Load = 1 TTL, CL = 18 pF, Vcc = 5.0 V, Ta = 25C) = 18 27 Refresh Enable to Output tEO ns (Load = 1 TTL, Cy = 250 pF} - 32 45 (Load = 1 TTL, CL = 15pF, Voc = 5.0 V, Ta = 28C) - 18 27 Tount Pulse Width twe 30 - =_ ns Counting Frequency {t 5.0 10 - MHz Lo & MOTOROLA Semiconductor Products inc. ____ 4-3MC3232A FIGURE 1 AC WAVEFORMS with MCM6604 NORMAL CYCLE Vv ___, Row IH Enable Miu Address tH Input 1.5 V O-A11) , (A ) Vi too Outputs You 2.4V column (50-08) Dont Care Row Address y Address VoL Refresh Enable Low Logic State FIGURE 2 REFRESH CYCLE Vv Refresh tH f Enable A 1.5 View ~ t tCcPw Vin Count 1.5 1.5V Vin wt EO Vv Outputs OH Add r24aV Ret dd 2.4V Refresh B0_5 ress efresh Address (O0-O5) o8Vv losv Address Vou FIGURE 3 OUTPUT CURRENT versus OUTPUT LOW VOLTAGE OUTPUT CURRENT, Ig (mA) 0.1 OUTPUT VOLTAGE, LOW-LOGIC STATE, Voy (VOLTS) TYPICAL CHARACTERISTICS 25 Voc = 5.0 V Ta = 26C 20} MEASURED 50% to 50% 5.0 PROPAGATION DELAY TIME, tap (ns) 0.2 0.3 O4 8 100 200 300 oo (M) MOTOROLA Semiconductor Products inc. FIGURE 4 PROPAGATION DELAY versus LOAD CAPACITANCE Row or Column Address to Output LOAD CAPACITANCE, C, (pF)MC3232A Count Input Pin 1 PIN DEFINITIONS Active low input increments internal 6-bit counter by one for each count pulse in, Refresh Enable Input Pin 2 Active high input which determines whether the MC3232A is in refresh mode (H) or address enable (L). AO~AS5 Inputs Pins 7, 3, 5, 18, 20, 22 Row address inputs. AG6-A11 Inputs Pins 8, 4, 6, 17, 19, 21 Column address inputs. 00-05 Outputs Pins 9, 11, 10, 16, 15, 14 Address outputs to memories. Inverted with respect to address inputs. Gnd Pin 12 Power supply ground. CE Input Pin 13 Optional use, chip enable contro! pin. Left open, an internal 50 k& pullup resistor keeps this pin high and the MC3242A is a functional replacement for the Intel 3242 (without detect zero function). As an active input, when pulled low, all 3242A outputs go three-state. Regardless of Pin 13 (CE) condition, when power (Vc) is removed, all 3242A outputs go three-state. [n addition, the refresh address counter is reset to all 1s so that upon return of supply power, control of refresh addressing can be returned to the MC3242A (by pulling Pin 13 high) at a known address (i.e., all 1s). This option is available tested by consulting factory. Row Enable Input Pin 23 High input selects row, low input selects column addresses of the driven memories. Vec Pin 24 +5 V power supply input. Due to high capacitance drive capability, a 0.1 uF capacitor should be used to ground along with careful Vcc and Gnd Bus layout. GENERAL 4K DYNAMIC RAM SIMPLIFIED BLOCK DIAGRAM Data Input O ____}S Address AQ-A11 Bus MC3232A | Address 00-65 rd Refresh Enable Row Enable al Memory Control [a 4K N aK Dynamic Oynamic RAM RAM MCM4027 MCM4027 or Similar VY or Similar F- O Data Output a @) MOTOROLA Semiconductor Products inc.MC3232A Power-On Reset Note: TYPICAL APPLICATION 16K X 8-BIT MEMORY SYSTEM FOR M6800 MPU Numbers in parenthesis indicate Part types or values for 16K x 1 RAMs | c P=OR FR T x1, x2 on 7 MPU System MPU Crystal Clock MC6B800 (4 x MPU fg) T MC6875 $2 Ref Ref Control pare Req Grant Bus us Mem Address 1 Clk Bus AO-Al1 (AO A13) M.c Refresh Address a) Enable Multiplex DE and Data Refresh Buffer t2 Counter MC6880A Memory Control MC3232A Delay wae Row -@ RE Circuit 13 and Timing Enable - {MC3242A) MC3480 4 4 32 KHz tS Ref Clk Osciltator| asi RASZ S3_ RAS4 CAS R/W 66-05 {I {00 O06) Address Bus J L J CL zl C <7 Beta r Bus Memory Mewmaco7 4Kx8 4k x8 4K x8 Array (McM4116) (16k x 8) (16K x 8) (16K x 8) rt ft it _it 4-6 TT @) MOTOROLA Semiconductor Products inc. MC3232A OUTLINE DIMENSIONS RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION. 2. DIMENSION L TQ CENTER OF LEADS WHEN FORMED PARALLEL. Hoonnnnonoon L SUFFIX P SUFFIX 8 | CERAMIC PACKAGE PLASTIC PACKAGE 8 CASE 623-02 CASE 649-03 Il Syattyp) = 53C W 4 yaltyp) = 90C/W 1 12 . oe A ee SEATING PILANE LPF oT TT | 7 [= A P - A UI a, L AAAAAAAAAAAA NOTES: lel. clo ae ") 1, LEADS WITHIN 0.13 mms (0.005) G M Je am | > NOTES: 1. DIM "L" TO CENTER OF Oo LEADS WHEN FORMED ! 2 PARALLEL. VY VUE YU 2. LEADS WITHIN 0.13 mam fH (0.005) RADIUS OF TAVE POSITION AT SEATING + PF PLANE AT MAXIMUM Nv MATERIAL CONDITION. (WHEN FORMED PARALLEL) _ why wll ial lb Ss SEATING PLANE pel bee THERMAL INFORMATION The maximum power consumption an integrated circuit can tolerate at a given operating ambient temperature, can be found from the equation: Poitay = TJimax) ~TA ReyalTyp) Where: POIT A) = Power Dissipation allowable at a given operating ambient temperature. This must be greater than the sum of the products of the supply voltages and supply currents at the worst case operating condition. TJ(max) = Maximum Operating Junction Temperature as listed in the Maximum Ratings Section Ta = Maximum Desired Operating Ambient Temperature Rg JA(Typ) = Typical Thermal Resistance Junction to Ambient Circuit diagrams utilizing Motorola products are included as a means is believed to be entirely reliable. However, no responsibility is of illustrating typical semiconductor applications; consequently, assumed for inaccuracies. Furthermore, such information does not complete information sufficiant for construction purpases is not convey to the purchaser of the semiconductor devices described any necessarily given. The information has been carefully checked and license under the patent rights of Motorola Inc, or others. L__ (@ MOTOROLA Semiconductor Products inc. BOX 20912 PHOENIX. ARIZONA 85036 A SUBSIDIARY OF MOTOROLA INC 11886 PRINTED IN USA 8-78 IMPERIAL LITHO 673367 100 ADI 518