FOD073L LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler Features Description Low power consumption The FOD073L optocoupler consists of an AlGaAs LED optically coupled to a high gain split darlington photodetector. This device is specified to operate at a 3.3V supply voltage. Low input current: 0.5mA Dual channel 8-pin SOIC package High CTR: 400% minimum High CMR: 10kV/s Guaranteed performance over temperature 0C to 70C An integrated emitter - base resistor provides superior stability over temperature. The combination of a very low input current of 0.5mA and a high current transfer ratio of 2000% (typical) makes this device particularly useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to LVCMOS as well as high fan-out LVTTL requirements. U.L. recognized (File # E90700) LVTTL/LVCMOS Compatible output Applications Digital logic ground isolation - LVTTL/LVCMOS Telephone ring detector EIA-RS-232C line receiver An internal noise shield provides exceptional common mode rejection of 10kV/s. High common mode noise line receiver P bus isolation Current loop receiver Schematic Package Outline + 1 8 VCC VF1 _ 2 _ 3 7 V01 6 V02 VF2 + 4 (c)2004 Fairchild Semiconductor Corporation FOD073L Rev. 1.0 5 GND Truth Table LED VO ON LOW OFF HIGH www.fairchildsemi.com FOD073L -- LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler April 2009 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Value Units TSTG Storage Temperature -40 to +125 C TOPR Operating Temperature -40 to +85 C TSOL Lead Solder Temperature (Wave solder only. See reflow profile for surface mount devices) 260 for 10 sec C EMITTER IF (avg) DC/Average Forward Input Current Each Channel 20 mA IF (pk) Peak Forward Input Current (50% duty cycle, 1ms P.W.) Each Channel 40 mA Peak Transient Input Current (1s P. W., 300 pps) Each Channel 1.0 A VR Reverse Input Voltage Each Channel 5 V PD Input Power Dissipation Each Channel 35 mW Average Output Current Each Channel 60 mA Emitter-Base Reverse Voltage (FOD070L, FOD270L) Each Channel 0.5 V Supply Voltage, Output Voltage Each Channel -0.5 to 7 V Output power dissipation Each Channel 100 mW IF (trans) DETECTOR IO (avg) VEB VCC, VO PD (c)2004 Fairchild Semiconductor Corporation FOD073L Rev. 1.0 www.fairchildsemi.com 2 FOD073L -- LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler Absolute Maximum Ratings (No derating required up to 85C) Individual Component Characteristics Symbol Parameter Test Conditions Min. Typ.* Max. Unit 1.35 1.7 V EMITTER VF Input Forward Voltage TA =25C IF = 1.6mA (Each Channel) BVR Input Reverse Breakdown Voltage TA =25C, IR = 10A (Each Channel) 1.75 5.0 V DETECTOR IOH Logic High Output Current IF = 0 mA, VO = VCC = 3.3V (Each Channel) 0.05 25 A ICCL Logic Low Supply Current IF1 = IF2 = 1.6mA, VO1 = VO2 = Open, VCC = 3.3V 0.8 3 mA ICCH Logic High Supply Current IF1 = IF2 = 0mA, VO1 = VO2 = Open, VCC = 3.3V 0.01 2 A Transfer Characteristics Symbol Parameter CTR COUPLED Current Transfer Ratio (Note 1) VOL Logic Low Output Voltage Test Conditions Min. IF = 0.5mA, VO = 0.4V, VCC = 3.3V 400 Typ.* Max. Unit 7000 % V IF = 1.6mA, IO = 8mA, VCC = 3.3V 0.07 0.3 IF = 5mA, IO = 15mA, VCC = 3.3V 0.07 0.4 Switching Characteristics (VCC = 3.3 V) Symbol Parameter Typ.* Max. Unit TPHL Propagation Delay Time to Logic LOW RL = 4.7k, IF = 0.5mA (Fig. 9) 5 30 s TPLH Propagation Delay Time to Logic HIGH RL = 4.7k, IF = 0.5mA (Fig. 9) 25 90 s |CMH| Common Mode Transient IF = 0 mA, |VCM| = 10 VP-P, TA = 25C, Immunity at Logic HIGH RL = 2.2k (Note 2) (Fig. 10) Common Mode Transient IF = 1.6mA, |VCM| = 10 VP-P, RL = 2.2k, Immunity at Logic LOW TA = 25C (Note 2) (Fig. 10) |CML| Test Conditions Min. 1,000 10,000 V/s 1,000 10,000 V/s *All typicals at TA = 25C (c)2004 Fairchild Semiconductor Corporation FOD073L Rev. 1.0 www.fairchildsemi.com 3 FOD073L -- LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler Electrical Characteristics (TA = 0 to 70C unless otherwise specified) Isolation Characteristics Symbol II-O Characteristics Test Conditions Input-Output Insulation Leakage Current Relative humidity = 45%, TA = 25C, t = 5 s, VI-O = 3000 VDC (Note 3) VISO Withstand Insulation Test Voltage RH 50%, TA = 25C, II-O 2A, t = 1 min. (Note 3) RI-O Resistance (Input to Output) VI-O = 500 VDC (Note 3) CI-O Capacitance (Input to Output) f = 1 MHz (Notes 3, 4) Min. Typ.* Max. Unit 1.0 A 2500 VRMS 1012 0.7 pF II-I Input-Input Insulation Leakage Current RH 45%, VI-I = 500 VDC (Note 5) RI-I Input-Input Resistance VI-I = 500 VDC (Note 5) 1011 CI-I Input-Input Capacitance f = 1 MHz (Note 5) 0.03 pF 0.005 A *All typicals at TA = 25C Notes: 1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%. 2. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVCM/dt on the leading edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic high state (i.e., VO > 2.0V). Common mode transient immunity in logic low level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO<0.8 V). 3. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together. 4. CI-O is measured by shorting pins 1 and 2 or pins 3 and 4 together and pins 5 through 8 shorted together. 5. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together. (c)2004 Fairchild Semiconductor Corporation FOD073L Rev. 1.0 www.fairchildsemi.com 4 FOD073L -- LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler Electrical Characteristics (Continued) (TA = 0 to 70C unless otherwise specified) Fig. 2 Current Transfer Ratio vs. Input Forward Current Fig. 1 Input Forward Current vs Forward Voltage 3500 10 (%) RATIO(%) TRANSFERRATIO CURRENTTRANSFER CTR CTR--CURRENT IF - FORWARD CURRENT (mA) 100 TA = 85C TA = -40C TA = 70C 1 TA = 25C TA = 0C 0.1 0.01 0.001 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 3000 TA = 70C 2500 TA = 25C 2000 TA = 0C 1500 1000 TA = -40C 500 0 0.1 1.7 1 Fig. 3 DC Transfer Characterstics Fig. 4 Supply Current vs Input Forward Current 10 140 ICC - (Per Channel) - Supply Current (mA) TA = 25C VCC = 3.3V 120 IO - OUTPUT CURRENT (mA) 10 IF - FORWARD CURRENT (mA) VF - FORWARD VOLTAGE (V) IF = 5mA IF = 4.5mA 100 4mA 3.5mA 80 3mA 2.5mA 60 2mA 40 1.5mA 1mA 20 0.5mA 0 0.0 VO = 0.4V VCC = 3.3V TA = 25C TA = 85C 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 TA = 25C VCC = 3.3V 1 0.1 0.01 0.1 2.0 1 10 IF - Input Forward Current (mA) V O - OUTPUT VOLTAGE (V) Fig. 5 Output Current vs Input Forward Current Fig. 6 Propagation Delay vs. Ambient Temperature 70 60 TA = 70C, 85C tP - Propagation Delay (s) IO - Output Current (mA) 100 TA = -40C TA = 0C 10 TA = 25C 1 VO = 0.4V VCC = 3.3V TA = 25C 0.1 0.1 1 40 tPLH 30 20 10 tPHL 0 -40 10 -20 0 20 40 60 80 100 TA - Ambient Temperature (C) IF - Forward Current (mA) (c)2004 Fairchild Semiconductor Corporation FOD073L Rev. 1.0 50 VCC = 3.3V IF = 0.5mA RL = 4.7k 1/f = 100s Duty Cycle = 10% www.fairchildsemi.com 5 FOD073L -- LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler Typical Performance Curves Fig. 7 Propagation Delay To Logic Low vs Pulse Period Fig. 8 Propagation Delay vs. Input Forward Current TA = 25C VCC = 3.3V I = 0.5mA RL = 4.7k Duty Cycle = 50s TA = 25C VCC = 3.3V RL = 4.7k 1/f = 100s Duty Cycle = 10% 10 10 1 26 tPLH 8 24 6 22 4 20 2 18 tPHL 0 0.01 0.1 1 0 10 2 3 4 5 6 7 8 9 16 10 I F - Input Forward Current (mA) T - Pulse Period (ms) (c)2004 Fairchild Semiconductor Corporation FOD073L Rev. 1.0 1 tPLH - Propagation Delay to Logic High (s) tPHL - Propagation Delay to Logic Low (s) tPHL - Propagation Delay to Logic Low (s) 28 12 100 www.fairchildsemi.com 6 FOD073L -- LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler Typical Performance Curves (Continued) IF Noise Shield + 1 VCC 8 - IF MONITOR 2 7 3 6 4 5 +3.3 V IF 0.1 F RL V01 VF1 VO C L = 15 pF* V02 VF2 + Rm 3.3 V VO 50% 50% GND VOL TPHL TPLH *Includes Probe and Fixture Capacitance Fig. 9 Switching Time Test Circuit + IF Noise Shield 1 8 VCC VF1 - +3.3 V RL 2 7 V01 A B VFF - 3 6 4 5 VF2 + V02 VCM 10 V 90% VO 0.1 F 0V 90% 10% tr GND VO 10% tf 3.3 V Switch at A : I F = 0 mA + VO VCM - VOL Switch at B : I F = 1.6 mA Pulse Gen Fig. 10 Common Mode Immunity Test Circuit (c)2004 Fairchild Semiconductor Corporation FOD073L Rev. 1.0 www.fairchildsemi.com 7 FOD073L -- LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler Pulse Generator tr = 5ns Z O = 50 V FOD073L -- LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler Ordering Information Option Order Entry Identifier No Suffix FOD073L Shipped in tubes (50 units per tube) R2 FOD073LR2 Tape and reel (2,500 units per reel) Description Marking Information 73L 1 X YY S 3 2 5 4 Definitions 1 Fairchild logo 2 Device number 3 One digit year code, e.g., `3' 4 Two digit work week ranging from `01' to `53' 5 Assembly package code (c)2004 Fairchild Semiconductor Corporation FOD073L Rev. 1.0 8 www.fairchildsemi.com 8.0 0.10 2.0 0.05 3.50 0.20 0.30 MAX O1.5 MIN 1.75 0.10 4.0 0.10 5.5 0.05 8.3 0.10 5.20 0.20 0.1 MAX 6.40 0.20 12.0 0.3 O1.5 0.1 User Direction of Feed Dimensions in mm (c)2004 Fairchild Semiconductor Corporation FOD073L Rev. 1.0 9 www.fairchildsemi.com FOD073L -- LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler Carrier Tape Specifications FOD073L -- LVTTL/LVCMOS Compatible Low Input Current High Gain Split Darlington Optocoupler Reflow Profile Temperature (C) TP 260 240 TL 220 200 180 160 140 120 100 80 60 40 20 0 Max. Ramp-up Rate = 3C/S Max. Ramp-down Rate = 6C/S tP Tsmax tL Preheat Area Tsmin ts 120 240 360 Time 25C to Peak Time (seconds) Profile Freature Pb-Free Assembly Profile Temperature Min. (Tsmin) 150C Temperature Max. (Tsmax) 200C Time (tS) from (Tsmin to Tsmax) 60-120 seconds Ramp-up Rate (tL to tP) 3C/second max. Liquidous Temperature (TL) 217C Time (tL) Maintained Above (TL) 60-150 seconds Peak Body Package Temperature 260C +0C / -5C Time (tP) within 5C of 260C 30 seconds Ramp-down Rate (TP to TL) 6C/second max. Time 25C to Peak Temperature (c)2004 Fairchild Semiconductor Corporation FOD073L Rev. 1.0 8 minutes max. www.fairchildsemi.com 10 TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. 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