FS6372 ROM-Based 3-PLL Clock Generator IC 1.0 Features 2.0 Fully compatible with FS6370 (EEPROM-based) and FS6377 (register-based) devices. * Three on-chip PLLs with Reference and Feedback Dividers set by internal ROM look-up table * Four independently programmable muxes and post dividers * Selectable power-down of PLLs and shutdown of output clock drivers * Tristate outputs for board testing * Can be optimized for reference clock (instead of crystal) input * 5V to 3.3V operation * Commercial (FS6372) and industrial (FS6372i) temperature ranges The FS6372 is a CMOS clock generator IC designed to minimize cost and component count in a variety of electronic systems. Three phase-locked loops feeding four muxes and post dividers provide a high degree of flexibility. Figure 1: Pin Configuration VSS 1 16 VDD SELECT 2 15 CLK_A PD 3 14 VDD VSS 4 13 CLK_B XIN 5 12 CLK_C XOUT/REFIN 6 11 VSS OE 7 10 CLK_D VDD 8 9 n/c FS6372-xx * Description 16-pin (0.150") SOIC Figure 2: Block Diagram XIN XOUT PD Reference Oscillator PLL A Mux A Post Divider A CLK_A Power Down Control PLL B Mux B Post Divider B CLK_B ROM PLL C Mux C Post Divider C CLK_C Mux D Post Divider D CLK_D SELECT OE FS6372 IAmerican Microsystems, Inc., reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. ISO9001 3.1.02 FS6372 ROM-Based 3-PLL Clock Generator IC Table 1: Pin Descriptions Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DIU = Input with Internal Pull-Up; DID = Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input, DO = Digital Output; P = Power/Ground; # = Active Low pin PIN TYPE NAME 1 P VSS U SELECT DESCRIPTION Ground 2 DI 3 DIU PD Power-Down Input 4 P VSS Ground 5 AI XIN Crystal Oscillator Input 6 AO XOUT / REFIN 7 DIU OE 8 P VDD 9 - N/C 10 DO CLK_D Selects different device function (refer to specific variation of FS6372-xx for details) Crystal Oscillator Output / Reference Clock Input Output Enable Input Power Supply (5V to 3.3V) No Connect D Clock Output 11 P VSS 12 DO CLK_C Ground C Clock Output 13 DO CLK_B B Clock Output 14 P VDD 15 DO CLK_A 16 P VDD Power Supply (5V to 3.3V) A Clock Output Power Supply (5V to 3.3V) 3.1.02 FS6372 ROM-Based 3-PLL Clock Generator IC 3.0 Electrical Specifications Table 2: Absolute Maximum Ratings Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These conditions represent a stress rating only, and functional operation of the device at these or any other conditions above the operational limits noted in this specification is not implied. Exposure to maximum rating conditions for extended conditions may affect device performance, functionality, and reliability. PARAMETER SYMBOL MIN. Supply Voltage, dc (VSS = ground) MAX. UNITS VDD VSS-0.5 7 V Input Voltage, dc VI VSS-0.5 VDD+0.5 V Output Voltage, dc VO VSS-0.5 VDD+0.5 V Input Clamp Current, dc (VI < 0 or VI > VDD) IIK -50 50 mA Output Clamp Current, dc (VI < 0 or VI > VDD) IOK -50 50 mA Storage Temperature Range (non-condensing) TS -65 150 C Ambient Temperature Range, Under Bias TA -55 Junction Temperature TJ Lead Temperature (soldering, 10s) 125 C 150 C 260 C 2 kV Input Static Discharge Voltage Protection (MIL-STD 883E, Method 3015.7) CAUTION: ELECTROSTATIC SENSITIVE DEVICE Permanent damage resulting in a loss of functionality or performance may occur if this device is subjected to a high-energy electrostatic discharge. Table 3: Operating Conditions PARAMETER SYMBOL Supply Voltage VDD Ambient Operating Temperature Range TA Crystal Resonator Frequency fXIN Crystal Resonator Load Capacitance CXL Output Driver Load Capacitance CL CONDITIONS/DESCRIPTION 5V 10% 3.3V 10% Commercial Industrial Parallel resonant, AT cut MIN. TYP. MAX. 4.5 5 5.5 3 3.3 3.6 0 70 -40 85 5 27 18 UNITS V C MHz pF 15 pF 3.1.02 ISO9001 3 FS6372 ROM-Based 3-PLL Clock Generator IC AMERICAN MICROSYSTEMS, INC. March 2002 Table 4: DC Electrical Specifications Unless otherwise stated, VDD = 5.0V 10%, no load on any output, and ambient temperature range TA = 0C to 70C. Parameters denoted with an asterisk ( * ) represent nominal characterization data and are not currently production tested to any specific limits. MIN and MAX characterization data are 3 from typical. Negative currents indicate current flows out of the device. PARAMETER SYMBOL CONDITIONS/DESCRIPTION MIN. TYP. MAX. UNITS Overall Supply Current, Dynamic, with Loaded Outputs IDD VDD = 5.5V, fCLK = 50MHz, CL = 15pF 43 mA Supply Current, Static IDDL VDD = 5.5V, device powered down 0.3 mA Power-Down, Output Enable Pins (PD, OE) High-Level Input Voltage VIH Low-Level Input Voltage VIL Hysteresis Voltage Vhys High-Level Input Current IIH Low-Level Input Current (pull-up) IIL VDD = 5.5V 3.85 VDD+0.3 VDD = 3.6V 2.52 VDD+0.3 VDD = 5.5V VSS-0.3 1.65 VDD = 3.6V VSS-0.3 1.08 VDD = 5.5V 2.20 VDD = 3.6V 1.44 -1 -36 V V V 1 A -80 A VIL = 0V -20 VDD = 5.5V 2.4 VDD+0.3 VDD = 3.6V 2.0 VDD+0.3 VDD = 5.5V VSS-0.3 0.8 VDD = 3.6V VSS-0.3 0.8 1 A -80 A Select (SELECT) High-Level Input Voltage VIH Low-Level Input Voltage VIL High-Level Input Current IIH -1 Low-Level Input Current (pull-up) IIL -20 -36 V V Crystal Oscillator Feedback (XIN) Threshold Bias Voltage VTH High-Level Input Current IIH Low-Level Input Current IIL Crystal Loading Capacitance * Input Loading Capacitance * VDD = 5.5V 2.9 VDD = 3.6V 1.7 VDD = 5.5V V A 54 VDD = 5.5V, oscillator powered down VDD = 5.5V 5 -25 -54 15 mA -75 A CL(xtal) As seen by an external crystal connected to XIN and XOUT 18 pF CL(XIN) As seen by an external clock driver on XOUT; XIN unconnected 36 pF 3.1.02 ISO9001 4 FS6372 ROM-Based 3-PLL Clock Generator IC Table 5: DC Electrical Specifications, continued Unless otherwise stated, VDD = 5.0V 10%, no load on any output, and ambient temperature range TA = 0C to 70C. Parameters denoted with an asterisk ( * ) represent nominal characterization data and are not currently production tested to any specific limits. MIN and MAX characterization data are 3 from typical. Negative currents indicate current flows out of the device. PARAMETER SYMBOL CONDITIONS/DESCRIPTION MIN. TYP. MAX. UNITS Crystal Oscillator Drive (XOUT) High-Level Output Source Current IOH VDD = V(XIN) = 5.5V, VO = 0V 10 21 30 mA Low-Level Output Sink Current IOL VDD = 5.5V, V(XIN) = 0V, VO = 5.5V -10 -21 -30 mA Clock Outputs (CLK_A, CLK_B, CLK_C, CLK_D) High-Level Output Source Current IOH VO = 2.4V -125 mA Low-Level Output Sink Current IOL VO = 0.4V 23 mA zOH VO = 0.5VDD; output driving high 29 zOL VO = 0.5VDD; output driving low 27 Output Impedance Tristate Output Current IZ -10 A 10 Short Circuit Source Current * ISCH VDD = 5.5V, VO = 0V; shorted for 30s, max. -150 mA Short Circuit Sink Current * ISCL VDD = VO = 5.5V, shorted for 30s, max. 123 mA Figure 3: CLK_A, CLK_B, CLK_C, CLK_D Clock Outputs MIN. TYP. MAX. Voltage (V) 0 0.2 0.5 0.7 1 1.2 1.5 1.7 2 2.2 2.5 2.7 3 3.5 4 0 9 22 29 39 44 51 55 60 62 65 65 66 67 68 0 11 25 34 46 52 61 66 73 77 81 83 85 87 88 0 12 29 40 55 64 76 83 92 97 104 108 112 117 119 0 0.5 1 1.5 2 2.5 2.7 3 3.2 3.5 3.7 4 4.2 4.5 4.7 4.5 5 5.5 69 High Drive Current (mA) MIN. TYP. MAX. -87 -85 -83 -80 -74 -65 -61 -53 -48 -39 -32 -21 -13 0 -112 -110 -108 -104 -97 -88 -84 -77 -71 -62 -55 -44 -36 -24 -15 -150 -147 -144 -139 -131 -121 -116 -108 -102 -92 -85 -74 -65 -52 -43 89 120 5 0 -28 91 121 5.2 -11 123 5.5 0 15 0 10 0 50 Output Current (mA) Low Drive Current (mA) Voltage (V) 0 - 0 .5 1.0 1 .5 2 .0 2.5 3.0 3 .5 4.0 4.5 5 .0 5.5 -5 0 -10 0 -15 0 M IN T YP -20 0 O utpu t V o lta ge (V ) MAX The data in this table represents nominal characterization data only. 3.1.02 ISO9001 5 FS6372 ROM-Based 3-PLL Clock Generator IC AMERICAN MICROSYSTEMS, INC. March 2002 Table 6: AC Timing Specifications Unless otherwise stated, VDD = 5.0V 10%, no load on any output, and ambient temperature range TA = 0C to 70C. Parameters denoted with an asterisk ( * ) represent nominal characterization data and are not currently production tested to any specific limits. MIN and MAX characterization data are 3 from typical. PARAMETER SYMBOL CONDITIONS/DESCRIPTION CLOCK (MHz) MIN. TYP. MAX. UNITS Overall Output Frequency * VCO Frequency * fO fVCO Rise Time * tr Fall Time * tf VDD = 5.5V 0.8 150 VDD = 3.6V 0.8 100 VDD = 5.5V 40 230 VDD = 3.6V 40 170 VO = 0.5V to 4.5V; CL = 15pF 1.9 VO = 0.3V to 3.0V; CL = 15pF 1.6 VO = 4.5V to 0.5V; CL = 15pF 1.8 VO = 3.0V to 0.3V; CL = 15pF 1.5 MHz MHz ns ns Tristate Enable Delay * tPZL, tPZH 1 8 ns Tristate Disable Delay * tPLZ, tPHZ 1 8 ns Clock Stabilization Time * tSTB Output active from power-up, via PD pin s 100 Clock Outputs (PLL A clock via CLK_A pin) Duty Cycle * Jitter, Long Term (y()) * Jitter, Period (peak-peak) * tj(LT) tj(P) Ratio of pulse width (as measured from rising edge to next falling edge at 2.5V) to one clock period 100 On rising edges 500s apart at 2.5V relative to an ideal clock, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, No other PLLs active 100 45 On rising edges 500s apart at 2.5V relative to an ideal clock, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, all other PLLs active (B=60MHz, C=40MHz, D=14.318MHz) 50 165 From rising edge to the next rising edge at 2.5V, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, No other PLLs active 100 110 From rising edge to the next rising edge at 2.5V, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, all other PLLs active (B=60MHz, C=40MHz, D=14.318MHz) 50 390 45 55 % ps ps 3.1.02 ISO9001 6 FS6372 ROM-Based 3-PLL Clock Generator IC Table 7: AC Timing Specifications, continued Unless otherwise stated, VDD = 5.0V 10%, no load on any output, and ambient temperature range TA = 0C to 70C. Parameters denoted with an asterisk ( * ) represent nominal characterization data and are not currently production tested to any specific limits. MIN and MAX characterization data are 3 from typical. PARAMETER SYMBOL CLOCK (MHz) MIN. Ratio of pulse width (as measured from rising edge to next falling edge at 2.5V) to one clock period 100 45 On rising edges 500s apart at 2.5V relative to an ideal clock, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, No other PLLs active 100 45 On rising edges 500s apart at 2.5V relative to an ideal clock, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, all other PLLs active (A=50MHz, C=40MHz, D=14.318MHz) 60 75 100 120 60 400 CONDITIONS/DESCRIPTION TYP. MAX. UNITS 55 % Clock Outputs (PLL B clock via CLK_B pin) Duty Cycle * Jitter, Long Term (y()) * Jitter, Period (peak-peak) * tj(LT) tj(P) From rising edge to the next rising edge at 2.5V, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, No other PLLs active From rising edge to the next rising edge at 2.5V, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, all other PLLs active (A=50MHz, C=40MHz, D=14.318MHz) ps ps Clock Outputs (PLL_C clock via CLK_C pin) Duty Cycle * Jitter, Long Term (y()) * Jitter, Period (peak-peak) * tj(LT) tj(P) Ratio of pulse width (as measured from rising edge to next falling edge at 2.5V) to one clock period 100 On rising edges 500s apart at 2.5V relative to an ideal clock, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, No other PLLs active 100 45 On rising edges 500s apart at 2.5V relative to an ideal clock, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, all other PLLs active (A=50MHz, B=60MHz, D=14.318MHz) 40 105 100 120 From rising edge to the next rising edge at 2.5V, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, No other PLLs active From rising edge to the next rising edge at 2.5V, CL=15pF, fXIN=14.318MHz, NF=220, NR=63, NPx=50, all other PLLs active (A=50MHz, B=60MHz, D=14.318MHz) 45 55 % ps ps 40 440 Clock Outputs (Crystal Oscillator via CLK_D pin) Duty Cycle * Jitter, Long Term (y()) * Jitter, Period (peak-peak) * tj(LT) tj(P) Ratio of pulse width (as measured from rising edge to next falling edge at 2.5V) to one clock period 14.318 On rising edges 500s apart at 2.5V relative to an ideal clock, CL=15pF, fXIN=14.318MHz, No other PLLs active 14.318 20 From rising edge to the next rising edge at 2.5V, CL=15pF, fXIN=14.318MHz, all other PLLs active (A=50MHz, B=60MHz, C=40MHz) 14.318 40 From rising edge to the next rising edge at 2.5V, CL=15pF, fXIN=14.318MHz, No other PLLs active 14.318 90 From rising edge to the next rising edge at 2.5V, CL=15pF, fXIN=14.318MHz, all other PLLs active (A=50MHz, B=60MHz, C=40MHz) 14.318 450 45 55 % ps ps 3.1.02 ISO9001 7 FS6372 ROM-Based 3-PLL Clock Generator IC AMERICAN MICROSYSTEMS, INC. March 2002 4.0 Package Information Table 8: 16-pin SOIC (0.150") Package Dimensions DIMENSIONS INCHES MIN. MAX. 16 MILLIMETERS MIN. MAX. A 0.061 0.068 1.55 1.73 A1 0.004 0.0098 0.102 0.249 A2 0.055 0.061 1.40 1.55 B 0.013 0.019 0.33 0.49 C 0.0075 0.0098 0.191 0.249 D 0.386 0.393 9.80 9.98 E 0.150 0.157 3.81 3.99 R e 0.050 BSC E 1 ALL RADII: 0.005" TO 0.01" B 0.230 0.244 5.84 6.20 h 0.010 0.016 0.25 0.41 L 0.016 0.035 0.41 0.89 0 8 0 8 h x 45 7 typ. e 1.27 BSC H H AMERICAN MICROSYSTEMS, INC. A2 D A A1 BASE PLANE C L SEATING PLANE Table 9: 16-pin SOIC (0.150") Package Characteristics PARAMETER SYMBOL Thermal Impedance, Junction to Free-Air 16-pin 0.150" SOIC JA Lead Inductance, Self L11 CONDITIONS/DESCRIPTION TYP. UNITS Air flow = 0 m/s 110 C/W Corner lead 4.0 Center lead 3.0 nH Lead Inductance, Mutual L12 Any lead to any adjacent lead 0.4 nH Lead Capacitance, Bulk C11 Any lead to VSS 0.5 pF 3.1.02 ISO9001 8 FS6372 ROM-Based 3-PLL Clock Generator IC 5.0 Ordering Information 5.1 Device Ordering Codes DEVICE NUMBER ORDERING CODE PACKAGE TYPE OPERATING TEMPERATURE RANGE SHIPPING CONFIGURATION 11486-802 16-pin (0.150") SOIC (Small Outline Package) 0C to 70C (Commercial) Tape-and-Reel 11486-812 16-pin (0.150") SOIC (Small Outline Package) 0C to 70C (Commercial) Tubes 11486-902 16-pin (0.150") SOIC (Small Outline Package) -40C to 85C (Industrial) Tape-and-Reel 11486-912 16-pin (0.150") SOIC (Small Outline Package) -40C to 85C (Industrial) Tubes FS6372 Copyright (c) 2000 American Microsystems, Inc. Devices sold by AMI are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMI makes no warranty, express, statutory implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. AMI makes no warranty of merchantability or fitness for any purposes. AMI reserves the right to discontinue production and change specifications and prices at any time and without notice. AMI's products are intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not recommended without additional processing by AMI for such applications. American Microsystems, Inc., 2300 Buckskin Rd., Pocatello, ID 83201, (208) 233-4690, FAX (208) 234-6796, WWW Address: http://www.amis.com E-mail: tgp@amis.com 3.1.02 ISO9001 9