GLS85LD0512-60-RI-LBTE - Greenliant

Data Sheet

www.greenliant.com

Features

• Industry Standard ATA/IDE Bus Interface

– Host Interface: 16-bit access

– Supports up to PIO Mode-6

– Supports up to Multi-word DMA Mode-4

– Supports up to Ultra DMA Mode-4

• Low Power, 3.3V Power Supply

• 5.0V or 3.3V Host Interface Through VDDQ Pins

• Low Current Operation:

– Active mode: 85 mA Typical

– Sleep mode: 160 µA Typical

• Power Management Unit

– Immediate disabling of unused circuitry without host

intervention

– Zero wake-up latency

• Expanded Data Protection

– WP#/PD# pin configurable by firmware for

prevention of data overwrites

• 20-byte Unique ID for Enhanced Security

– Factory Pre-programmed 10-byte Unique ID

– User-Programmable 10-byte ID

• Integrated Voltage Detector

– Prevents data loss due to unexpected power-down or

brownout.

• Endurance

– 100 Million write cycles for NANDrive with advanced

NAND management technology

•Data Retention

– 10 years

• Pre-programmed Embedded Firmware

– Executes industry standard ATA/IDE commands

– Implements dynamic wear-leveling algorithms to sub-

stantially increase the longevity of flash media

– Embedded Flash File System

• Robust Built-in ECC

• Multi-tasking Technology Enables Fast

Sustained Write Performance (Host-to-Flash)

– Up to 20 MByte/sec

• Fast Sustained Read Performance (Flash-to-Host)

– Up to 30 MByte/sec

• Industrial Temperature Range

– -40°C to +85°C for industrial operation

• LBGA package

– 12mm x 24mm

• All Devices are RoHS Compliant

512 MByte/ 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

The GLS85LD0512 / GLS85LD1001T / GLS85LD1002U NANDrive™ solid-state drive

(SSD) combines a NAND controller and 512 MBytes / 1 GByte / 2 GBytes of NAND flash in a

multi-chip package. It provides complete ATA/IDE hard disk drive functionality in a small pack-

age for easy, space-saving mounting to a system motherboard. This makes the

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U NANDrive SSD the ideal data storage

solution for mobile and embedded electronic products that require smaller and more reliable

storage.

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Product Description

The GLS85LD0512, GLS85LD1001T and GLS85LD1002U NANDrive™ solid-state drives (SSD)

are high-performance, fully-integrated, embedded flash solid state drives. They combine an inte-

grated ATA Controller and either 512 MByte, 1 GByte, or 2 GByte of NAND Flash in a multi-chip

package. These products are ideal for industrial grade solid state mass storage applications offer-

ing new and expanded functionality while enabling cost effective designs.

ATA-based solid state mass storage technology is widely used in portable and desktop computers,

digital cameras, music players, handheld data collection scanners, cellular phones, PCS phones,

PDAs, handy terminals, personal communicators, robotics, audio recorders, monitoring devices,

and set-top boxes.

Greenliant NANDrive is a single device, solid state drive designed for embedded ATA/IDE protocol

systems and supports standard ATA/IDE protocol with up to PIO Mode-6, Multi-word DMA Mode-4

and Ultra DMA Mode-4 interface. The built in microcontroller and file management firmware com-

municates with ATA standard interfaces; thereby eliminating the need for additional or proprietary

software such as Flash File System (FFS) and Memory Technology Driver (MTD) software.

The GLS85LD0512 / GLS85LD1001T / GLS85LD1002U NANDrives provide complete IDE Hard

Disk Drive functionality and compatibility in a 12mm x 24mm BGA package for easy, space saving

mounting to a system motherboard. It is a perfect solution for portable, consumer electronic prod-

ucts requiring smaller and more reliable data storage.

The NANDrive provides a WP#/PD# pin to protect critical information stored in the flash media

from unauthorized overwrites.

The NANDrive is pre-programmed with a 10-byte unique serial ID. For even greater system secu-

rity, the user has the option of programming an additional 10 Bytes of ID space to create a unique,

20-byte ID.

NANDrive SSD is available with advanced NAND management technology, a NAND memory

management technology that enhances data security, significantly improves endurance, and accu-

rately predicts the minimum life span of NAND flash devices. Advanced NAND management tech-

nology combines NAND controller hardware error correction, advanced wear leveling algorithms,

and bad block management to extend the life of the product.

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

General Description

Each NANDrive contains an integrated ATA Controller and one or more NAND Flash dice in a

LBGA package. Refer to Figure 1 for the NANDrive block diagram.

Performance-optimized NANDrive

The heart of the NANDrive is the ATA Flash Disk Controller which translates standard ATA signals

into flash media data and control signals. The following components contribute to the NANDrive’s

operation.

Microcontroller Unit (MCU)

The MCU translates ATA/IDE commands into data and control signals required for flash media oper-

ation.

Internal Direct Memory Access (DMA)

The NANDrive uses internal DMA allowing instant data transfer from buffer to flash media. This

implementation eliminates microcontroller overhead associated with the traditional, firmware-

based approach, thereby increasing the data transfer rate.

Power Management Unit (PMU)

The power management unit controls the power consumption of the NANDrive. The PMU dramat-

ically reduces the power consumption of the NANDrive by putting the part of the circuitry that is not

in operation into sleep mode.

SRAM Buffer

A key contributor to the NANDrive performance is an SRAM buffer. The buffer optimizes the host’s

data transfer to and from the flash media.

Embedded Flash File System

The embedded flash file system is an integral part of the NANDrive. It contains MCU firmware that

performs the following tasks:

1. Translates host side signals into flash media writes and reads.

2. Provides dynamic flash media wear leveling to spread the flash writes to increase the

longevity of flash media.

3. Keeps track of data file structures.

Error Correction Code (ECC)

High performance is achieved through optimized hardware error detection and correction.

Serial Communication Interface (SCI)

The Serial Communication Interface (SCI) is designed for manufacturing error reporting. Always

provide SCI interface access to PCB design to aid in design validation.

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Multi-tasking Interface

The multi-tasking interface enables fast, sustained write performance by allowing concurrent

Read, Program, and Erase operations to multiple flash media devices.

Advanced NAND Management Technology

Advanced NAND management technology balances the wear on erased blocks with an advanced

wear-leveling scheme which provides a minimum of 100 million product write cycles. Advanced

NAND management technology tracks the number of program/erase cycles within a group. When

the host updates data, higher priority is given to the less frequently written erase blocks; thereby,

evenly distributing host writes within a wear-leveling group.

Advanced NAND management technology enhances NANDrive security with password protection

and four independent protection zones which can be set to Read-only or Hidden.

Functional Blocks

Figure 1: NANDrive Block Diagram

1382 B1.1

HOST

ATA/IDE

BUS

NAND Controller

Multi-tasking Interface

SCI

NAND

Flash

NANDrive

Embedded

Flash

File System MCU

ECC

Internal

DMA

SRAM Buffer

PMU

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Pin Assignments

The signal/pin assignments are listed in Figure 2. Low active signals have a “#” suffix. Pin types

are Input, Output, or Input/Output. Signals whose source is the host are designated as inputs while

signals that the NANDrive sources are outputs.

The NANDrive functions in ATA mode, which is compatible with IDE hard disk drives.

Figure 2: Pin Assignments for 91-Ball LBGA

SCID

OUT

D9 D10 D13 D15 IOCS16# A2 CS3FX# DNU DNU

SCID

SCICLK D8 V

D12 POR# V

DNU DNU DNU

DNU DNU WP#/PD#

GND

DNU DNU DNU

DNU

DNU DNU V

DNU DNU

DNU RESET# D7 V

D6 IORDY V

DNU DNU DNU

DNU D5 D3 D2 D4 DMARQ A1 CS1FX# DNU DNU

VREG V

DDQ

D1 D0 IORD# INTRQ DMACK# A0 V

DNU

ABCDEFGHJKLMNPRT

DASP# V

D11 D14 IOWR# V

PDIAG# CSEL V

DDQ

DNU

TOP VIEW (balls facing down)

1382 91-lbz P1.3

DNU

DNU DNU

DNU

DNU DNU

DNU

DNU DNU

DNU

DNU DNU

DNU

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Table 1: Pin Assignments (1 of 3)

Symbol

Pin No. Pin

Type

I/O

Type Name and Functions

91-TFBGA

Host Side Interface

A2 K8

I I1Z A[2:0] are used to select one of eight registers in the Task File.A1 K3

A0 L2

D15 H8

I/O I1Z/O2 D[15:0] Data bus

D14 G9

D13 G8

D12 H7

D11 F9

D10 F8

D9 E8

D8 F7

D7 F4

D6 H4

D5 E3

D4 H3

D3 F3

D2 G3

D1 F2

D0 G2

DMACK# K2 I I2U DMA Acknowledge - input from host

DMARQ J3 O O1 DMA Request to host

CS1FX# L3

II2Z

CS1FX# is the chip select for the task file registers

CS3FX# L8 CS3FX# is used to select the alternate status register and the Device

Control register.

CSEL L9 I I1U This internally pulled-up signal is used to configure this device as a

Master or a Slave. When this pin is grounded, this device is configured

as a Master. When the pin is open, this device is configured as a

Slave. The pin setting should remain the same from Power-on to

Power-down.

IORD# H2 I I2Z

IORD#: This is an I/O Read Strobe generated by the host. When Ultra

DMA mode is not active, this signal gates I/O data from the device.

HDMARDY#: In Ultra DMA mode when DMA Read is active, this sig-

nal is asserted by the host to indicate that the host is ready to receive

Ultra DMA data-in bursts. The host may negate HDMARDY# to pause

an Ultra DMA transfer.

HSTROBE: When DMA Write is active, this signal is the data-out

strobe generated by the host. Both the rising and falling edges of

HSTROBE cause data to be latched by the device. The host may stop

generating HSTROBE edges to pause an Ultra DMA data-out burst.

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

IOWR# H9 I I2Z

IOWR#: This is an I/O Write Strobe generated by the host. When Ultra

DMA mode is not active, this signal is used to clock I/O data into the

device.

STOP: When Ultra DMA mode protocol is active, the assertion of this

signal causes the termination of the Ultra DMA burst

IORDY J4 O I2Z

IORDY: When Ultra DMA mode DMA Write is not active and the

device is not ready to respond to a data transfer request, this signal is

negated to extend the Host transfer cycle. However, it is never

negated by this controller.

DDMARDY#: When Ultra DMA mode DMA Write is active, this signal

is asserted by the host to indicate that the device is ready to receive

Ultra DMA data-in bursts. The device may negate DDMARDY# to

pause an Ultra DMA transfer.

DSTROBE: When Ultra DMA mode DMA Read is active, this signal is

the data-out strobe generated by the device. Both the rising and falling

edges of DSTROBE cause data to be latched by the host. The device

may stop generating DSTROBE edges to pause an Ultra DMA data-

out burst.

IOCS16# J8 O O2 This output signal is asserted low when the device is indicating a word

data transfer cycle.

INTRQ J2 O O1 This signal is the active high Interrupt Request to the host.

PDIAG# K9 I/O I1U/O1 The Pass Diagnostic signal in the Master/Slave handshake protocol.

DASP# D9 I/O I1U/O6 The Drive Active/Slave Present signal in the Master/Slave handshake

protocol.

RESET# E4 I I2U This input pin is the active low hardware reset from the host.

WP#/PD# F6 I I3U The WP#/PD# pin can be used for either the Write Protect mode or

Power-down mode, but only one mode is active at any time. The Write

Protect or Power-down modes can be selected through the host com-

mand. The Write Protect mode is the factory default setting.

Serial Communication Interface (SCI)

SCIDOUT D8 O O4 SCI interface data output

SCIDIN D7 I I3U SCI interface data input

SCICLK E7 I I3U SCI interface clock

Miscellaneous

VSS G4, G6, G7,

K4, K6, K7,

PWR Ground

VDD E9, K5,

L5, M2 PWR VDD (3.3V)

VDDQ E2, M9 PWR VDDQ (5V/3.3V) for Host interface

POR# J7 I Analog

Input1

Power-on Reset (POR). Active Low

VREG D2 O External capacitor pin

Table 1: Pin Assignments (Continued) (2 of 3)

Symbol

Pin No. Pin

Type

I/O

Type Name and Functions

91-TFBGA

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

DNU D3, D4, D5,

D6, E5,E6,

F5, G5, L4,

L6, L7, M3,

M4,M5,

M6,M7, M8,

N2, N3, N4,

N5, N6, N7,

N8, N9, R9,

R10,T9,

T10,A1, A2,

A9, A10,B1,

B9,B10, R1,

R2, T1, T2

Do not use.

T1.4 1382

1. Analog input for supply voltage detection

Table 1: Pin Assignments (Continued) (3 of 3)

Symbol

Pin No. Pin

Type

I/O

Type Name and Functions

91-TFBGA

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Capacity Specification

Table 2 shows the default capacity and specific settings for heads, sectors, and cylinders. Users can

change the default settings in the drive ID table using the Identity-Drive command. If the total number of

bytes is less than the default, the remaining space could be used as spares to increase the flash drive

endurance. It should also be noted that if the total flash drive capacity exceeds the total default number

of bytes, the flash drive endurance will be reduced.

Table 1: Default NANDrive Settings

Capacity Total Bytes Cylinders Heads Sectors Max LBA

512 MByte 512,483,328 993 16 63 1,000,944

1 GByte 1,024,966,656 1986 16 63 2,001,888

2 GByte 2,048,385,024 3969 16 63 4,000,752

T1.6 1382

Table 2: Sustained Performance

Product Write Performance Read Performance

GLS85LD0512-60-RI-LBTE Up to 5 MByte/sec Up to 17 MByte/sec

GLS85LD1001T-60-RI-LBTE Up to 10 MByte/sec Up to 30 MByte/sec

GLS85LD1002U-60-RI-LBTE Up to 20 MByte/sec Up to 30 MByte/sec

T2.1382

Table 3: Supported ATA Modes

Products PIO MWDMA UltraDMA

GLS85LD0512-60-RI-LBTE

GLS85LD1001T-60-RI-LBTE

GLS85LD1002U-60-RI-LBTE

Up to Mode-6 Up to Mode-4 Up to Mode-4

T3.1382

Table 4: Advanced NAND Management Technology Write Cycles

Product

Write Cycles per

Group

Number of Groups

per Product

Wear-leveling

Group Size Cluster Size

GLS85LD0512-60-RI-LBTE 100M 4 128 MBytes 2 KBytes

GLS85LD1001T-60-RI-LBTE 100M 4 256 MBytes 4 KBytes

GLS85LD1002U-60-RI-LBTE 100M 4 512 MBytes 8 KBytes

T4.1382

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Configurable Write Protect/Power-down Modes

The WP#/PD# pin can be used for either Write Protect mode or Power-down mode, but only one

mode is active at any time. Either mode can be selected through the host command, Set-WP#/

PD#-Mode.

Once the mode is set with this command, the device will stay in the configured mode until the next

time this command is issued. Power-off or reset will not change the configured mode.

Write Protect Mode

When the device is configured in the Write Protect mode, the WP#/PD# pin offers extended data

protection. This feature can be either selected through a jumper or host logic to protect the stored

data from inadvertent system writes or erases, and viruses. The Write Protect feature protects the

full address space of the data stored on the flash media.

In the Write Protect mode, the WP#/PD# pin should be asserted prior to issuing the destructive

commands: Erase-Sector, Format-Track, Write-DMA, Write-Multiple, Write-Multiple-without-Erase,

Write-Sector(s), Write-Sector-without-Erase, or Write-Verify. This will force the NANDrive to reject

any destructive commands from the ATA interface. All destructive commands will return 51H in the

Status register and 04H in the Error register signifying an invalid command. All non-destructive

commands will be executed normally.

Power-down Mode

When configuring the device in Power-down mode, if the WP#/PD# pin is asserted during a com-

mand, the NANDrive completes the current command and returns to the standby mode immedi-

ately to save power. Afterwards, the device will not accept any other commands. Only a Power-on

Reset (POR) or hardware reset will bring the device to normal operation with the WP#/PD# pin de-

asserted.

Power-on initialization and Capacity Expansion

NANDrive is self-initialized during the first power-up. As soon as the power is applied to the NAN-

Drive it reports busy for typically up to five seconds while performing bad blocks search and low

level format. This initialization is a one time event.

During the first self-initialization, the NANDrive firmware scans all connected flash media devices

and reads their device ID. If the device ID matches the listed flash media devices, the NANDrive

performs drive recognition based on the algorithm provided by the flash media suppliers, including

setting up the bad block table, executing all the necessary handshaking routines for flash media

support, and, finally, performing the low-level format.

If the drive initialization fails, and a visual inspection is unable to determine the problem, Green-

liant provides a comprehensive interface for manufacturing flow debug. This interface not only

allows debug of the failure and manual reset of the initialization process, but also allows custom-

ization of user definable options.

ATA/IDE Interface

The ATA interface can be used for NANDrive manufacturing support. Greenliant provides an

example of a DOS-based solution (an executable routine) for manufacturing debug and rework.

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Serial Communication Interface (SCI)

For additional manufacturing flexibility, the SCI bus can be used for manufacturing error reporting.

The SCI consists of 3 active signals: SCIDOUT, SCIDIN, and SCICLK. Always provide SCI interface

access to PCB design to aid in design validation.

Lifetime Expectancy

NANDrive is available with two endurance options—standard NANDrive and NANDrive with

advanced NAND management technology.

NANDrive with Advanced NAND Management Technology

NANDrive with advanced NAND management technology significantly extends the life of a product

with its extensive ECC, advanced wear-leveling, and data retention algorithms.Each NANDrive

device is partitioned into four wear-leveling groups. See Table 5 for the group size of each product.

Each NANDrive wear-leveling group can receive at least 100 million write cycles from the host.

With four wear-leveling groups in each product, 400 million write cycles per product is possible

when host writes are evenly distributed across groups.

For applications where data security is essential, NANDrive with advanced NAND management

technology offers two additional protection features—protection zones and password protections.

Protection zones - Up to four independent protection zones can be enabled as either Read-only or

Hidden (Read/Write protected). If the zones are not enabled, the data is unprotected (default con-

figuration).

Password Protection - Requires a customer-unique password to access information within the pro-

tected zones.

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Power-on and Brown-out Reset Characteristics

Please contact Greenliant to obtain NANDrive reference design schematics including the POR#

circuit for industrial NANDrive offerings.

Figure 1: Power-on and Brown-out Reset Timing

I/O Transfer Function

The default operation for the NANDrive is 16-bit. However, if the host issues a Set-Feature com-

mand to enable 8-bit mode, the NANDrive permits 8-bit data access.

The following table defines the function of various operations.

Table 1: Power-on and Brown-out Reset Timing

Item Symbol Min Max Units

VDD/POR# Rise Time1

1. VDD Rise Time should be faster than or equal to POR# Rise Time.

TR250 ms

VDD/POR# Fall Time2

2. VDD Fall Time should be slower than or equal to POR# Fall Time.

TF250 ms

T1.0 1382

Table 2: I/O Function

Function Code CS3FX# CS1FX# A0-A2 IORD# IOWR# D15-D8 D7-D0

Invalid Mode VIL VIL X X X Undefined Undefined

Standby Mode VIH VIH X X X High Z High Z

Task File Write VIH VIL 1-7H VIH VIL X Data In

Task File Read VIH VIL 1-7H VIL VIH High Z Data Out

Data Register Write VIH VIL 0V

IH VIL In1

1. If 8-bit data transfer mode is enabled.

In 8-bit data transfer mode, High Byte is undefined for Data Out. For Data In, X can be VIH or VIL, but no other value.

Data Register Read VIH VIL 0V

IL VIH Out1Out

Control Register Write VIL VIH 6H VIH VIL X Control In

Alt Status Read VIL VIH 6H VIL VIH High Z Status Out

T2.0 1382

1382 F01

/POR#

90%

10%

90%

10%

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Software Interface

NANDrive Command Description

This section defines the software requirements and the format of the commands the host sends to the

NANDrive. Commands are issued to the NANDrive by loading the required registers in the command

block with the supplied parameters, and then writing the command code to the Command register. With

the exception of commands listed in Sections “Idle - 97H or E3H”, “Set-Sleep-Mode - 99H or E6H”, and

“Set-WP#/PD#-Mode - 8BH”, NANDrive complies with ATA-6 Specifications.

NANDrive Command Set

Table 8 summarizes the NANDrive command set.

Table 3: NANDrive Command Set (1 of 2)

Command Code FR1SC2SN3CY4DH5LBA6

Check-Power-Mode E5H or 98H - - - - D8-

Execute-Drive-Diagnostic 90H - - - - D -

Erase-Sector(s) C0H - Y Y Y Y Y

Flush-Cache E7H - - - - D -

Format-Track 50H - Y7-YY

Identify-Drive ECH - - - - D -

Idle E3H or 97H - Y - - D -

Idle-Immediate E1H or 95H - - - - D -

Initialize-Drive-Parameters 91H - Y - - Y -

NOP 00H - - - - D -

Read-Buffer E4H - - - - D -

Read-DMA C8H or C9H - Y Y Y Y Y

Read-Multiple C4H - Y Y Y Y Y

Read-Sector(s) 20H or 21H - Y Y Y Y Y

Read-Verify-Sector(s) 40H or 41H - Y Y Y Y Y

Recalibrate 1XH - - - - D -

Request-Sense 03H - - - - D -

Security-Disable-Password F6H - - - - D -

Security-Erase-Prepare F3H - - - - D -

Security-Erase-Unit F4H - - - - D -

Security-Freeze-Lock F5H - - - - D -

Security-Set-Password F1H - - - - D -

Security-Unlock F2H - - - - D -

Seek 7XH - - Y Y Y Y

Set-Features EFH Y - - - D -

SMART B0H Y Y Y Y D -

Set-Multiple-Mode C6H - Y - - D -

Set-Sleep-Mode E6H or 99H - - - - D -

Set-WP#/PD#-Mode 8BH Y - - - D -

Standby E2H or 96H - - - - D -

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Identify-Drive - ECH

The Identify-Drive command enables the host to receive parameter information from the NAN-

Drive. This command has the same protocol as the Read-Sector(s) command. The parameter

words in the buffer have the arrangement and meanings defined in Table 9. All reserved bits or

words are zero. Table 9 gives the definition for each field in the Identify-Drive information.

Standby-Immediate E0H or 94H - - - - D -

Translate-Sector 87H - Y Y Y Y Y

Write-Buffer E8H - - - - D -

Write-DMA CAH or CBH - Y Y Y Y Y

Write-Multiple C5H - Y Y Y Y Y

Write-Multiple-Without-Erase CDH - Y Y Y Y Y

Write-Sector(s) 30H or 31H - Y Y Y Y Y

Write-Sector(s)-Without-Erase 38H - Y Y Y Y Y

Write-Verify 3CH - Y Y Y Y Y

T3.1 1382

1. FR - Features register

2. SC - Sector Count register

3. SN - Sector Number register

4. CY - Cylinder registers

5. DH - Drive/Head register

6. LBA - Logical Block Address mode supported (see command descriptions for use)

7. Y - The register contains a valid parameter for this command.

8. For the Drive/Head register:Y means both the NANDrive and Head parameters are used;

D means only the NANDrive parameter is valid and not the Head parameter.

Table 3: NANDrive Command Set (Continued) (2 of 2)

Command Code FR1SC2SN3CY4DH5LBA6

Bit ->76543210

Command (7) ECH

C/D/H (6) X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) X

Feature (1) X

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Table 4: Identify-Drive Information (1 of 2)

Word

Address

Default

Value1

Total

Bytes Data Field Type Information

0 044AH 2 General configuration bit

1 bbbbH22 Default number of cylinders

2 0000H 2 Reserved

3 bbbbH22 Default number of heads

4 0000H 2 Reserved

5 XXXXH 2 Vendor Unique

6 bbbbH22 Default number of sectors per track

7-8 bbbbH34 Number of sectors per device (Word 7 = MSW, Word 8 = LSW)

9 xxxxH 2 Vendor Unique

10-14 eeeeH410 User-programmable serial number in ASCII

15-19 ddddH510 Greenliant preset, unique ID in ASCII

20 0002H 2 Buffer type

21 xxxxH 2 Vendor Unique

22 xxxxH 2 Vendor Unique

23-26 aaaaH68 Firmware revision in ASCII. Big Endian Byte Order in Word

27-46 ccccH740 User Definable Model number

47 8001H 2 Maximum number of sectors on Read/Write-Multiple command

48 0000H 2 Reserved

49 0B00H 2 Capabilities

50 0000H 2 Reserved

51 0200H 2 PIO data transfer cycle timing mode

52 0000H 2 Reserved

53 0007H 2 Translation parameters are valid

54 nnnnH 2 Current numbers of cylinders

55 nnnnH 2 Current numbers of heads

56 nnnnH 2 Current sectors per track

57-58 nnnnH 4 Current capacity in sectors (LBAs) (Word 57 = LSW, Word 58 = MSW)

59 010X 2 Multiple sector setting

60-61 nnnnH 4 Total number of sectors addressable in LBA mode

62 0000H 2 Reserved

63 0x07H 2 DMA data transfer is supported in NANDrive

64 0003H 2 Advanced PIO Transfer mode supported

65 0078H 2 120 ns cycle time support for Multi-word DMA Mode-2

66 0078H 2 120 ns cycle time support for Multi-word DMA Mode-2

67 0078H 2 PIO Mode-4 supported

68 0078H 2 PIO Mode-4 supported

69-79 0000H 22 Reserved

80 007EH 2 ATA major version number

81 0019H 2 ATA minor version number

82 706BH 2 Features/command sets supported

83 400CH 2 Features/command sets supported

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Word 0: General Configuration

This field informs the host that this is a non-magnetic, hard sectored, removable storage device

with a transfer rate greater than 10 MByte/sec and is not MFM encoded.

Word 1: Default Number of Cylinders

This field contains the number of translated cylinders in the default translation mode. This value

will be the same as the number of cylinders.

Word 3: Default Number of Heads

This field contains the number of translated heads in the default translation mode.

Word 6: Default Number of Sectors per Track

This field contains the number of sectors per track in the default translation mode.

Word 7-8: Number of Sectors

This field contains the number of sectors per NANDrive. This double word value is also the first

invalid address in LBA translation mode. This field is only required by CF feature set support.

Word 10-19: Serial Number

The contents of this field are right justified and padded with spaces (20H). The right-most ten bytes

are a Greenliant preset, unique ID. The left-most ten bytes are a user-programmable value with a

default value of spaces.

84 4000H 2 Features/command sets supported

85-87 xxxxH 6 Features/command sets enabled

88 xx1FH 2 UDMA modes

89 xxxxH 2 Time required for security erase unit completion

90 xxxxH 2 Time required for enhanced security erase unit completion

91-127 0000H 74 Reserved

128 xxxxH 2 Security Status

129-159 0000H 62 Vendor unique bytes

160-162 0000H 6 Reserved

163 xx2H 2 CF Advanced True IDE Timing Mode capabilities and settings

164-255 0000H 184 Reserved

T4.4 1382

1. XXXX = This field is subject to change by the host or the device.

2. bbbb - default value set by controller. The selections could be user programmable.

3. n - calculated data based on product configuration

4. eeee - the default value is ‘0000000000’

5. dddd - unique number of each device

6. aaaa - any unique Greenliant firmware revision

7. cccc - default value is “xxxMB NANDrive” or “xxxGB NANDrive” where xxx is the flash drive capacity.

The user has an option to change the model number during manufacturing.

Table 4: Identify-Drive Information (Continued) (2 of 2)

Word

Address

Default

Value1

Total

Bytes Data Field Type Information

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Word 20: Buffer Type

This field defines the buffer capability:

0002H: a dual ported multi-sector buffer capable of simultaneous data transfers to or from the host

and the NANDrive.

Word 23-26: Firmware Revision

This field contains the revision of the firmware for this product.

Word 27-46: Model Number

This field is reserved for the model number for this product.

Word 47: Read-/Write-Multiple Sector Count

This field contains the maximum number of sectors that can be read or written per interrupt using

the Read-Multiple or Write-Multiple commands. Only a value of ‘1’ is supported.

Word 49: Capabilities

Bit Function

13 Standby Timer

0: forces sleep mode when host is inactive.

11 IORDY Support

1: NANDrive supports PIO Mode-4.

9 LBA support

1: NANDrive supports LBA mode addressing.

8 DMA Support

1: DMA mode is supported.

Word 51: PIO Data Transfer Cycle Timing Mode

This field defines the mode for PIO data transfer. NANDrive supports up to PIO Mode-4.

Word 53: Translation Parameters Valid

Bit Function

0 1: words 54-58 are valid and reflect the current number of cylinders, heads and sectors.

1 1: words 64-70 are valid to support PIO Mode-3 and 4.

2 1: words 88 are valid to support Ultra DMA data transfer.

Word 54-56: Current Number of Cylinders, Heads, Sectors/Track

These fields contains the current number of user addressable Cylinders, Heads, and Sectors/

Track in the current translation mode.

Word 57-58: Current Capacity

This field contains the product of the current cylinders times heads times sectors.

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Word 59: Multiple Sector Setting

This field contains a validity flag in the Odd Byte and the current number of sectors that can be

transferred per interrupt for Read/Write Multiple in the Even Byte. The Odd Byte is always 01H

which indicates that the Even Byte is always valid.

The Even Byte value depends on the value set by the Set Multiple command. The Even Byte of

this word by default contains a 00H which indicates that Read/Write Multiple commands are not

valid.

Word 60-61: Total Sectors Addressable in LBA Mode

This field contains the number of sectors addressable for the NANDrive in LBA mode only.

Word 63: Multi-word DMA Transfer Mode

This field identifies the multi-word DMA transfer modes supported by the NANDrive and indicates

the mode that is currently selected. Only one DMA mode can be selected at any given time.

Bit Function

15-11 Reserved

10 Multi-word DMA mode 2 selected

1: Multi-word DMA mode 2 is selected and bits 8 and 9 are cleared to 0

0: Multi-word DMA mode 2 is not selected.

9 Multi-word DMA mode 1 selected

1: Multi-word DMA mode 1 is selected and 8 and 10 should be cleared to 0.

0: Multi-word DMA mode 1 is not selected.

8 Multi-word DMA mode 0 selected

1: Multi-word DMA mode 0 is selected and bits 9 and 10 are cleared to 0.

0: Multi-word DMA mode 0 is not selected.

7-3 Reserved

2 Multi-word DMA mode 2 supported

1: Multi-word DMA mode 2 and below are supported and Bits 0 and 1 are set to 1.

1 Multi-word DMA mode 1 supported

1: Multi-word DMA mode 1 and below are supported.

0 Multi-word DMA mode 0 supported

1: Multi-word DMA mode 0 is supported.

Word 64: Advanced PIO Data Transfer Mode

Bits [7:0] is defined as the PIO data and register transfer supported field. If this field is supported,

bit 1 of word 53 shall be set to one. This field is bit significant. Any number of bits may be set to

one in this field by the device to indicate the PIO modes the device is capable of supporting. Of

these bits, bits [7:2] are Reserved for future PIO modes.

Bit Function

0 1: NANDrive supports PIO Mode-3.

1 1: NANDrive supports PIO Mode-4.

Word 65: Minimum Multi-word DMA

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Transfer Cycle Time Per Word

This field defines the minimum Multi-word DMA transfer cycle time per word. This field defines, in

nanoseconds, the minimum cycle time that the NANDrive supports when performing Multi-word

DMA transfers on a per word basis. Greenliant’s NANDrive supports up to Multi-word DMA Mode-

2, so this field is set to 120ns.

Word 66: Device Recommended Multi-word DMA Cycle Time

This field defines the NANDrive recommended Multi-word DMA transfer cycle time. This field

defines, in nanoseconds, the minimum cycle time per word during a single sector host transfer

while performing a multiple sector READ DMA or WRITE DMA command for any location on the

media under nominal conditions. If a host runs at a faster cycle rate by operating at a cycle time of

less than this value, the NANDrive may negate DMARQ for flow control. The rate at which

DMARQ is negated could result in reduced throughput despite the faster cycle rate. Transfer at

this rate does not ensure that flow control will not be used, but implies that higher performance

may result. Greenliant’s NANDrive supports up to Multi-word DMA Mode-2, so this field is set to

120 ns.

Word 67: Minimum PIO Transfer Cycle Time Without Flow Control

This field defines, in nanoseconds, the minimum cycle time that, if used by the host, the device

guarantees data integrity during the transfer without utilization of IORDY flow control. If this field is

supported, Bit 1 of word 53 shall be set to one.The NANDrive’s minimum cycle time is 120 ns. A

value of 0078H is reported.

Word 68: Minimum PIO Transfer Cycle Time With IORDY

This field defines, in nanoseconds, the minimum cycle time that the device supports while performing data

transfers while utilizing IORDY flow control. If this field is supported, Bit 1 of word 53 shall be set to one.

The NANDrive’s minimum cycle time is 120 ns, e.g., PIO Mode-4. A value of 0078H is reported.

Word 80: Major Version Number

If not 0000H or FFFFH, the device claims compliance with the major version(s) as indicated by bits

[6:1] being set to one. Since ATA standards maintain downward compatibility, a device may set

more than one bit. GLS55VD020 supports ATA-1 to ATA-6.

Word 81: Minor Version Number

If an implementer claims that the revision of the standard they used to guide their implementation

does not need to be reported or if the implementation was based upon a standard prior to the ATA-

3 standard, word 81 should be 0000H or FFFFH.

A value of 0019H reported in word 81 indicates ATA-6 T13 1410D revision 3a guided the imple-

mentation.

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Words 82-84: Features/command sets supported

Words 82, 83, and 84 indicate the features and command sets supported. A value of 706BH is

reported.

Word 82

Bit Function

15 0: Obsolete

14 1: NOP command is supported

13 1: Read Buffer command is supported

12 1: Write Buffer command is supported

11 0: Obsolete

10 0: Host Protected Area feature set is not supported

9 0: Device Reset command is not supported

8 0: Service interrupt is not supported

7 0: Release interrupt is not supported

6 1: Look-ahead is supported

5 1: Write cache is supported

4 0: Packet Command feature set is not supported

3 1: Power Management feature set is supported

2 0: Removable Media feature set is not supported

1 1: Security Mode feature set is supported

0 1: SMART feature set is supported

Word 83

The values in this word should not be depended on by host implementers.

Bit Function

15 0: Provides indication that the features/command sets supported words are not valid

14 1: Provides indication that the features/command sets supported words are valid

13-9 0: Reserved

8 0: Set-Max security extension is not supported

7-5 0: Reserved

4 0: Removable Media Status feature set is not supported

3 1: Advanced Power Management feature set is supported

2 1: CFA feature set is supported

1 0: Read DMA Queued and Write DMA Queued commands are not supported

0 0: Download Microcode command is not supported

Word 84

The values in this word should not be depended on by host implementers.

Bit Function

15 0: Provides indication that the features/command sets supported words are valid

14 1: Provides indication that the features/command sets supported words are valid

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

13-0 0: Reserved

Words 85-87: Features/command sets enabled

Words 85, 86, and 87 indicate features/command sets enabled.

The host can enable/disable the features or command set only if they are supported in

Words 82-84.

Word 85

Bit Function

15 0: Obsolete

14 0: NOP command is not enabled

1: NOP command is enabled

13 0: Read Buffer command is not enabled

1: Read Buffer command is enabled

12 0:Write Buffer command is not enabled

1: Write Buffer command is enabled

11 0: Obsolete

10 1: Host Protected Area feature set is enabled

9 0: Device Reset command is not enabled

8 0: Service interrupt is not enabled

7 0: Release interrupt is not enabled

6 0: Look-ahead is not enabled

1: Look-ahead is enabled

5 0: Write cache is not enabled

1: Write cache is enabled

4 0: Packet Command feature set is not enabled

3 0: Power Management feature set is not enabled

1: Power Management feature set is enabled

2 0: Removable Media feature set is not enabled

1 0: Security Mode feature set has not been enabled via the Security Set Password

command

1: Security Mode feature set has been enabled via the Security Set Password command

0 0: SMART feature set is not enabled

Word 86

Bit Function

15-9 0: Reserved

8 1: Set-Max security extension supported

7-5 0: Reserved

4 0: Removable Media Status feature set is not enabled

3 0: Advanced Power Management feature set is not enabled

2 0: CFA feature set is disabled

1 0: Read DMA Queued and Write DMA Queued commands are not enabled

0 0: Download Microcode command is not enabled

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Word 87

The values in this word should not be depended on by host implementers.

Bit Function

15 0: Provides indication that the features/command sets supported words are valid

14 1: Provides indication that the features/command sets supported words are valid

13-0 0: Reserved

Word 88

Bit Function

15-13 Reserved

12 1: Ultra DMA mode 4 is selected

0: Ultra DMA mode 4 is not selected

11 1: Ultra DMA mode 3 is selected

0: Ultra DMA mode 3 is not selected

10 1: Ultra DMA mode 2 is selected

0: Ultra DMA mode 2 is not selected

9 1: Ultra DMA mode 1 is selected

0: Ultra DMA mode 1 is not selected

8 1: Ultra DMA mode 0 is selected

0: Ultra DMA mode 0 is not selected

7-5 Reserved

4 1: Ultra DMA mode 4 and below are supported

3 1: Ultra DMA mode 3 and below are supported

2 1: Ultra DMA mode 2 and below are supported

1 1: Ultra DMA mode 1 and below are supported

0 1: Ultra DMA mode 0 is supported

Word 89: Time required for Security erase unit completion

Word 89 specifies the time required for the Security Erase Unit command to complete.

Value Time

0 Value not specified

1-254 (Value * 2) minutes

255 >508 minutes

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Word 90: Time required for Enhanced security erase unit completion

Word 90 specifies the time required for the Enhanced Security Erase Unit command to complete.

Word 128: Security Status

Bit Function

8 Security Level

1: Security mode is enabled and the security level is maximum

0: and security mode is enabled, indicates that the security level is high

5 Enhanced security erase unit feature supported

1: Enhanced security erase unit feature set is supported

4 Expire

1: Security count has expired and Security Unlock and Security Erase Unit are command

aborted until a Power-on reset or hard reset

3Freeze

1: Security is frozen

2Lock

1: Security is locked

1 Enable/Disable

1: Security is enabled

0: Security is disabled

0 Capability

1: NANDrive supports security mode feature set

0: NANDrive does not support security mode feature set

Word 163: CF Advanced True IDE Timing Mode Capabilities and Settings

This word describes the capabilities and current settings for CF modes utilizing the True IDE inter-

face.

Four separate fields determine support and selection options in the Advanced PIO and Advanced

Multiword DMA timing modes. For information on the older modes, see “Word 63: Multi-word DMA

Transfer Mode” on page 16 and “Word 64: Advanced PIO Data Transfer Mode” on page 16. When

the Identity drive command executes, the device returns 0492H.

Bit Function

2-0 Advanced True IDE PIO Mode Support

Indicates the maximum True IDE PIO mode supported by the card

Value Time

0 Value not specified

1-254 (Value * 2) minutes

255 >508 minutes

Value Time

0 Specified in word 64

1 PIO Mode 5

2 PIO Mode 6

3-7 Reserved

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

5-3 Advanced True IDE Multiword DMA Mode Support

Indicates the maximum True IDE Multiword DMA mode supported by the card

8-6 Advanced True IDE PIO Mode Selected

Indicates the current True IDE PIO mode selected on the card

11-9 Advanced True IDE Multiword DMA Mode Selected

Indicates the current True IDE Multiword DMA mode selected on the card

15-12 Reserved

Set-Features - EFH

This command is used by the host to establish or select certain features. Table 10 defines all fea-

tures that are supported.

Value Time

0 Specified in word 63

1 Multiword DMA Mode 3

2 Multiword DMA Mode 4

3-7 Reserved

Value Time

0 Specified in word 64

1 PIO Mode 5

2 PIO Mode 6

3-7 Reserved

Value Time

0 Specified in word 63

1 Multiword DMA Mode 3

2 Multiword DMA Mode 4

3-7 Reserved

Bit ->76543210

Command (7) EFH

C/D/H (6) X Drive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) Config

Feature (1) Feature

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Features 01H and 81H are used to enable and clear 8-bit data transfer mode. If the 01H feature

command is issued all data transfers will occur on the low order D7-D0 data bus and the IOCS16#

signal will not be asserted for data register accesses.

Features 02H and 82H allow the host to enable or disable write cache in the NANDrives that

implement write cache. When the subcommand Disable-Write-Cache is issued, the NANDrive

should initiate the sequence to flush cache to non-volatile memory before command completion.

Feature 03H allows the host to select the transfer mode by specifying a value in the Sector Count

value. One PIO mode is selected at all times. The host may change the selected modes by the

Set-Features command.

Feature 55H is the default feature for the NANDrive. Therefore, the host does not have to issue

Set-Features command with this feature unless it is necessary for compatibility reasons.

Features 66H and CCH can be used to enable and disable whether the Power-on Reset (POR)

Defaults will be set when a software reset occurs.

Table 5: Features Supported

Feature Operation

01H Enable 8-bit data transfers.

02H Enable Write cache

03H Set transfer mode based on value in Sector Count register. Table 11 defines the values.

09H Enable Extended Power Operations

55H Disable Read Look Ahead.

66H Disable Power-on Reset (POR) establishment of defaults at software reset.

69H NOP - Accepted for backward compatibility.

81H Disable 8-bit data transfer.

82H Disable Write Cache

89H Disable Extended Power operations

96H NOP - Accepted for backward compatibility.

97H Accepted for backward compatibility. Use of this Feature is not recommended.

AAH Enable Read-Look-Ahead

CCH Enable Power-on Reset (POR) establishment of defaults at software reset.

T5.0 1382

Table 6: Transfer Mode Values

Mode Bits [7:3] Bits [2:0]

PIO default mode 00000b 000b

PIO default mode, disable IORDY 00000b 001b

PIO flow control transfer mode 00001b mode1

1. Mode = transfer mode number, all other values are not valid

Multi-word DMA mode 00100b mode1

Ultra-DMA mode 01000b mode1

Reserved Other N/A

T6.1 1382

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Idle - 97H or E3H

This command causes the NANDrive to set BSY, enter the Idle mode, clear BSY and generate an

interrupt. If the sector count is non-zero, it is interpreted as a timer count with each count being 5

milliseconds and the automatic Power-down mode is enabled. If the sector count is zero, the auto-

matic Power-down mode is also enabled, the timer count is set to 3, with each count being 5 ms.

Note that this time base (5 msec) is different from the ATA specification.

Set-Sleep-Mode - 99H or E6H

This command causes the NANDrive to set BSY, enter the Sleep mode, clear BSY and generate

an interrupt. Recovery from sleep mode is accomplished by simply issuing another command (a

reset is permitted but not required). Sleep mode is also entered when internal timers expire so the

host does not need to issue this command except when it wishes to enter Sleep mode immedi-

ately. The default value for the timer is 15 milliseconds.

Bit ->76543210

Command (7) 97H or E3H

C/D/H (6) XDrive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) Timer Count (5 msec increments)

Feature (1) X

Bit ->76543210

Command (7) 99H or E6H

C/D/H (6) XDrive X

Cyl High (5) X

Cyl Low (4) X

Sec Num (3) X

Sec Cnt (2) X

Feature (1) X

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Set-WP#/PD#-Mode - 8BH

This command configures the WP#/PD# pin for either the Write Protect mode or the Power-down

mode. When the host sends this command to the device with the value AAH in the feature register,

the WP#/PD# pin is configured for the Write Protect mode. The Write Protect mode is the factory

default setting. When the host sends this command to the device with the value 55H in the feature

All values in the C/D/H register, the Cylinder Low register, the Cylinder High register, the Sector

Number register, the Sector Count register, and the Feature register need to match the values

shown above, otherwise, the command will be treated as an invalid command.

Once the mode is set with this command, the device will stay in the configured mode until the next

time this command is issued. Power-off or reset will not change the configured mode.

Bit ->76543210

Command (7) 8BH

C/D/H (6) X Drive X

Cyl High (5) 6EH

Cyl Low (4) 44H

Sec Num (3) 72H

Sec Cnt (2) 50H

Feature (1) 55H or AAH

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Error Posting

The following table summarizes the valid status and error values for the NANDrive command set.

Table 7: Error and Status Register1

1. The host is required to reissue any media access command (such as Read-Sector and Write Sector) that ends with an error condition.

Command

Error Register Status Register

BBK UNC IDNF

ABR

T AMNF RDY DWF DSC CORR ERR

Check-Power-Mode V V V V V

Execute-Drive-Diagnostic V V V

Erase-Sector(s) V V V V V V V V

Flush-Cache V V V V V

Format-Track V V V V V V V

Identify-Drive V V V V V

Idle V VVV V

Idle-Immediate V V V V V

Initialize-Drive-Parameters V V V

NOP V V V V

Read-Buffer V VVV V

Read-DMA VVVVVVVVVV

Read-Multiple V V V V V V V V V V

Read-Sector(s) VVVVVVVVVV

Read-Verify-Sector(s) VVVVVVVVVV

Recalibrate V V V V V

Request-Sense V V V V

Security-Disable-Password V V V V V

Security-Erase-Prepare V V V V V

Security-Erase-Unit V V V V V

Security-Freeze-Lock V V V V V

Security-Set-Password V V V V V

Security-Unlock V V V V V

Seek V V V V V V

Set-Features V V V V V

Set-Multiple-Mode V V V V V

Set-Sleep-Mode V V V V V

Set-WP#/PD#-Mode V V V V

SMART VV VVV V

Standby V V V V V

Standby-Immediate V V V V V

Translate-Sector V V V V V V V V

Write-Buffer V V V V V

Write-DMA V VVVVVV V

Write-Multiple V V V V V V V V

Write-Multiple-Without-Erase V V V V V V V V

Write-Sector(s) V V V V V V V V

Write-Sector(s)-Without-

Erase

V VVVVVV V

Write-Verify V VVVVVV V

Invalid-Command-Code V V V V V

T7.3 1382

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Electrical Specifications

Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Abso-

lute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating

only and functional operation of the device at these conditions or conditions greater than those

defined in the operational sections of this data sheet is not implied. Exposure to absolute maxi-

mum stress rating conditions may affect device reliability.)

Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55°C to +125°C

Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C

D.C. Voltage on Pins1 I3, I4, O4, and O5 to Ground Potential . . . . . . . . . . . . . . . . . -0.5V to VDD+0.5V

1. Refer to Table 1 for pin assignment information.

Transient Voltage (<20 ns) on Pins1 I3, I4, O4, and O5 to Ground Potential. . . . . . -2.0V to VDD+2.0V

D.C. Voltage on Pins1 I1, I2, O1, O2, and O6 to Ground Potential . . . . . . . . . . . . -0.5V to VDDQ+0.5V

Transient Voltage (<20 ns) on Pins1 I1, I2, O1, O2, and O6 to Ground Potential . -2.0V to VDDQ+2.0V

Package Power Dissipation Capability (TA = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.0W

Through Hole Lead Soldering Temperature (10 Seconds). . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C

Surface Mount Solder Reflow Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C for 10 seconds

Output Short Circuit Current2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA

2. Outputs shorted for no more than one second. No more than one output shorted at a time.

Table 8: Absolute Maximum Power Pin Stress Ratings

Parameter Symbol Conditions

Input Power VDDQ

VDD

-0.3V min to 6.5V max

-0.3V min to 4.0V max

Voltage on all pins with respect to VSS -0.5V min to VDDQ + 0.5V max

T8.0 1382

Table 9: Operating Range

Range

Ambient

Temperature

VDDQ VDD

3.3V 5V 3.3V

Min Max Min Max Min Max

Industrial -40°C to +85°C 3.135V 3.465V 4.5V 5.5V 3.135V 3.465V

Table 10:AC Conditions of Test1

1. See Figure 4

Input Rise/Fall Time Output Load

10 ns CL = 100 pF

T10.1 1382

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Table 11: Recommended System Power-on Timing

Symbol Parameter Typical Maximum Units

TPU-INITIAL Drive Initialization to Ready 3 sec + (0.5 sec/

GByte)

100 sec

TPU-READY11Host Power-on/Reset to Ready Operation 200 1000 ms

TPU-WRITE11Host Power-on/Reset to Write Operation 200 1000 ms

T11.3 1382

1. This parameter is measured only for initial qualification and after a design or process change that could affect this

parameter.

Table 12:Capacitance (Ta = 25°C, f=1 MHz, other pins open)

Parameter Description Test Condition Maximum

CI/O1I/O Pin Capacitance VI/O = 0V 10 pF

CIN1Input Capacitance VIN = 0V 10 pF

T12.1 1382

1. This parameter is measured only for initial qualification and after a design or process change that could affect this

parameter.

Table 13:Reliability Characteristics

Symbol Parameter Minimum Specification Units Test Method

ILTH1

1. This parameter is measured only for initial qualification and after a design or process change that could affect this

parameter.

Latch Up 100 + IDD mA JEDEC Standard 78

T13.0 1382

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

DC Characteristics (GLS85LD0512/1001T/1002U)

Table 14:DC Characteristic for Host Interface VDDQ = 3.3V or 5V

Symbol Type Parameter Min Max Units Conditions

VIH1 I1 Input Voltage 2.0 V VDDQ=VDDQ Max

VIL1 0.8 VDDQ=VDDQ Min

IIL1 I1Z Input Leakage Current -10 10 uA VIN = GND to VDDQ,

VDDQ = VDDQ Max

IU1 I1U Input Pull-Up Current -150 -6 uA VOUT = GND,

VDDQ = VDDQ Max

VT+2 I2 Input Voltage Schmitt Trigger 2.0 V VDDQ=VDDQ Max

VT-2 0.8 VDDQ=VDDQ Min

IIL2 I2Z Input Leakage Current -10 10 uA VIN = GND to VDDQ,

VDDQ = VDDQ Max

IU2 I2U Input Pull-Up Current -150 -6 uA VOUT = GND,

VDDQ = VDDQ Max

VOH1

Output Voltage 2.4 V IOH1=IOH1 Min

VOL1 0.4 IOL1=IOL1 Max

IOH1 Output Current -4 mA VDDQ=VDDQ Min

IOL1 Output Current 4 mA VDDQ=VDDQ Min

VOH2

Output Voltage 2.4 V IOH2=IOH2 Min

VOL2 0.4 IOL2=IOL2 Max

IOH2 Output Current -8 mA VDDQ=2.7V

IOL2 Output Current 8 mA VDDQ Min

VOH6

Output Voltage for DASP# pin 2.4 V IOH6=IOH6 Min

VOL6 0.4 IOL6=IOL6 Max

IOH6 Output Current for DASP# pin -4 mA VDDQ=2.7-3.465V

IOL6 Output Current for DASP# pin 12 mA VDDQ=2.7-3.465V

IOH6 Output Current for DASP# pin -4 mA VDDQ=4.5V-5.5V

IOL6 Output Current for DASP# pin 12 mA VDDQ=4.5V-5.5V

T14.1 1382

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

AC Characteristics

Figure 2: AC Input/Output Reference Waveforms

Table 15:Power Consumption

Product Symbol Type Parameter Min Max Units Conditions

GLS85LD0512-60-RI-LBTE IDD1,2 PWR Power supply current

(TA = -40°C to +85°C)

130 mA VDD=VDD Max;

VDDQ=VDDQ Max

ISP PWR Sleep/Standby/Idle current

(TA = -40°C to +85°C)

1000 µA VDD=VDD Max;

VDDQ=VDDQ Max

GLS85LD1001T-60-RI-LBTE IDD1,2 PWR Power supply current

(TA = -40°C to +85°C)

160 mA VDD=VDD Max;

VDDQ=VDDQ Max

ISP PWR Sleep/Standby/Idle current

(TA = -40°C to +85°C)

1050 µA VDD=VDD Max;

VDDQ=VDDQ Max

GLS85LD1002U-60-RI-

LBTE

IDD1,2 PWR Power supply current

(TA = -40°C to +85°C)

220 mA VDD=VDD Max;

VDDQ=VDDQ Max

ISP PWR Sleep/Standby/Idle current

(TA = -40°C to +85°C)

1150 µA VDD=VDD Max;

VDDQ=VDDQ Max

T15.2 1382

1. Sequential data transfer for 1 sector read data from host interface and write data to media.

2. This parameter is measured only for initial qualification and after a design or process change that could affect this

parameter.

1319 F13.0

REFERENCE POINTS OUTPUTINPUT VIT

VIHT

VILT

VOT

AC test inputs are driven at VIHT (0.9 VDD) for a logic ‘1’ and VILT (0.1 VDD) for a logic ‘0’.

Measurement reference points for inputs and outputs are VIT (0.5 VDD) and VOT (0.5

VDD). Input rise and fall times (10%  90%) are <10 ns.

Note: VIT - VINPUT Test

VOT - VOUTPUT Te s t

VIHT - VINPUT HIGH Test

VILT - VINPUT LOW Test

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Appendix

Differences between the Greenliant NANDrive and ATA-6 Specifications

Idle Timer

The Idle timer uses an incremental value of 5 ms, rather than the 5 sec minimum increment value

specified in ATA specifications.

Recovery from Sleep Mode

For NANDrive devices, recovery from sleep mode is accomplished by simply issuing another com-

mand to the device. A hardware or software reset is not required.

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Product Ordering Information

Valid Combinations

GLS85LD0512-60-RI-LBTE GLS85LD1001T-60-RI-LBTE GLS85LD1002U-60-RI-LBTE

Note: Valid combinations are those

products in mass production or

will be in mass production.

Consult your Greenliant sales

representative to confirm avail-

ability of valid combinations

and to determine availability of

new combinations.

GLS 85 LD 1 001T - 60 - RI - LBTE

XX XXXXXXX -XX-XX-XXXX

Environmental Attribute

E1 = non-Pb

Package Modifier

T = 88 ball positions (nearest letter

code to total ball count of 91)

Package Type

LB = LBGA

Operation Temperature

I = Industrial: -40°C to +85°C

Endurance

R = 100,000,000 write cycles

minimum

Host Access Time

60 = 60ns - UDMA Mode - 4

Relative Performance Indicator

Higher letter indicates higher

performance

Capacity

512 = 512 MByte

001 = 1 GByte

002 = 2 GByte

MByte or GByte Designator

0 = MByte

1 = GByte

Voltage

L = 3.3V

Product Series

85 = NANDrive

1. Environmental suffix “E” denotes non-Pb sol-

der. Greenliant non-Pb solder devices are

“RoHS Compliant”.

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Packaging diagram

Figure 1: mini-NANDrive 91-Ball Low Profile Ball Grid Array (LBGA)

Greenliant Package Code: LBT

Note: 1. Although many dimensions are similar to those of JEDEC

Publication 95, MO-210, this specific package is not registered.

2. All linear dimensions are in millimeters.

3. Coplanarity: 0.15 mm

4. Ball opening size is 0.40 mm (± 0.05 mm)

BOTTOM VIEW

91-lbga-LBT-12x24-1.0

1mm

DETAIL

SIDE VIEW

SEATING PLANE

A B C D E F G H J K L M N P R T

TOP VIEW

T R P N M L K J H G F E D C B A

0.40 ± 0.05

CORNER

0.15

1.30

0.10

1.0

0.50

± 0.05

(91x)

7.0

9.0

24.0 ±0.1

12.0

±0.1

Data Sheet

512 MByte / 1 GByte / 2 GByte NANDrive

GLS85LD0512 / GLS85LD1001T / GLS85LD1002U

Table 1: Revision History

Number Description Date

00 •Initial release for SST85LD0512/SST85LD1001T/SSTLD1002U Data Sheet Apr 2008

01 •Added 5I (100M cycle endurance) information including updates in “Features” , “Gen-

eral Description” , “Capacity Specification” , “Lifetime Expectancy” , “Software Inter-

face” “Electrical Specifications” , and “Product Ordering Information” ,

•Changes pin K2 from DMACK to DMACK# in Figure 2 and Table 1.

Sep 2008

02 •Preliminary Specifications-to-Data Sheet phase change Nov 2008

03 •End-of-Life valid combinations SST85LD0512-60-5I-LBTE, SST85LD1001T-60-5I-

LBTE, and SST85LD1002U-60-5I-LBTE. See S71382(02).

•Removed all references to 100M cycle endurance in Features, page 1 and Standard

NANDrive on page 2 and page 12.

•Removed SST85LD0512-60-5I-LBTE, SST85LD1001T-60-5I-LBTE, and

SST85LD1002U-60-5I-LBTE from Table 3 on page 7, Table 4 on page 7, and

Table 20 on page 30.

Dec 2008

04 •Applied the new document format

•Updated Figure 1.

Oct 2009

05 •Transferred from SST to Greenliant May 2010

Greenliant, the Greenliant logo and NANDrive are trademarks of Greenliant Systems, Ltd.

All trademarks and registered trademarks are the property of their respective owners.

These specifications are subject to change without notice. Refer to www.greenliant.com for the most recent data sheet versions.

Memory sizes denote raw storage capacity; actual usable capacity may be less.

Greenliant makes no warranty for the use of its products other than those expressly contained in the Standard Terms and Con-

ditions of Sale which are available on www.greenliant.com.

Mouser Electronics

Authorized Distributor

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