19-3282; Rev 1; 7/04 Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity The MAX5934/MAX5934A are fully integrated hot-swap controllers for +9V to +80V (MAX5934A) positive supply rails. The MAX5934 is optimized for +33V to +80V power-supply rails. These devices allow for the safe insertion and removal of circuit cards into a live backplane without causing glitches on the backplane power-supply rail. The MAX5934/MAX5934A feature a programmable analog foldback current limit, programmable undervoltage lockout, and programmable output-voltage slew rate through an external n-channel MOSFET. In addition, if these devices remain in current limit for more than a programmable time, the external n-channel MOSFET latches off. The MAX5934/MAX5934A feature pin-selectable PWRGD_ assertion polarity (active low or active high) and pin-selectable fault management (latched or autoretry). Other features include automatic restart after a circuit-breaker fault, selectable duty-cycle (DC) options, and thermal-shutdown mode for overtemperature protection. The MAX5934/MAX5934A operate in the extended (-40C to +85C) temperature range and are available in a 16-pin QSOP package. Features Provides Safe Hot Swap for +9V to +80V Power Supplies (MAX5934A) Safe Board Insertion and Removal from a Live Backplane Pin-Selectable Active-Low or Active-High PowerGood Output Pin-Selectable Latched or Autoretry Fault Management Programmable Foldback Current Limiting High-Side Drive for an External N-Channel MOSFET Built-In Thermal Shutdown Undervoltage Lockout (UVLO) Pin-Selectable Duty-Cycle Options (0.94%, 1.88%, 3.75%) Ordering Information PART TEMP RANGE PIN-PACKAGE MAX5934EEE -40C to +85C 16 QSOP MAX5934AEEE -40C to +85C 16 QSOP Applications Hot Board Insertion Electronic Circuit Breakers Pin Configuration Industrial High-Side Switch/Circuit Breakers Network Routers and Switches 24V/48V Industrial/Alarm Systems TOP VIEW LATCH/RETRY 1 16 VCC ON 2 15 DC POL_SEL 3 FB1 4 PWRGD2 5 Typical Application Circuit appears at end of data sheet. 14 SENSE MAX5934 MAX5934A 13 N.C. 12 FB2 PWRGD1 6 11 GATE PWRGD3 7 10 TIMER GND 8 9 OUT QSOP Selector Guide LATCHED/ AUTORETRY FAULT PROTECTION DEFAULT UVLO (V) SUPPLY VOLTAGE RANGE (V) MAX5934 31 +33 to +80 Pin-selectable Pin-selectable Pin-selectable MAX5934A 8.3 +9 to +80 Pin-selectable Pin-selectable Pin-selectable PART DUTY CYCLE PWRGD_ OUTPUT LOGIC ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com. 1 MAX5934/MAX5934A General Description MAX5934/MAX5934A Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity ABSOLUTE MAXIMUM RATINGS (Voltages referenced to GND.) VCC .........................................................................-0.3V to +85V SENSE, FB_, ON.........................................-0.3V to (VCC + 0.3V) TIMER, PWRGD_, DC, LATCH/RETRY, POL_SEL ....-0.3V to +85V GATE ......................................................................-0.3V to +95V OUT ................................................(VGATE - 14V) to the lower of (VGATE + 0.3V) and (VCC + 0.3V) Maximum GATE Current ....................................-50mA, +150mA Maximum Current into Any Other Pin................................50mA Continuous Power Dissipation (TA = +70C) 16-Pin QSOP (derate 8.3mW/C above +70C)...........667mW Operating Temperature Range ...........................-40C to +85C Maximum Junction Temperature .....................................+150C Storage Temperature Range .............................-60C to +150C ESD Rating (Human Body Model)......................................2000V Lead Temperature (soldering, 10s) .................................+300C Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (VCC = +24V (MAX5934A), VCC = +48V (MAX5934), GND = 0V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1) PARAMETER SYMBOL Supply Voltage Range VCC Supply Current ICC CONDITIONS MAX5934A MAX5934 VON = 3V, VCC = 80V VCC low-to-high transition MAX5934A MAX5934 MIN TYP MAX 1.4 80 80 3.5 9 33 7.5 29.5 8.3 31 0.4 2 8.8 32.5 UNITS V mA VCC Undervoltage Lockout VLKO VCC Undervoltage-Lockout Hysteresis VLKOHYST FB1 High-Voltage Threshold VFB1H FB1 low-to-high transition 1.280 1.313 1.345 V FB2 High-Voltage Threshold VFB2H FB2 low-to-high transition 1.280 1.313 1.345 V FB1 Low-Voltage Threshold VFB1L FB1 high-to-low transition 1.221 1.233 1.245 V VFB2L FB2 high-to-low transition 1.202 FB2 Low-Voltage Threshold FB_ Hysteresis FB_ Input Bias Current MAX5934A MAX5934 VFBHYST V 1.264 80 V mV IINFB VFB_ = 0V +1 A FB1 Threshold Line Regulation VFB1 VCC(MIN) VCC 80V, MAX5934A, ON = 0V 0.05 mV/V FB2 Threshold Line Regulation VFB2 VCC(MIN) VCC 80V, MAX5934A, ON = 0V 0.05 mV/V VFB_ = 0V, TA = 0C to +70C 8 12 17 VFB_ = 1V, TA = 0C to +70C 39 47 55 IGATEUP Charge pump on, VGATE = 7V -5 -10 -20 A IGATEDN Any fault condition, VGATE = 2V 35 70 100 mA 3.8 4.3 5 V 10 13.6 18 VCC = 10.8V to 20V 4.5 13.6 18.0 VCC = 20V to 80V 10 13.6 18 -24 -75 -120 SENSE Trip Voltage (VCC - VSENSE) VSENSETRIP GATE Pullup Current GATE Pulldown Current (VGATE - VCC) at PWRGD3 Assertion -1 V VGATEPWRGD3 VGATE - VCC, low-to-high transition VGATE - VCC, MAX5934 External N-Channel Gate Drive TIMER Pullup Current 2 VGATE ITIMERUP VGATE - VCC, MAX5934A VTIMER = 0V _______________________________________________________________________________________ mV V A Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity (VCC = +24V (MAX5934A), VCC = +48V (MAX5934), GND = 0V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1) PARAMETER TIMER Pulldown Current SYMBOL ITIMERON CONDITIONS VTIMER = 1V MIN TYP MAX DC = 3.75%, DC = floating 1.5 3 4.5 DC = 1.88%, DC = high 0.75 1.5 2.25 DC = 0.94%, DC = low UNITS A 0.37 0.75 1.12 ON High Threshold VONH ON low-to-high transition 1.280 1.313 1.355 V ON Low Threshold VONL ON high-to-low transition 1.221 1.233 1.245 V ON Hysteresis VONHYST 80 ON Input Bias Current IINON LATCH/RETRY and POL_SEL Low-Voltage Threshold VLRIL, VPOS_SEL_IL LATCH/RETRY and POL_SEL High-Voltage Threshold VLRIH, VPOS_SEL_IH LATCH/RETRY and POL_SEL Input Current ILR_IN, VPOL_SEL = 80V 4.5 IPOS_SEL_IN VPOL_SEL = 0V -37 Source GATE Clamp Voltage VSGZ VGATE - VOUT PWRGD_ Output Low Voltage VOL PWRGD_ Leakage Current IOH Thermal Shutdown VON = 0V -1 0.4 15 16.4 19 0.4 IO = 4mA 2.5 VPWRGD_ = 80V 10 VSENSE = 0 to VCC -1 V V A C +150 C 20 ISENSE V A IO = 2mA Thermal-Shutdown Hysteresis A V 3.2 Temperature rising SENSE Input Bias Current mV +1 +3 A DC High-Voltage Threshold 1 VDCHTH Rising edge, DC transition from 3.75% to 1.88% 2.150 2.600 2.850 V DC High-Voltage Threshold 2 VDCLTH Rising edge, DC transition from 0.94% to 3.75% 1.075 1.250 1.425 V DC High-Voltage Threshold 1 Hysteresis VDCLHYS 45 mV DC High-Voltage Threshold 2 Hysteresis VDCLHYS 45 mV DC Input Open-Circuit Voltage VDCOC 1.9 V DC Input Impedance RDC_IN 57 k DC Input Current IDC_IN ON Low-to-GATE Low Propagation Delay tPHLON CGATE = 0, Figures 1 and 2 6 s ON High-to-GATE High Propagation Delay tPLHON CGATE = 0, Figures 1 and 2 1.7 s V_DC = 80V 50 V_DC = 0V -34 A _______________________________________________________________________________________ 3 MAX5934/MAX5934A ELECTRICAL CHARACTERISTICS (continued) MAX5934/MAX5934A Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity ELECTRICAL CHARACTERISTICS (continued) (VCC = +24V (MAX5934A), VCC = +48V (MAX5934), GND = 0V, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS FB_ Low-to-PWRGD_ Low Propagation Delay tPHLFB_ Figures 1, 3 3.2 s FB_ High-to-PWRGD_ High Propagation Delay tPLHFB_ Figures 1, 3 1.5 s (VCC - VSENSE) High-to-GATE Low Propagation Delay tPHLSENSE TA = +25C, CGATE = 0, Figures 1 and 4 0.5 1.8 2.5 s Note 1: All currents into the device are positive and all currents out of the device are negative. All voltages are referenced to ground, unless noted otherwise. Test Circuit and Timing Diagrams ON LATCH/ RETRY VCC DC POL_SEL OUT FB1 1.313V SENSE 1.233V ON 5V 5k 5V 5k 5V 5k tPLHON MAX5934 MAX5934A PWRGD2 FB2 PWRGD1 GATE PWRGD3 TIMER GND 1V N.C. Figure 2. ON-to-GATE Timing 1.313V 1.233V VCC - SENSE FB tPLHFB 1V Figure 3. FB_-to-PWRGD_ Timing 4 5V GATE Figure 1. Test Circuit PWRGD tPHLON tPHLFB 47mV tPHLSENSE GATE 1V VCC Figure 4. SENSE-to-GATE Timing _______________________________________________________________________________________ Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity SUPPLY CURRENT vs. SUPPLY VOLTAGE TA = +25C 2.0 ICC (mA) TA = +85C 1.5 1.2 0.9 VCC = 48V 1.5 1.0 TA = -40C VCC = 33V 0.6 0.5 1.245 1.240 1.235 1.230 1.225 1.220 1.215 1.210 1.205 0.3 1.200 0 0 40 48 56 64 -40 80 72 -15 10 35 -40 85 60 10 35 60 TEMPERATURE (C) TEMPERATURE (C) FB_ HIGH-VOLTAGE THRESHOLD vs. TEMPERATURE FB_ HYSTERESIS vs. TEMPERATURE IGATE PULLUP CURRENT vs. TEMPERATURE 1.325 0.10 FB_ HYSTERESIS (V) 1.320 1.315 1.310 1.305 1.300 1.295 1.290 -5 -6 IGATE PULLUP CURRENT (A) 1.330 0.09 0.08 0.07 0.06 0.05 1.285 1.280 10 35 85 60 -15 10 35 -10 -11 -40 -15 10 35 60 85 TEMPERATURE (C) TEMPERATURE (C) GATE DRIVE vs. SUPPLY VOLTAGE VCC = +48V 14 13 VCC = +33V 11 10 9 MAX5934 toc08 16 17 16 GATE DRIVE (VGATE - VCC) (V) MAX5934 toc07 17 GATE DRIVE (VGATE - VCC) (V) -9 85 60 GATE DRIVE vs. TEMPERATURE 12 -8 -13 -40 TEMPERATURE (C) 15 -7 -12 0.04 -15 85 MAX5934 toc06 0.11 MAX5934 toc04 1.335 -40 -15 VCC (V) MAX5934 toc05 33 FB_ HIGH-VOLTAGE THRESHOLD (V) MAX5934 toc03 2.5 FB_ LOW-VOLTAGE THRESHOLD (V) 2.1 1.250 MAX5934 toc02 2.4 ICC (mA) 3.0 MAX5934 toc01 2.7 1.8 FB_ LOW-VOLTAGE THRESHOLD vs. TEMPERATURE SUPPLY CURRENT vs. TEMPERATURE 15 14 13 12 11 8 10 7 -40 -15 10 35 TEMPERATURE (C) 60 85 32 40 48 56 64 72 80 VCC (V) _______________________________________________________________________________________ 5 MAX5934/MAX5934A Typical Operating Characteristics (VCC = +48V, TA = +25C, unless otherwise noted.) Typical Operating Characteristics (continued) (VCC = +48V, TA = +25C, unless otherwise noted.) TIMER PULLUP CURRENT vs. TEMPERATURE ON HIGH-VOLTAGE THRESHOLD vs. TEMPERATURE TIMER PULLUP CURRENT vs. SUPPLY VOLTAGE -70 -75 -80 -85 TA = +25C TA = +85C -75 -76 TA = -40C -77 -78 -90 -15 10 35 85 60 1.333 1.323 1.313 1.303 1.293 1.283 -79 -40 33 TEMPERATURE (C) 40 48 56 64 -40 80 72 -15 60 1.245 1.235 1.225 MAX5934 toc13 0.080 0.078 ON HYSTERESIS (V) 1.255 35 ON HYSTERESIS vs. TEMPERATURE MAX5934 toc12 1.265 10 TEMPERATURE (C) VCC (V) ON LOW-VOLTAGE THRESHOLD vs. TEMPERATURE ON LOW-VOLTAGE THRESHOLD (V) MAX5934 toc11 -74 1.343 ON HIGH-VOLTAGE THRESHOLD (V) TIMER PULLUP CURRENT (A) -65 MAX5934 toc10 -73 MAX5934 toc09 -60 TIMER PULLUP CURRENT (A) 0.076 0.074 0.072 1.215 VCC = +48V 1.205 0.070 -15 10 35 60 85 10 35 60 PWRGD_ OUTPUT VOLTAGE LOW vs. LOAD CURRENT SENSE REGULATION VOLTAGE vs. FB_ VOLTAGE 16 14 12 10 8 6 TA = +85C TA = +25C TA = -40C 2 50 85 MAX5934 toc15 MAX5934 toc14 18 45 40 35 30 25 20 15 10 5 0 0 10 30 50 ILOAD (mA) 6 -15 TEMPERATURE (C) 20 4 -40 TEMPERATURE (C) SENSE REGULATION VOLTAGE (mV) -40 PWRGD_ VOUT LOW (V) MAX5934/MAX5934A Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity 70 90 0 0.2 0.4 0.6 0.8 VFB (V) _______________________________________________________________________________________ 1.0 85 Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity PIN NAME FUNCTION 1 LATCH/ RETRY 2 ON On/Off Control Input. ON implements the undervoltage-lockout threshold and resets the part after a fault latch (see the Fault Management (LATCH/RETRY) section). 3 POL_SEL PWRGD_ Polarity Select Input. Leave POL_SEL open or drive to logic-high voltage for PWRGD_ asserted high. Connect POL_SEL to GND for PWRGD_ asserted low. 4 FB1 Power-Good Comparator Input. Connect a resistive divider between output, FB1, and GND to monitor the output voltage (see the Power-Good (PWRGD_ ) Detection section). FB1 is also used as feedback for the current-limit foldback function. 5 PWRGD2 Open-Drain Power-Good Output. POL_SEL determines the output polarity of PWRGD2. PWRGD2 is asserted when FB2 is higher than VFB2H. PWRGD2 deasserts when FB2 is lower than VFB2L (see the Power-Good (PWRGD_) Detection section). 6 PWRGD1 Open-Drain Power-Good Output. POL_SEL determines the output polarity of PWRGD1. PWRGD1 is asserted when FB1 is higher than VFB1H. PWRGD1 deasserts when FB1 is lower than VFB1L (see the Power-Good (PWRGD_) Detection section). 7 PWRGD3 Open-Drain Power-Good Output. POL_SEL determines the output polarity of PWRGD3. PWRGD3 asserts when GATE is at maximum voltage. PWRGD3 deasserts after the timeout following an overcurrent event (see the Power-Good (PWRGD_) Detection section). 8 GND Ground 9 OUT Output Voltage. OUT is used as the return path for the internal GATE protection clamping circuitry. 10 TIMER Timing Input. Connect a capacitor from TIMER to GND to program the maximum time the part is allowed to remain in current limit (see the TIMER section). 11 GATE Gate-Drive Output. The high-side gate drive for the external n-channel MOSFET (see the GATE section). 12 FB2 Noninverting Comparator Input. FB2 is used to monitor any other voltage in the system. When FB2 rises higher than VFB2H, PWRGD2 asserts. When FB2 drops below VFB2L, PWRGD2 deasserts. 13 N.C. No Connection. Not internally connected. 14 SENSE Current-Sense Input. Connect a sense resistor from VCC to SENSE and the drain of the external n-channel MOSFET. 15 DC Duty-Cycle Select. When DC is floating, the default duty cycle is 3.75%. Connect DC to VCC to set the duty cycle to 1.88%. Connect DC to GND to set the duty cycle to 0.94%. 16 VCC Power-Supply Input. Bypass VCC to GND with a 0.1F capacitor. The input voltage range is from +9V to +80V for the MAX5934A and +33V to +80V for the MAX5934. Circuit-Breaker Fault-Management Select Input. Connect LATCH/RETRY to GND to latch off after a circuitbreaker fault. Leave LATCH/RETRY open or drive to logic-high voltage for automatic restart after a circuitbreaker fault. _______________________________________________________________________________________ 7 MAX5934/MAX5934A Pin Description Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity MAX5934/MAX5934A Functional Diagram FB1 SENSE VCC MAX5934 MAX5934A PWRGD3 4.3V OPEN DRAIN VP VP GEN CHARGE PUMP AND GATE DRIVER REF GEN PWRGD1 GATE GATE OUT OPEN DRAIN FB2 PWRGD2 1.233V OPEN DRAIN ON PWRGD_ POLARITY SELECT VCC VUVLO LOGIC CIRCUITBREAKER FAULTMANAGEMENT SELECT VP 0.5V 75A DUTY CYCLE 1.233V LATCH/RETRY DC TIMER ITIMERON GND 8 POL_SEL _______________________________________________________________________________________ Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity The MAX5934/MAX5934A monitor input voltage, output voltage, output current, and die temperature. These devices feature three power-good outputs (PWRGD_) to indicate status by monitoring the voltage at FB1, FB2, and GATE (see the Power-Good (PWRGD_) Detection section). PWRGD1 indicates an output-voltage status, PWRGD2 can be used to indicate an overvoltage condition on the main power-supply rail, and PWRGD3 asserts when GATE voltage has charged to 4.3V above the supply rail. PWRGD3 deasserts when the TIMER voltage exceeds a 1.233V threshold in response to an extended fault condition. The MAX5934/MAX5934A control gate voltage on the external MOSFET to limit load current at startup and at overload to a value determined as: The MAX5934/MAX5934A are fully integrated hot-swap controllers for positive supply rails. These devices allow for the safe insertion and removal of circuit cards into live backplanes without causing glitches on the backplane power-supply rail. During startup, the MAX5934/ MAX5934A act as current regulators using an external sense resistor and MOSFET to limit the amount of current drawn by the load. The MAX5934A operates from a +9V to +80V supply voltage range and has a default UVLO set to +8.3V. The MAX5934 operates from a +33V to +80V supply voltage range and has a default UVLO set to +31V. The UVLO threshold is adjustable using a resistive divider connected from VCC to ON to GND (see R2 and R3 in Figure 5). VIN M1 RSENSE 0.025 IRF530 RG 10 5% R1 1k, 5% C1 10nF 16 R2 49.9k 1% VCC 2 14 SENSE ON 11 GATE OUT 9 R3 3.4k 1% R4 59k 1% 10 FB1 TIMER CTIMER 0.68F 1 LATCH/RETRY R7 24k 5% CL RL 4 R5 3.57k 1% MAX5934 MAX5934A VCC R6 24k 5% PWRGD1 6 PWRGD1 PWRGD2 VCC 3 5 PWRGD2 POL_SEL PWRGD3 7 VMONITOR VCC 15 DC FB2 GND 8 12 PWRGD3 R9 90k 1% R10 1k 1% Figure 5. Application Circuit _______________________________________________________________________________________ 9 MAX5934/MAX5934A Detailed Description MAX5934/MAX5934A Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity ILOAD = 1) TIMER's voltage goes below 0.5V VSENSETRIP RSENSE where: VSENSETRIP = VIN - VSENSE VSENSETRIP varies from a low of 12mV when the voltage at FB1 = 0V and increases to 47mV as the voltage at FB1 increases to 0.5V and beyond (see Figure 6). Thus, the current limit is low at a low output voltage, and increases as the output voltage reaches its final value. This gradually increases the limiting load current at startup and creates a foldback current limit under overload or short-circuit conditions. See Figure 5 for FB1 and RSENSE connections. Power-Up Mode During power-up, the MAX5934/MAX5934A gradually turn on the external n-channel MOSFETs. The MAX5934/MAX5934A monitor and provide current-limit protection to the load at all times. The current limit is programmable using an external current-sense resistor connected from V CC to SENSE. The MAX5934/ MAX5934A feature current-limit foldback and duty-cycle limit to ensure robust operation during load-fault and short-circuit conditions (see the Detailed Description and Overcurrent Protection sections). TIMER Connect an external capacitor from TIMER to ground to set the maximum overcurrent timeout limit. When the voltage at TIMER reaches 1.233V, GATE goes low and the 75A pullup current turns off (see the Functional Diagram). As a result, a preset pulldown current (ITIMERON) discharges the capacitor. To reset the internal fault latch, these two conditions must be met: VCC - VSENSE 47mV 2) ON goes low When the current limit is not active, TIMER goes low by the I TIMERON current source. After the current limit becomes active, the ITIMEROFF pullup current source is connected to TIMER and the voltage rises with a slope of 75A/CTIMER as long as the current limit remains active. A capacitor from TIMER to GND (CTIMER) sets the desired current-limit timeout: TLIMIT = (CTIMER / 75A) x 1.233V GATE GATE provides a high-side gate drive for the external n-channel MOSFET. An internal charge-pump circuit guarantees at least 10V of gate drive for supply voltages higher than 20V (MAX5934A) and a 4.5V gate drive for supply voltages between 10.8V and 20V (MAX5934A) (for the MAX5934, see the Electrical Characteristics table). Connect an external capacitor from GATE to ground to set the rising slope of the voltage at GATE. The voltage at GATE is adjusted to maintain a constant voltage across RSENSE when the current limit is reached while the TIMER capacitor starts to charge. When the voltage at TIMER exceeds 1.233V, the voltage at GATE goes low. The MAX5934/MAX5934A monitor voltages at ON, VCC, and TIMER. GATE is pulled to GND whenever ON goes low, or the VCC supply voltage decreases below the UVLO threshold, or TIMER increases above the 1.233V threshold. Gate Voltage The Gate Drive vs. Supply Voltage graph in the Typical Operating Characteristics illustrates that GATE clamps to a maximum of 18V above the input voltage. The MAX5934 minimum gate-drive voltage is 10V at a minimum input-supply voltage of 33V. The MAX5934A minimum gate-drive voltage is 4.5V at a minimum supply of 10.8V. Therefore, a logic-level MOSFET must be used if the input supply is below 20V. Fault Management (LATCH/RETRY) The MAX5934/MAX5934A feature either latched-off or autoretry fault management configurable by the LATCH/RETRY input. To select automatic restart after a circuit-breaker fault, drive LATCH/RETRY high (above VLRIH) or leave it floating (see Figure 5). 12mV 0V 0.5V VFB Figure 6. Current-Limit Sense Voltage vs. Feedback Voltage 10 ______________________________________________________________________________________ Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity Power-Good (PWRGD_ ) Detection The MAX5934/MAX5934A feature three power-good outputs (PWRGD_) to indicate the status of three separate voltages. PWRGD_ asserts if the device detects an error condition. PWRGD_ is true when FB_ voltages exceed the low-tohigh threshold voltage (VFB_H). PWRGD_ is false when FB_ voltages go lower than the high-to-low threshold voltage (VFB_L). Connect external pullup resistors between PWRGD_ and OUT to pull up the PWRGD_ voltages to VOUT. PWRGD2 can be used to indicate an overvoltage condition on the main power-supply rail. PWRGD3 asserts when GATE voltage has charged to 4.3V above the supply rail. PWRGD3 deasserts when the TIMER voltage exceeds 1.233V threshold in response to an extended fault condition. The output polarity of PWRGD_ is determined by POL_SEL. Drive POL_SEL high or leave it floating to select PWRGD_ active high. Connect POL_SEL to GND for PWRGD_ active low. Undervoltage Lockout (UVLO) The MAX5934A operates from a +9V to +80V supply voltage range and has a default UVLO set at +8.3V. The MAX5934 operates from a +33V to +80V supply voltage range and has a default UVLO set at +31V. The UVLO thresholds are adjustable using a resistive divider connected to VCC (see R2 and R3 in Figure 5). When the input voltage (or VCC) is below the UVLO threshold, the MOSFET is held off. When the input voltage (or V CC ) is above the UVLO threshold, the MAX5934/MAX5934A go into normal operation (or begin to turn on the external MOSFET). To adjust the UVLO threshold, connect an external resistive divider from VIN (or VCC) to ON and then from ON to GND. The following equation is used to calculate the new UVLO threshold: VUVLO_TH = VREF (1 + (R2 / R3)) where VREF is typically 1.233V. Applications Information Hot-Circuit Insertion The supply bypass capacitors on a circuit board can draw high peak currents from the backplane power bus as they charge when the circuit boards are inserted into a live backplane. This can cause permanent damage to the connector pins and glitch the system supply causing other boards in the system to reset. The MAX5934/MAX5934A are capable of controlling a board's power-supply voltage allowing for the safe insertion or removal of a board from a live backplane. These devices provide undervoltage and overcurrent protection and power-good output signals (PWRGD_). Overcurrent Protection The MAX5934/MAX5934A provide sophisticated overcurrent protection to ensure robust operation under outputcurrent-transient and overcurrent fault conditions. The current-protection circuit employs a foldback current limit and a short-circuit or excessive output-current protection. The MAX5934/MAX5934A offer a current foldback feature where the current folds back as a function of the output voltage that is sensed at FB1. As Figure 6 illustrates, the voltage across RSENSE decreases linearly when FB1 drops below 0.5V and stops at 12mV when VFB1 = 0V. The maximum current-limit equation is: ILIMIT = 47mV / RSENSE For RSENSE = 0.025, the current limit is set to 1.88A and goes down to 480mA at short circuit (output shorted to GND). In addition, the MAX5934/MAX5934A feature an adjustable overcurrent response time. The required time to regulate the MOSFET current depends on the input capacitance of the MOSFET, GATE capacitor (C1), compensation resistor (R1), and the internal delay from SENSE to GATE. Figure 7 shows the propagation delay from a voltage step at SENSE until GATE starts to fall, as a function of overdrive. ______________________________________________________________________________________ 11 MAX5934/MAX5934A In latch mode, the MAX5934/MAX5934A turn the MOSFET off and keep it off after an overcurrent fault. After the fault condition goes away and TIMER falls below 0.5V, recycle the power supplies or toggle ON low and high again to unlatch the device. In autoretry mode, the MAX5934/MAX5934A turn the MOSFET off after an overcurrent fault occurs. After the fault condition is removed, the device waits for TIMER to fall below 0.5V and then automatically restarts. If the fault is due to an overtemperature condition, the MAX5934/ MAX5934A wait for the die temperature to cool down below the +130C threshold before restarting. Undervoltage and Overvoltage Detection RESPONSE TIME TO OVERCURRENT An undervoltage fault is detected when V ON goes below the trip point (VONL = 1.233V). When this occurs, GATE pulls low and stays low until VON rises above (VONH = 1.313V). An example of overvoltage protection is shown in Figure 8. Zener diode D1 turns on when VIN exceeds the diode's breakdown voltage and begins to pull TIMER high. When VTIMER goes higher than 1.233V, a fault is detected and GATE pulls low. As a result, Q1 turns off. Figure 9 shows overvoltage waveforms for VIN (see the Fault Management (LATCH/RETRY) section for restart conditions). 14 12 PROPAGATION DELAY (s) MAX5934/MAX5934A Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity 10 8 6 4 2 0 0 50 150 100 250 200 Supply Transient Protection 300 The MAX5934/MAX5934A are guaranteed to be safe from damage with supply voltages of up to 85V. Spikes at voltages above 85V may damage the part. Instantaneous short-circuit conditions, can cause large VCC - VSENSE (mV) Figure 7. Response Time to Overcurrent VIN M1 RSENSE 0.025 IRF530 R1 1k 5% D1 30V 1N5256B C1 10nF 16 R2 49.9k 1% VCC 2 RG 10 5% 14 SENSE ON 11 GATE OUT 9 R4 59k 1% R3 3.4k 1% 10 FB1 TIMER CTIMER 0.68F 1 LATCH/RETRY R7 24k 5% R8 24k 5% 4 R5 3.57k 1% MAX5934 MAX5934A VCC R6 24k 5% PWRGD1 6 PWRGD PWRGD2 VCC 3 POL_SEL PWRGD3 5 7 VMONITOR VCC 15 DC FB2 GND 8 12 R9 90k 1% R10 1k 1% Figure 8. Overvoltage Detection 12 ______________________________________________________________________________________ CL Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity MAX5934/MAX5934A OVERVOLTAGE WAVEFORMS IN 50V/div ISENSE 5A/div GATE 50V/div IRF530 TIMER 10V/div OUTPUT 50V/div 10s/div Figure 9. Overvoltage Waveforms Figure 10. Recommended Layout for R2, R3, and RSENSE changes in currents flowing through the power-supply traces. This can cause inductive voltage spikes that could exceed 85V. Use wider traces or heavier trace plating and connect a 0.1F capacitor between VCC and GND to minimize these inductive spikes. Use a transient voltage suppressor (TVS) at the input to prevent damage from voltage surges. An SMBJ54A is recommended. If the MAX5934/MAX5934A die temperature reaches +150C, an overtemperature fault is generated. As a result, GATE goes low and turns the external MOSFET off. The MAX5934/MAX5934A die temperature must cool down below +120C before the overtemperature fault condition is removed. Thermal Shutdown Power-Up Sequence Board Layout and Bypassing At power-up, transistor Q1 (see the Typical Application Circuit) is off until these three conditions are met: * VON exceeds the turn-on threshold voltage * VCC exceeds the UVLO threshold * VTIMER stays below 1.233V The voltage at GATE increases with a slope of 10A/C1 (where C1 is shown in the Typical Application Circuit) and IINRUSH = CL x 10A / C1. When the voltage across RSENSE goes too high, the inrush current is limited by the internal current-limit circuitry that adjusts the GATE voltage to keep a constant voltage across RSENSE. Kelvin connections are recommended for accurate current sensing. Make sure the minimum trace width for 2oz copper is 1.5mm per amp. A width of 4mm per amp is recommended. Connect a resistive divider from VCC to ON as close as possible to ON and have short traces from VCC and GND. To decrease induced noise connect a 0.1F capacitor between ON and GND (see Figure 10). The external MOSFET must be thermally coupled to the MAX5934/MAX5934A to ensure proper thermal shutdown operation. ______________________________________________________________________________________ 13 Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity MAX5934/MAX5934A Typical Application Circuit VIN M1 RSENSE 0.025 IRF530 R1 1k 5% RG 10 5% C1 10nF R2 49.9k 1% 16 VCC 2 14 SENSE ON 11 GATE OUT 9 R4 59k 1% R3 3.4k 1% SMBJ54A 10 FB1 TIMER LATCH/RETRY R8 24k 5% CL R5 3.57k 1% MAX5934 MAX5934A 1 R7 24k 5% 4 CTIMER 0.68F VCC R6 24k 5% PWRGD1 6 PWRGD PWRGD2 VCC 3 POL_SEL PWRGD3 5 7 VMONITOR VCC 15 DC FB2 GND 8 12 R9 90k 1% R10 1k 1% GND Chip Information TRANSISTOR COUNT: 1573 PROCESS: BiCMOS 14 ______________________________________________________________________________________ Positive High-Voltage, Hot-Swap Controllers with Selectable Fault Management and Status Polarity QSOP.EPS PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH 21-0055 E 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products. MAX5934/MAX5934A Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)