NTMS4177PR2G - ON Semiconductor

© Semiconductor Components Industries, LLC, 2008

March, 2008 - Rev. 0

1Publication Order Number:

NTMS4177P/D

NTMS4177P

Power MOSFET

-30 V, -11.4 A, P-Channel, SOIC-8

Features

•Low RDS(on) to Minimize Conduction Losses

•Low Capacitance to Minimize Driver Losses

•Optimized Gate Charge to Minimize Switching Losses

•SOIC-8 Surface Mount Package Saves Board Space

•This is a Pb-Free Device

Applications

•Load Switches

•Notebook PC's

•Desktop PC's

MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)

Rating Symbol Value Unit

Drain-to-Source Voltage VDSS -30 V

Gate-to-Source Voltage VGS ±20 V

Continuous Drain

Current RqJA (Note 1)

Steady

State

TA = 25°CID-8.9 A

TA = 70°C -7.1

Power Dissipation

RqJA (Note 1)

TA = 25°C PD1.52 W

Continuous Drain

Current RqJA (Note 2)

TA = 25°CID-6.6 A

TA = 70°C -5.3

Power Dissipation

RqJA (Note 2)

TA = 25°C PD0.84 W

Continuous Drain

Current RqJA t < 10 s

(Note 1)

TA = 25°CID-11.4 A

TA = 70°C -9.3

Power Dissipation

RqJA t < 10 s (Note 1)

TA = 25°C PD2.5 W

Pulsed Drain Current TA = 25°C,

tp = 10 ms

IDM -46 A

Operating Junction and Storage Temperature TJ, TSTG -55 to

+150

°C

Source Current (Body Diode) IS-2.1 A

Single Pulse Drain-to-Source Avalanche

Energy TJ = 25°C, VDD = 30 V, VGS = 10 V,

IL = 20 Apk, L = 1.0 mH, RG = 25 W

EAS 200 mJ

Lead Temperature for Soldering Purposes

(1/8″ from case for 10 s)

TL260 °C

Stresses exceeding Maximum Ratings may damage the device. Maximum

Ratings are stress ratings only. Functional operation above the Recommended

Operating Conditions is not implied. Extended exposure to stresses above the

Recommended Operating Conditions may affect device reliability.

1. Surface-mounted on FR4 board using 1 inch sq pad size, 1 oz Cu.

2. Surface-mounted on FR4 board using the minimum recommended pad size.

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P-Channel

-30 V

19 mW @ -4.5 V

12 mW @ -10 V

RDS(on) Max ID Max

V(BR)DSS

-11.4 A

Device Package Shipping†

ORDERING INFORMATION

NTMS4177PR2G SOIC-8

(Pb-Free)

2500/Tape & Reel

SOIC-8

CASE 751

STYLE 12

4177P = Device Code

A = Assembly Location

Y = Year

WW = Work Week

G= Pb-Free Package

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

84177P

AYWW

MARKING DIAGRAM

& PIN ASSIGNMENT

SSSG

DDDD

NTMS4177P

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THERMAL RESISTANCE RATINGS

Rating Symbol Max Unit

Junction-to-Ambient – Steady State (Note 3) RqJA 82

°C/W

Junction-to-Ambient – t≤10 s (Note 3) RqJA 50

Junction-to-FOOT (Drain) RqJF 20

Junction-to-Ambient – Steady State (Note 4) RqJA 148

3. Surface-mounted on FR4 board using 1 inch sq pad size, 1 oz Cu.

4. Surface-mounted on FR4 board using the minimum recommended pad size.

ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)jk

Characteristic Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain-to-Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = -250 mA-30 V

Drain-to-Source Breakdown Voltage Tem‐

perature Coefficient

V(BR)DSS/TJ29 mV/°C

Zero Gate Voltage Drain Current IDSS VGS = 0 V,

VDS = -24 V

TJ = 25°C-1.0 mA

TJ = 85°C-5.0

Gate-to-Source Leakage Current IGSS VDS = 0 V, VGS = ±20 V ±100 nA

ON CHARACTERISTICS (Note 5)

Gate Threshold Voltage VGS(TH) VGS = VDS, ID = -250 mA-1.5 -2.5 V

Negative Threshold Temperature Coeffi‐

cient

VGS(TH)/TJ6.0 mV/°C

Drain-to-Source On Resistance RDS(on) VGS = -10 V ID = -11.4 A 10 12 mW

VGS = -4.5 V ID = -9.1 A 15 19

Forward Transconductance gFS VDS = -1.5 V ID = -11.4 A 30 S

CHARGES, CAPACITANCES AND GATE RESISTANCE

Input Capacitance CISS VGS = 0 V, f = 1.0 MHz,

VDS = -24 V

3100

Output Capacitance COSS 550

Reverse Transfer Capacitance CRSS 370

Total Gate Charge QG(TOT)

VGS = -4.5 V, VDS = -15 V,

ID = -11.4 A

Threshold Gate Charge QG(TH) 3.3

Gate-to-Source Charge QGS 10

Gate-to-Drain Charge QGD 13

Total Gate Charge QG(TOT) VGS = -10 V, VDS = -15 V,

ID = -11.4 A,

55 nC

Gate Resistance RG2.0 4.0 W

SWITCHING CHARACTERISTICS (Note 6)

Turn-On Delay Time td(ON)

VGS = -10 V, VDD = -15 V,

ID = -1.0 A, RG = 6.0 W

Rise Time tr13

Turn-Off Delay Time td(OFF) 64

Fall Time tf36

DRAIN-TO-SOURCE CHARACTERISTICS

Forward Diode Voltage VSD VGS = 0 V

ID = -2.1 A

TJ = 25°C-0.73 -1.0 V

TJ = 125°C0.54

Reverse Recovery Time tRR

VGS = 0 V, dIS/dt = 100 A/ms,

IS = -2.1 A

Charge Time Ta18

Discharge Time Tb16

Reverse Recovery Time QRR 30 nC

5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

6. Switching characteristics are independent of operating junction temperatures.

NTMS4177P

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TYPICAL PERFORMANCE CURVES

TJ = 125°C

-VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

-ID, DRAIN CURRENT (AMPS)

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

-VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)

Figure 3. On-Resistance vs. Gate-to-Source

Voltage

-VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)

RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)

-ID, DRAIN CURRENT (AMPS)

Figure 4. On-Resistance vs. Drain Current and

Gate Voltage

Figure 5. On-Resistance Variation with

Temperature

TJ, JUNCTION TEMPERATURE (°C)

TJ = 25°C

TJ = -55°C

TJ = 25°C

ID = -11.4 A

VGS = -10 V

RDS(on), DRAIN-TO-SOURCE

RESISTANCE (NORMALIZED)

TJ = 25°C

RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)

VGS = -10 V

Figure 6. Drain-to-Source Leakage Current

vs. Voltage

-VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

VGS = 0 V

-IDSS, LEAKAGE (nA)

TJ = 150°C

TJ = 125°C

VGS = -4.5 V

VDS ≥ 10 V

-3.2 V

-3.0 V

TJ = 25°C

ID = -11.4 A

-ID, DRAIN CURRENT (AMPS)

-5 V

-4.5 V

-4 V

-3.6 V

0 0.5 1.0 1.5 2.0 2.5 3.0 0

1.5 2.5 3.5 4.0

0.01

0.02

0.03

246 810

0.006

0.008

0.010

0.012

0.016

2101218

0.6

0.8

1.0

1.2

1.4

1.6

-50 -25 0 25 50 75 100 125 150 100

1000

10000

51015202530

-3.4 V

-2.8 V

-10V

-4.2 V

-3.8 V

0.04

3.5 4.0 4.5 5.0

0.05

14 16468

-2.6 V

2.0 3.0

0.014

20 22

NTMS4177P

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TYPICAL PERFORMANCE CURVES

Figure 7. Capacitance Variation Figure 8. Gate-To-Source and

Drain-To-Source Voltage vs. Total Charge

-VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)

Figure 9. Resistive Switching Time

Variation vs. Gate Resistance

-IS, SOURCE CURRENT (AMPS)

VGS = 0 V

TJ = 25°C

Figure 10. Diode Forward Voltage vs. Current

DRAIN-TO-SOURCE VOLTAGE (VOLTS)

C, CAPACITANCE (pF)

500

0510

TJ = 25°C

Ciss

Coss

Crss

15 25

2000

VGS = 0 V

-VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)

QG, TOTAL GATE CHARGE (nC)

ID = -11.4 A

TJ = 25°C

VGS

QGS

RG, GATE RESISTANCE (OHMS)

t, TIME (ns)

VDD = -15 V

ID = -1 A

VGS = -10 V

td(on)

td(off)

QGD

1000

1500

TJ, STARTING JUNCTION TEMPERATURE (°C)

EAS, SINGLE PULSE DRAIN-TO-SOURCE

AVALANCHE ENERGY (mJ)

ID = -20 A

Figure 11. Maximum Rated Forward Biased

Safe Operating Area

-VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

-ID, DRAIN CURRENT (AMPS)

RDS(on) LIMIT

THERMAL LIMIT

PACKAGE LIMIT

VGS = -20 V

SINGLE PULSE

TC = 25°Cdc

10 ms

1 ms

100 ms

10 ms

Figure 12. Maximum Avalanche Energy vs.

Starting Junction Temperature

3000

-VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

VDS

100

1 10 100

1000

0.90.5 0.6 0.7

0.8

0.1 10 100

100

0.1

0.01

25 50 75 100

100

150125

2500

20 30

3500

4500

4000

40 6050

125

150

175

200

NTMS4177P

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PACKAGE DIMENSIONS

SOIC-8 NB

CASE 751-07

ISSUE AJ

SEATING

PLANE

X 45 _

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE

MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.127 (0.005) TOTAL

IN EXCESS OF THE D DIMENSION AT

MAXIMUM MATERIAL CONDITION.

6. 751-01 THRU 751-06 ARE OBSOLETE. NEW

STANDARD IS 751-07.

0.10 (0.004)

DIM

MIN MAX MIN MAX

INCHES

4.80 5.00 0.189 0.197

MILLIMETERS

B3.80 4.00 0.150 0.157

C1.35 1.75 0.053 0.069

D0.33 0.51 0.013 0.020

G1.27 BSC 0.050 BSC

H0.10 0.25 0.004 0.010

J0.19 0.25 0.007 0.010

K0.40 1.27 0.016 0.050

M0 8 0 8

N0.25 0.50 0.010 0.020

S5.80 6.20 0.228 0.244

-X-

-Y-

0.25 (0.010)

-Z-

0.25 (0.010) ZSXS

____

1.52

0.060

7.0

0.275

0.6

0.024

1.270

0.050

4.0

0.155

ǒmm

inchesǓ

SCALE 6:1

*For additional information on our Pb-Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

STYLE 12:

PIN 1. SOURCE

2. SOURCE

3. SOURCE

4. GATE

5. DRAIN

6. DRAIN

7. DRAIN

8. DRAIN

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NTMS4177P/D

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