DC to 6 GHz, 45 dB TruPwr Detector with Envelope Threshold Detection ADL5904 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM VPOS ENBL 5 4 7 VIN- RST 16 15 ADL5904 - R Q 12 Q S Q 13 Q 10 VRMS + RFIN ENVELOPE DETECTOR 1 RMS 11 3 9 4 GND VCAL CRMS DECL 2 6 DNC 8 13838-001 RMS and envelope threshold detection Broad input frequency range: dc to 6 GHz RF input range: 45 dB (-30 dBm to +15 dBm) RMS linear in decibel output, scaled 36.5 mV/dB Input envelope threshold detection and latching Programmable threshold and latch reset function Fast response time: 12 ns from RFIN to Q/Q latch All functions temperature and supply stable Operates at 3.3 V from -40C to +105C Low power: 3.5 mA Power-down capability to 100 A 16-lead, 3 mm x 3 mm LFCSP package Figure 1. APPLICATIONS Transmitter signal strength indication (TSSI) Wireless power amplifier input and output protection Wireless receiver input protection GENERAL DESCRIPTION The ADL5904 is a dual-function radio frequency (RF) TruPwrTM detector that operates from dc to 6 GHz. It provides rms power measurement along with a programmable envelope threshold detection function. The rms power measurement function has a 45 dB detection range, nominally from -30 dBm to +15 dBm. The rms power measurement function features low power consumption and an intrinsically ripple free error transfer function. The envelope threshold detection function compares the voltage from an internal envelope detector with a user defined input voltage. When the voltage from the envelope detector exceeds Rev. B the user defined threshold voltage, an internal comparator captures and latches the event to a set/reset (SR) flip flop. The response time from the RF input signal exceeding the user programmed threshold to the output latching is 12 ns. The latched event is held on the flip-flop until a reset pulse is applied. The RF input of the ADL5904 is dc-coupled, allowing operation down to arbitrarily low ac frequencies. It operates on a 3.3 V supply and consumes 3.5 mA. A disable mode reduces this current to 100 A when a logic low is applied to the ENBL pin. The ADL5904 is supplied in a 3 mm x 3 mm, 16-lead LFCSP for operation over the wide temperature range of -40C to +105C. Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 (c)2016-2017 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com ADL5904* PRODUCT PAGE QUICK LINKS Last Content Update: 12/18/2017 COMPARABLE PARTS DESIGN RESOURCES View a parametric search of comparable parts. * ADL5904 Material Declaration * PCN-PDN Information EVALUATION KITS * Quality And Reliability * ADL5904 Evaluation Board * Symbols and Footprints DOCUMENTATION DISCUSSIONS Data Sheet View all ADL5904 EngineerZone Discussions. * ADL5904: DC to 6 GHz, 45 dB TruPwr Detector with Envelope Threshold Detection Data Sheet SAMPLE AND BUY TOOLS AND SIMULATIONS Visit the product page to see pricing options. * ADL5904 S-Parameters TECHNICAL SUPPORT REFERENCE DESIGNS Submit a technical question or find your regional support number. * CN0399 DOCUMENT FEEDBACK REFERENCE MATERIALS Submit feedback for this data sheet. Product Selection Guide * RF, Microwave, and Millimeter Wave IC Selection Guide 2017 This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified. ADL5904 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 Theory of Operation ...................................................................... 18 Applications ....................................................................................... 1 Basic Connections for RMS Measurement ............................. 18 Functional Block Diagram .............................................................. 1 Choosing a Value for CRMS......................................................... 19 General Description ......................................................................... 1 VRMS Calibration and Error Calculation .............................. 20 Revision History ............................................................................... 2 Basic Connections for Threshold Detection .......................... 21 Specifications..................................................................................... 3 Q and Q Response Time ........................................................... 21 Absolute Maximum Ratings ............................................................ 8 Setting the VIN- Threshold Detection Voltage ........................ 22 ESD Caution .................................................................................. 8 Evaluation Board Schematic and Configuration Options ........ 25 Pin Configuration and Function Descriptions ............................. 9 Outline Dimensions ....................................................................... 27 Typical Performance Characteristics ........................................... 10 Ordering Guide .......................................................................... 27 Test Circuits ..................................................................................... 17 REVISION HISTORY 7/2017--Rev. A to Rev. B Changes to Basic Connection for RMS Measurement Section and Figure 44 ................................................................................... 18 Change to Figure 54 ....................................................................... 25 Change to C14 Default Value, Table 7 ......................................... 26 5/2017--Rev. 0 to Rev. A Changes to Ordering Guide .......................................................... 27 10/2016--Revision 0: Initial Version Rev. B | Page 2 of 27 Data Sheet ADL5904 SPECIFICATIONS VPOS = 3.3 V, continuous wave (CW) input, TA = 25C, ZO = 50 , Capacitor CRMS = 10 nF, unless otherwise noted. Table 1. Parameter OVERALL FUNCTION Frequency Range f = 10 MHz 1.0 dB Input Range Input Level, 1.0 dB Maximum Minimum VRMS Output Voltage VRMS Deviation vs. Temperature VRMS Logarithmic Slope VRMS Logarithmic Intercept VIN- Setpoint Voltage Threshold Variation vs. Temperature Test Conditions/Comments Three-point calibration at -25 dBm, -10 dBm, and +10 dBm RFIN pin = 10 dBm RFIN pin = -20 dBm Deviation from output at 25C -40C < TA < +85C, PIN = 10 dBm -40C < TA < +105C, PIN = 10 dBm -40C < TA < +85C, PIN = -15 dBm -40C < TA < +105C, PIN = -15 dBm PIN = -25 dBm to -10 dBm PIN = -10 dBm to +10 dBm PIN = -25 dBm to -10 dBm PIN = -0 dBm to +10 dBm For threshold detection at 10 dBm For threshold detection at 0 dBm For threshold detection at -10 dBm -40C < TA < +85C, PIN 10 dBm -40C < TA < +85C, PIN 0 dBm -40C < TA < +85C, PIN -10 dBm -40C < TA < +105C, PIN 10 dBm -40C < TA < +105C, PIN 0 dBm -40C < TA < +105C, PIN -10 dBm f = 30 MHz 1.0 dB Input Range Input Level, 1.0 dB Maximum Minimum VRMS Output Voltage VRMS Deviation vs. Temperature VRMS Logarithmic Slope VRMS Logarithmic Intercept VIN- Setpoint Voltage Three-point calibration at -25 dBm, -10 dBm, and +10 dBm RFIN pin = 10 dBm RFIN pin = -20 dBm Deviation from output at 25C -40C < TA < +85C, PIN = 10 dBm -40C < TA < +105C, PIN = 10 dBm -40C < TA < +85C, PIN = -15 dBm -40C < TA < +105C, PIN = -15 dBm PIN = -25 dBm to -10 dBm PIN = -10 dBm to +10 dBm PIN = -25 dBm to -10 dBm PIN = -10 dBm to +10 dBm For threshold detection at 10 dBm For threshold detection at 0 dBm For threshold detection at -10 dBm Rev. B | Page 3 of 27 Min Typ Max Unit dc to 6000 MHz 45 dB 15 -30 1.63 0.54 dBm dBm V V -0.1/+0.2 -0.1/+0.2 -0.2/+0.2 -0.4/+0.2 36.5 35.3 -35.2 -36 743 240 80 0.2 dB dB dB dB mV/dB mV/dB dBm dBm mV mV mV dB -0.3/0 -0.5/0 0.2 -0.3/0 -0.5/0 dB dB dB dB dB 45 dB 15 -30 1.62 0.54 dBm dBm V V -0.1/+0.1 -0.1/+0.1 -0.2/+0.2 -0.5/+0.2 36.8 35.4 -34.7 -35.7 723 238 80 dB dB dB dB mV/dB mV/dB dBm dBm V mV mV ADL5904 Parameter Threshold Variation vs. Temperature Data Sheet Test Conditions/Comments -40C < TA < +85C, PIN 10 dBm -40C < TA < +85C, PIN 0 dBm -40C < TA < +85C, PIN -10 dBm -40C < TA < +105C, PIN 10 dBm -40C < TA < +105C, PIN 0 dBm -40C < TA < +105C, PIN -10 dBm f = 100 MHz 1.0 dB Input Range Input Level, 1.0 dB Maximum Minimum VRMS Output Voltage VRMS Deviation vs. Temperature VRMS Logarithmic Slope VRMS Logarithmic Intercept VIN- Setpoint Voltage Threshold Variation vs. Temperature f = 900 MHz 1.0 dB Input Range Input Level, 1.0 dB Maximum Minimum VRMS Output Voltage VRMS Deviation vs. Temperature VRMS Logarithmic Slope VRMS Logarithmic Intercept VIN- Setpoint Voltage Min Typ 0/0.2 Max Unit dB -0.4/-0.2 -0.4/0 0/0.2 -0.4/-0.2 -0.4/0 dB dB dB dB dB 45 dB RFIN pin = 10 dBm RFIN pin = -20 dBm Deviation from output at 25C -40C < TA < +85C, PIN = 10 dBm -40C < TA < +105C, PIN = 10 dBm -40C < TA < +85C, PIN = -15 dBm -40C < TA < +105C, PIN = -15 dBm PIN = -25 dBm to -10 dBm PIN = -10 dBm to +10 dBm PIN = -25 dBm to -10 dBm PIN = -10 dBm to +10 dBm For threshold detection at 10 dBm For threshold detection at 0 dBm For threshold detection at -10 dBm -40C < TA < +85C, PIN 10 dBm 15 -30 1.63 0.56 dBm dBm V V -0.1/+0.2 -0.1/+0.2 0/0.1 -0.2/+0.1 34.9 35 -35.7 -35.6 742 239 81 0.1 dB dB dB dB mV/dB mV/dB dBm dBm mV mV mV dB -40C < TA < +85C, PIN 0 dBm -40C < TA < +85C, PIN -10 dBm -40C < TA < +105C, PIN 10 dBm -40C < TA < +105C, PIN 0 dBm -40C < TA < +105C, PIN -10 dBm -0.4/-0.2 -0.5/0 0.1 -0.4/-0.2 -0.5/0 dB dB dB dB dB 45 dB 17 -28 1.61 0.57 dBm dBm V V 0/0.1 0/0.1 -0.2/+0.1 -0.4/+0.1 33.9 35.8 -36.8 -34.8 752 241 81 dB dB dB dB mV/dB mV/dB dBm dBm mV mV mV Three-point calibration at -25 dBm, -10 dBm, and +10 dBm Three-point calibration at -20 dBm, 0 dBm, and +10 dBm RFIN pin = 10 dBm RFIN pin = -20 dBm Deviation from output at 25C -40C < TA < +85C, PIN = 10 dBm -40C < TA < +105C, PIN = 10 dBm -40C < TA < +85C, PIN = -15 dBm -40C < TA < +105C, PIN = -15 dBm PIN = -20 dBm to 0 dBm PIN = 0 dBm to 10 dBm PIN = -20 dBm to 0 dBm PIN = 0 dBm to 10 dBm For threshold detection at 10 dBm For threshold detection at 0 dBm For threshold detection at -10 dBm Rev. B | Page 4 of 27 Data Sheet Parameter Threshold Variation vs. Temperature ADL5904 Test Conditions/Comments -40C < TA < +85C, PIN 10 dBm -40C < TA < +85C, PIN 0 dBm -40C < TA < +85C, PIN -10 dBm -40C < TA < +105C, PIN 10 dBm -40C < TA < +105C, PIN 0 dBm -40C < TA < +105C, PIN -10 dBm f = 1900 MHz 1.0 dB Input Range Input Level, 1.0 dB Maximum Minimum VRMS Output Voltage VRMS Deviation vs. Temperature VRMS Logarithmic Slope VRMS Logarithmic Intercept VIN- Setpoint Voltage Threshold Variation vs. Temperature f = 2600 MHz 1.0 dB Input Range Input Level, 1.0 dB Maximum Minimum VRMS Output Voltage VRMS Deviation vs. Temperature VRMS Logarithmic Slope VRMS Logarithmic Intercept VIN- Setpoint Voltage Min Typ 0.1 Max Unit dB -0.2/+0.1 0.1/0.3 0.1 -0.2/+0.1 0.1/0.3 dB dB dB dB dB 45 dB RFIN pin = 10 dBm RFIN pin = -20 dBm Deviation from output at 25C -40C < TA < +85C, PIN = 10 dBm -40C < TA < +105C, PIN = 10 dBm -40C < TA < +85C, PIN = -15 dBm -40C < TA < +105C, PIN = -15 dBm PIN = -20 dBm to 0 dBm PIN = 0 dBm to 10 dBm PIN = -20 dBm to 0 dBm PIN = 0 dBm to 10 dBm For threshold detection at 10 dBm For threshold detection at 0 dBm For threshold detection at -10 dBm -40C < TA < +85C, PIN 10 dBm 17 -28 1.62 0.55 dBm dBm V V -0.1/+0.3 -0.1/+0.3 -0.2/-0.1 -0.4/-0.2 34.8 36.9 -35.9 -33.8 774 241 78 -0.2/+0.1 dB dB dB dB mV/dB mV/dB dBm dBm mV mV mV dB -40C < TA < +85C, PIN 0 dBm -40C < TA < +85C, PIN -10 dBm -40C < TA < +105C, PIN 10 dBm -40C < TA < +105C, PIN 0 dBm -40C < TA < +105C, PIN -10 dBm -0.1/0 0.2 -0.2/+0.1 -0.1/0 0.2 dB dB dB dB dB 43.5 dB 16 -27.5 1.6 0.51 dBm dBm V V -0.3/+0.3 -0.3/+0.3 -0.2/0 -0.3/0 36.1 37.5 -34 -32.7 775 236 76 dB dB dB dB mV/dB mV/dB dBm dBm mV mV mV Three-point calibration at -20 dBm, 0 dBm, and +10 dBm Three-point calibration at -20 dBm, 0 dBm, and +10 dBm RFIN pin = 10 dBm RFIN pin = -20 dBm Deviation from output at 25C -40C < TA < +85C, PIN = 10 dBm -40C < TA < +105C, PIN = 10 dBm -40C < TA < +85C, PIN = -15 dBm -40C < TA < +105C, PIN = -15 dBm PIN = -20 dBm to 0 dBm PIN = 0 dBm to 10 dBm PIN = -20 dBm to 0 dBm PIN = 0 dBm to 10 dBm For threshold detection at 10 dBm For threshold detection at 0 dBm For threshold detection at -10 dBm Rev. B | Page 5 of 27 ADL5904 Parameter Threshold Variation vs. Temperature Data Sheet Test Conditions/Comments -40C < TA < +85C, PIN 10 dBm -40C < TA < +85C, PIN 0 dBm -40C < TA < +85C, PIN -10 dBm -40C < TA < +105C, PIN 10 dBm -40C < TA < +105C, PIN 0 dBm -40C < TA < +105C, PIN -10 dBm f = 3500 MHz 1.0 dB Input Range Input Level, 1.0 dB Maximum Minimum VRMS Output Voltage VRMS Deviation vs. Temperature VRMS Logarithmic Slope VRMS Logarithmic Intercept VIN- Setpoint Voltage Threshold Variation vs. Temperature f = 5800 MHz 1.0 dB Input Range Input Level, 1.0 dB Maximum Minimum VRMS Output Voltage VRMS Deviation vs. Temperature VRMS Logarithmic Slope VRMS Logarithmic Intercept VIN- Setpoint Voltage Min Typ -0.3/+0.1 Max Unit dB -0.2/0 -0.4/-0.1 -0.3/+0.1 -0.2/0 -0.4/-0.1 dB dB dB dB dB 42 dB RFIN pin = 10 dBm RFIN pin = -20 dBm Deviation from output at 25C -40C < TA < +85C, PIN = 10 dBm -40C < TA < +105C, PIN = 10 dBm -40C < TA < +85C, PIN = -15 dBm -40C < TA < +105C, PIN = -15 dBm PIN = -18 dBm to 0 dBm PIN = 0 dBm to +10 dBm PIN = -18 dBm to 0 dBm PIN = 0 dBm to +10 dBm For threshold detection at 10 dBm For threshold detection at 0 dBm For threshold detection at -10 dBm -40C < TA < +85C, PIN 10 dBm 17 -25 1.54 0.44 dBm dBm V V -0.1/+0.3 -0.2/+0.3 -0.3/-0.1 -0.4/-0.1 35.9 38.8 -32.1 -29.7 608 177 55 0.2 dB dB dB dB mV/dB mV/dB dBm dBm mV mV mV dB -40C < TA < +85C, PIN 0 dBm -40C < TA < +85C, PIN -10 dBm -40C < TA < +105C, PIN 10 dBm -40C < TA < +105C, PIN 0 dBm -40C < TA < +105C, PIN -10 dBm 0.1 -0.5/-0.1 0.2 0.1 -0.5/-0.1 dB dB dB dB dB 37 dB 19 -18 1.34 0.26 dBm dBm V V -0.1/+0.1 -0.1/+0.1 0/0.5 0/0.5 36.4 39.9 -25.9 -23.7 334 92 29 dB dB dB dB mV/dB mV/dB dBm dBm mV mV mV Three-point calibration at -18 dBm, 0 dBm, and +10 dBm Three-point calibration at -10 dBm, 0 dBm, and +10 dBm RFIN pin = 10 dBm RFIN pin = -20 dBm Deviation from output at 25C -40C < TA < +85C, PIN = 10 dBm -40C < TA < +105C, PIN = 10 dBm -40C < TA < +85C, PIN = -15 dBm -40C < TA < +105C, PIN = -15 dBm PIN = -10 dBm to 0 dBm PIN = 0 dBm to 10 dBm PIN = -10dBm to 0 dBm PIN = 0 dBm to 10 dBm For threshold detection at 10 dBm For threshold detection at 0 dBm For threshold detection at -10 dBm Rev. B | Page 6 of 27 Data Sheet Parameter Threshold Variation vs. Temperature THRESHOLD DETECT OUTPUT Propagation Delay Output Voltage Low High RESET INTERFACE RST Input Voltage Low High RST Input Bias Current Reset Time COMPARATOR INTERFACE VIN- Input Range VIN- Input Bias Current VIN- for Comparator Disable VCAL INTERFACE VCAL Output Voltage POWER-DOWN INTERFACE Voltage Level to Enable Voltage Level to Disable Input Bias Current POWER SUPPLY INTERFACE Supply Voltage Quiescent Current Power-Down Current ADL5904 Test Conditions/Comments -40C < TA < +85C, PIN 10 dBm -40C < TA < +85C, PIN 0 dBm -40C < TA < +85C, PIN -10 dBm -40C < TA < +105C, PIN 10 dBm -40C < TA < +105C, PIN 0 dBm -40C < TA < +105C, PIN -10 dBm Q, Q, and RST pins, 900 MHz input frequency RFIN pin = off to 10 dBm, VIN- = 400 mV (5 dB overdrive) RFIN pin = off to -5 dBm, VIN- = 75 mV (5 dB overdrive) Q, Q IOL = 1 mA IOH = 1 mA RST pin Min Typ 0.2 Max 0.4 -0.6/+0.4 0.2 0.4 -0.6/+0.4 dB dB dB dB dB 12 12 ns ns 300 mV V 0.6 V V nA ns 3.0 2 20 15 RST at 50% to Q low and Q high Unit dB VIN- pin 0 to 1.5 -20 V A V 750 825 1.5 mV mV V VPOS VCAL pin RFIN pin = off RFIN pin = -10 dBm, 900 MHz RFIN pin = 10 dBm, 900 MHz ENBL pin 2 0 VENBL = 2.2 V VPOS pin VPOS 0.6 V V nA 3.45 V mA mA A <20 3.15 TA = 25C, no signal at RFIN TA = 105C, no signal at RFIN ENBL = low Rev. B | Page 7 of 27 3.3 3.5 4 100 ADL5904 Data Sheet ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Supply Voltage, VPOS Input Average RF Power1 Equivalent Voltage, Sine Wave Input Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 60 sec) 1 Thermal performance is directly linked to printed circuit board (PCB) design and operating environment. Careful attention to PCB thermal design is required. Rating 5.5 V 25 dBm 5.62 V peak 150C -40C to +105C -65C to +150C 300C Table 3. Thermal Resistance Package Type CP-16-22 1 Driven from a 50 source. Input ac-coupled with an external 82.5 shunt resistor. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. 1 JA1 80.05 JC2 4.4 Unit C/W Thermal impedance simulated value is based on no airflow with the exposed pad soldered to a 4-layer JEDEC board. Thermal impedance from junction to exposed pad on underside of package. ESD CAUTION Rev. B | Page 8 of 27 Data Sheet ADL5904 13 Q 14 ENBL 16 VIN- 15 RST PIN CONFIGURATION AND FUNCTION DESCRIPTIONS RFIN 1 12 Q DNC 2 ADL5904 VCAL 3 TOP VIEW (Not to Scale) 11 GND 10 VRMS 9 CRMS NOTES 1. DNC = DO NOT CONNECT. 2. EXPOSED PAD. CONNECT THE EXPOSED PAD TO A LOW IMPEDANCE THERMAL AND ELECTRICAL GROUND PLANE. 13838-002 DNC 8 VPOS 7 DNC 6 VPOS 5 DECL 4 Figure 2. Pin Configuration Table 4. Pin Function Descriptions Pin No. 1 Mnemonic RFIN 2, 6, 8 3 DNC VCAL 4 DECL 5, 7 VPOS 9 CRMS 10 VRMS 11 12, 13 GND Q, Q 14 15 ENBL RST 16 VIN- EPAD Description RF Input. The RFIN pin is dc-coupled and is not internally matched. A broadband 50 match is achieved using an external 82.5 shunt resistor with a 0.47 F ac coupling capacitor placed between the shunt resistor and the RF input. Smaller ac coupling capacitor values can be used if low frequency operation is not required. Do Not Connect. Do not connect to these pins. Threshold Calibration. The voltage on this pin determines the correct threshold voltage that must be applied to Pin 16 (VIN-) to set a particular RF power threshold. This process has two steps: first, measure the output voltage on VCAL with no RF signal applied to RFIN (this voltage is typically 750 mV). Next, apply the RF input power to RFIN, which causes the circuit to trip and again measure the voltage on the VCAL pin. The difference between these two voltages is equal to the threshold voltage that must be applied to VIN- during operation. Internal Decoupling. Bypass this pin to ground using a 4.02 resistor connected in series with a 100 nF capacitor. The supply voltage range = 3.3 V 10%. Place power supply decoupling capacitors on Pin 5. There is no requirement for power supply decoupling caps on Pin 7. RMS Averaging Capacitor. Connect a capacitor between the DECL pin and the CRMS pin to set the appropriate level of rms averaging. Set the value of the rms averaging capacitor based on the peak to average ratio and bandwidth of the input signal and based on the desired output response time and residual output noise. RMS Detector Output. The output from the VRMS pin is proportional to the logarithm of the rms value at the input level. Device Ground. Connect the GND pin to system ground using a low impedance path. Differential Digital Outputs of Threshold Detect Flip Flop. Q latches high when the output of the internal envelope detector exceeds the threshold voltage on the internal comparator VIN- input. Device Enable. Connect the ENBL pin to logic high to enable the device. Flip Flop Reset. Taking RST high clears the latched flip flop output, setting the Q and Q outputs to low and high, respectively. Inverting Input to the Threshold Detection Comparator. The voltage on this pin is compared to the output voltage of the internal envelope detector, which is driven by the RF input level. If the output voltage of the envelope detector exceeds the voltage on VIN-, the flip flop latches the Q output to high and the Q output to low. Exposed Pad. Connect the exposed pad to a low impedance thermal and electrical ground plane. Rev. B | Page 9 of 27 ADL5904 Data Sheet TYPICAL PERFORMANCE CHARACTERISTICS VPOS = 3.3 V, CRMS = 10 nF, Input levels referred to 50 source. Input RF signal is a sine wave (CW), unless otherwise indicated. 2.0 1.8 1.6 1.4 1.4 1.0 1.0 PIN = -10dBm 0.8 0.6 0.6 0.4 0.4 0.2 0.2 PIN = -20dBm 10 15 20 0 0 1 2 3 4 5 6 FREQUENCY (GHz) Figure 3. VRMS vs. Input Level (PIN) for Various Frequencies (30 MHz to 6 GHz) at 25C Figure 6. VRMS vs. Frequency for Four Input Levels (10 MHz to 6 GHz) 2.4 5 2.2 4 2.0 1.8 3 1.8 3 1.6 2 1.6 2 1.4 1 1.4 1 1.2 0 1.0 -1 0.8 0.6 2.0 VRMS (V) CW 16 QAM PEP = 6.38dB 64 QAM PEP = 7.03dB QPSK PEP = 4.02dB 2.2 ERROR (dB) 6 2.4 6 CW 16 QAM PEP = 6.38dB 64 QAM PEP = 7.03dB QPSK PEP = 4.02dB 5 4 1.2 0 1.0 -1 -2 0.8 -2 -3 0.6 -3 0.4 -4 0.4 -4 0.2 -5 0.2 -30 -25 -20 -15 -10 -5 0 5 10 PIN (dBm) Figure 4. VRMS and Error from CW Linear Reference vs. Input Level and Signal Modulation (QPSK, 16 QAM, 64 QAM), Frequency = 900 MHz, CRMS = 1 F (PEP Is Peak Envelope Power) 2.4 -5 0 -40 CALIBRATION AT -20dBm, 0dBm, AND +10dBm -35 -30 -25 -20 -15 -10 -5 0 5 -6 15 10 PIN (dBm) Figure 7. VRMS and Error from CW Linear Reference vs. Input Level and Signal Modulation (QPSK, 16 QAM, 64 QAM), Frequency = 2.14 GHz, CRMS = 1 F 2.4 5 2.2 2.0 4 2.0 4 1.8 3 1.8 3 1.6 2 1.6 2 1.4 1 1.4 1 1.2 0 1.2 0 1.0 -1 1.0 -1 0.8 -2 0.8 -2 0.6 -3 0.6 -3 0.4 -4 0.4 -4 0.2 -5 0.2 VRMS (V) ERROR (dB) 6 CW 4 CARRIER CDMA PEP = 12.03dB 1 CARRIER CDMA PEP = 10.56dB 2.2 -30 -25 -20 -15 -10 PIN (dBm) -5 0 5 10 13838-005 -35 -6 15 Figure 5. VRMS and Error from CW Linear Reference vs. Input Level and Signal Modulation (One-Carrier W-CDMA, Four-Carrier W-CDMA), Frequency = 2.14 GHz, CRMS = 1 F 0 -40 5 -5 CALIBRATION AT -20dBm, 0dBm, AND +10dBm 0 -40 6 CW LTE TM1 1-CARRIER 20MHz PEP = 11.58dB ERROR (dB) -35 -6 15 CALIBRATION AT -20 dBm, 0 dBm, AND +10dBm -35 -30 -25 -20 -15 -10 PIN (dBm) -5 0 5 10 15 -6 13838-008 CALIBRATION AT -20dBm, 0dBm, AND +10dBm 13838-004 0 -40 ERROR (dB) 5 13838-007 0 13838-003 -5 PIN (dBm) 13838-006 PIN = -30dBm 0 -40 -35 -30 -25 -20 -15 -10 V RMS (V) PIN = 0dBm 1.2 1.2 0.8 VRMS (V) PIN = +10dBm 1.6 VRMS (V) VRMS (V) 1.8 10MHz 30MHz 100MHz 900MHz 1900MHz 2600MHz 3500MHz 5800MHz Figure 8. VRMS and Error from CW Linear Reference vs. Input Level and Signal Modulation (LTE TM1 One-Carrier, 20 MHz), Frequency = 2.14 GHz, CRMS = 1 F Rev. B | Page 10 of 27 Data Sheet ADL5904 RF BURST ENABLE RF BURST ENABLE PIN = +10dBm PIN = +10dBm PIN = 0dBm PIN = 0dBm PIN = -10dBm PIN = -10dBm 2 250mV M 200s 2.5MS/s 400ns/pt A CH1 1.54V CH 2 Figure 9. Output Response to RF Burst Input, Carrier Frequency = 900 MHz, CRMS = 100 nF (see Figure 41 in the Test Circuits Section) 250mV M 40s 12.5MS/s 80ns/pt A CH1 13838-012 CH2 13838-009 2 1.54V Figure 12. Output Response to RF Burst Input, Carrier Frequency = 900 MHz, CRMS = 10 nF (see Figure 41 in the Test Circuits Section) 10 RF BURST ENABLE 5 INPUT RETURN LOSS (dB) NO EXTERNAL SHUNT 0 RESISTOR ON RFIN 1 P = +10dBm P P = 0dBm = -10dBm -5 -10 -15 WITH 82.5 SHUNT RESISTOR ON RFIN -20 -25 -30 2 8ns/pt A CH1 1.54V -40 FREQUENCY Figure 10. Output Response to Gating on ENBL Pin for Various RF Input Levels, Carrier Frequency = 900 MHz, CRMS = 100 nF 2.4 5 2.2 4 2.0 1.8 3 1.8 3 1.6 2 1.6 2 1.4 1 1.4 1 1.2 0 1.2 0 1.0 -1 1.0 -1 0.8 -2 0.8 -2 0.6 -3 0.6 -3 0.4 -4 0.4 -4 0.2 -5 0.2 -5 0 -40 -35 -30 -25 -20 -15 -10 -5 PIN (dBm) 0 5 10 15 20 -6 OUTPUT (V) Figure 11. VRMS and Log Conformance Error vs. Input Level (PIN) for Various Temperatures at 10 MHz 6 -40C +25C +85C +105C 0 -40 -35 -30 -25 -20 -15 -10 13838-011 2.0 VRMS (V) Figure 13. Input Return Loss vs. RF Frequency (With and Without External 82.5 Shunt Resistor) from 10 MHz to 6 GHz 6 -40C +25C +85C +105C 2.2 ERROR (dB) 2.4 13838-013 M 40s 125MS/s -5 PIN (dBm) 0 5 10 15 5 4 20 -6 ERROR (dB) 1V 500mV 13838-014 CH1 CH2 13838-010 -35 Figure 14. Distribution of Log Conformance Error with Respect to Calibration at 25C vs. Input Level (PIN) for Various Temperatures at 10 MHz Rev. B | Page 11 of 27 ADL5904 Data Sheet 2.4 2.0 1.6 2 1.4 1 1.2 0 1.0 -1 0.8 0.8 -2 0.6 0.6 -3 0.4 0.4 -4 0.2 0.2 -5 0 5 10 15 20 Figure 15. VRMS and Log Conformance Error vs. Input Level (PIN) for Various Temperatures at 30 MHz 2.4 -5 0 5 10 15 -6 20 PIN (dBm) Figure 18. Distribution of Log Conformance Error with Respect to Calibration at 25C vs. Input Level (PIN) for Various Temperatures at 30 MHz 2.2 4 2.0 1.8 3 1.8 3 1.6 2 1.6 2 1.4 1 1.4 1 1.2 0 1.2 0 1.0 -1 2.0 OUTPUT (V) 2.4 5 ERROR (dB) 6 -40C +25C +85C +105C 2.2 6 -40C +25C +85C +105C 5 4 1.0 -1 0.8 -2 0.8 -2 0.6 -3 0.6 -3 0.4 -4 0.4 -4 0.2 -5 0.2 -5 -5 0 5 10 15 20 -6 PIN (dBm) Figure 16. VRMS and Log Conformance Error vs. Input Level (PIN) for Various Temperatures at 100 MHz -5 0 5 10 15 -6 20 PIN (dBm) Figure 19. Distribution of Log Conformance Error with Respect to Calibration at 25C vs. Input Level (PIN) for Various Temperatures at 100 MHz 2.2 4 2.0 1.8 3 1.8 3 1.6 2 1.6 2 1.4 1 1.4 1 1.2 0 1.2 0 1.0 -1 1.0 -1 0.8 -2 0.8 -2 0.6 -3 0.6 -3 0.4 -4 0.4 -4 0.2 -5 0.2 -5 2.0 0 -40 -35 -30 -25 -20 -15 -10 -5 PIN (dBm) 0 5 10 15 -6 20 OUTPUT (V) 2.4 5 ERROR (dB) 6 -40C +25C +85C +105C 2.2 Figure 17. VRMS and Log Conformance Error vs. Input Level (PIN) for Various Temperatures at 900 MHz -40C +25C +85C +105C 0 -40 -35 -30 -25 -20 -15 -10 13838-017 2.4 0 -40 -35 -30 -25 -20 -15 -10 13838-016 0 -40 -35 -30 -25 -20 -15 -10 ERROR (dB) -5 0 -40 -35 -30 -25 -20 -15 -10 13838-019 1.0 -5 PIN (dBm) 0 5 10 15 6 5 4 -6 20 ERROR (dB) 1.2 13838-020 1.4 OUTPUT (V) ERROR (dB) 3 1.6 PIN (dBm) VRMS (V) 4 1.8 0 -40 -35 -30 -25 -20 -15 -10 VRMS (V) 5 1.8 13838-015 VRMS (V) 2.0 6 -40C +25C +85C +105C 2.2 ERROR (dB) -40C +25C +85C +105C 2.2 13838-018 2.4 Figure 20. Distribution of Log Conformance Error with Respect to Calibration at 25C vs. Input Level (PIN) for Various Temperatures at 900 MHz Rev. B | Page 12 of 27 Data Sheet ADL5904 2.2 4 2.0 1.8 3 1.8 3 1.6 2 1.6 2 1.4 1 1.4 1 1.2 0 1.2 0 1.0 -1 1.0 -1 0.8 -2 0.8 -2 0.6 -3 0.6 -3 0.4 -4 0.4 -4 0.2 -5 0.2 -5 15 PIN (dBm) Figure 21. VRMS and Log Conformance Error vs. Input Level (PIN) for Various Temperatures at 1.9 GHz 2.4 5 10 15 -6 20 PIN (dBm) 2.2 4 2.0 1.8 3 1.8 3 1.6 2 1.6 2 1.4 1 1.4 1 1.2 0 1.2 0 1.0 -1 1.0 -1 0.8 -2 0.8 -2 0.6 -3 0.6 -3 0.4 -4 0.4 -4 0.2 -5 0.2 -5 0 5 10 15 PIN (dBm) OUTPUT (V) Figure 22. VRMS and Log Conformance Error vs. Input Level (PIN) for Various Temperatures at 2.6 GHz 6 -40C +25C +85C +105C 0 -40 -35 -30 -25 -20 -15 -10 13838-022 -5 -6 20 ERROR (dB) 2.4 0 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 5 4 -6 20 PIN (dBm) Figure 25. Distribution of Log Conformance Error with Respect to Calibration at 25C vs. Input Level (PIN) for Various Temperatures at 2.6 GHz 2.2 4 2.0 1.8 3 1.8 3 1.6 2 1.6 2 1.4 1 1.4 1 1.2 0 1.2 0 1.0 -1 1.0 -1 0.8 -2 0.8 -2 0.6 -3 0.6 -3 0.4 -4 0.4 -4 0.2 -5 0.2 -5 0 -40 -35 -30 -25 -20 -15 -10 -5 PIN (dBm) 0 5 10 15 -6 20 Figure 23. VRMS and Log Conformance Error vs. Input Level (PIN) for Various Temperatures at 3.5 GHz 6 -40C +25C +85C +105C 0 -40 -35 -30 -25 -20 -15 -10 13838-023 2.0 OUTPUT (V) 2.4 5 -40C +25C +85C +105C 2.2 ERROR (dB) 6 2.4 ERROR (dB) Figure 24. Distribution of Log Conformance Error with Respect to Calibration at 25C vs. Input Level (PIN) for Various Temperatures at 1.9 GHz 5 2.0 VRMS (V) 0 6 -40C +25C +85C +105C 2.2 VRMS (V) -5 13838-024 10 ERROR (dB) 5 4 13838-025 0 0 -40 -35 -30 -25 -20 -15 -10 5 -5 PIN (dBm) 0 5 10 15 5 4 -6 20 ERROR (dB) -5 -6 20 6 -40C +25C +85C +105C 13838-026 0 -40 -35 -30 -25 -20 -15 -10 13838-021 VRMS (V) 2.0 OUTPUT (V) 2.4 5 -40C +25C +85C +105C 2.2 ERROR (dB) 6 2.4 Figure 26. Distribution of Log Conformance Error with Respect to Calibration at 25C vs. Input Level (PIN) for Various Temperatures at 3.5 GHz Rev. B | Page 13 of 27 Data Sheet 2.4 5 2.2 4 2.0 1.8 3 1.8 3 1.6 2 1.6 2 1.4 1 1.4 1 1.2 0 1.2 0 1.0 -1 1.0 -1 0.8 -2 0.8 -2 0.6 -3 0.6 -3 0.4 -4 0.4 -4 0.2 -5 0.2 -5 0 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 -6 20 15 PIN (dBm) 25 20 20 15 10 5 5 10 15 ERROR (dB) -6 20 15 10 1.50 1.55 1.60 1.65 1.70 1.75 1.80 0 13838-028 1.45 0.75 0.80 0.85 0.90 0.95 1.00 1.05 1.10 VRMS (V) Figure 28. Distribution of VRMS, PIN = 10 dBm, 900 MHz 13838-031 5 VRMS (V) Figure 31. Distribution of VRMS, PIN = -10 dBm, 900 MHz 14 18 16 12 14 10 FREQUENCY (Hits) FREQUENCY (Hits) 0 4 Figure 30. Distribution of Log Conformance Error with Respect to Calibration at 25C vs. Input Level (PIN) for Various Temperatures at 5.8 GHz 25 0 -5 5 PIN (dBm) FREQUENCY (Hits) FREQUENCY (Hits) Figure 27. VRMS and Log Conformance Error vs. Input Level (PIN) for Various Temperatures at 5.8 GHz 6 -40C +25C +85C +105C 0 -40 -35 -30 -25 -20 -15 -10 13838-027 VRMS (V) 2.0 OUTPUT (V) 6 -40C +25C +85C +105C ERROR (dB) 2.4 2.2 13838-030 ADL5904 8 6 4 12 10 8 6 4 2 34.5 35.0 35.5 36.0 36.5 37.0 SLOPE (mv/dB) 37.5 38.0 38.5 0 -37.0 -36.5 -36.0 -35.5 -35.0 -34.5 -34.0 -33.5 -33.0 -32.5 INTERCEPT (dBm) Figure 29. Distribution of Slope at 900 MHz, Intercept Calculated Using VRMS at 0 dBm and 10 dBm 13838-032 34.0 13838-029 2 0 Figure 32. Distribution of Intercept at 900 MHz, Slope Calculated Using VRMS at 0 dBm and 10 dBm Rev. B | Page 14 of 27 Data Sheet ADL5904 CH2 1.0V CH3 500mV M10ns 20GS/s T 20ps/pt A CH2 1.52V 2 13838-033 2 CH3 1.0V Figure 33. Q Output Response, PIN = Off to 6 dBm, VIN- (400 mV) Set to Trigger at 5 dBm (Overdrive Level = 1 dB) CH2 1.0V M10ns 20GS/s A CH2 1.52V 13838-036 3 3 Figure 36. Q Output Response, PIN = Off to 10 dBm, VIN- (400 mV) Set to Trigger at 5 dBm (Overdrive Level = 5 dB) 3 CH2 1.0V M10ns 20GS/s CH3 100mV T 20ps/pt A CH2 1.52V 2 13838-034 2 CH2 1.0V CH3 100mV Figure 34. Q Output Response, PIN = Off to -9 dBm, Overdrive Threshold Voltage Set to Trigger at -10 dBm (Overdrive Level = 1 dB, VIN- = 75 mV) M10ns 20GS/s A CH2 1.52V 13838-037 3 Figure 37. Q Output Response, PIN = Off to -5 dBm, Overdrive Threshold Voltage Set to Trigger at -10 dBm (Overdrive Level = 5 dB, VIN- = 75 mV) 3 2pF 0pF RST PULSE 1 Q 2 CH2 1.0V M10ns 20GS/s CH3 100mV T 50ps/pt A CH2 400mV 2 CH1 1.0V Figure 35. Q Output Response vs. Load Capacitance, PIN = Off to -10 dBm; Overdrive Threshold Voltage Set to Trigger at -11 dBm (Overdrive Level = 1 dB, VIN- = 65 mV) Rev. B | Page 15 of 27 CH2 1.0V M20ns 10GS/s A CH1 Figure 38. Response of Q Output to RST 1.36V 13838-038 100pF 13838-035 10pF ADL5904 VIN- (V) 1 25 0.01GHz 0.03GHz 0.1GHz 0.9GHz 1.9GHz 2.6GHz 3.6GHz 5.8GHz 20 SUPPLY CURRENT (mA) 10 Data Sheet 0.1 0.01 -40C +25C +85C +105C 15 10 -5 0 5 10 PIN (dBm) Figure 39. VIN- vs. PIN at Various Frequencies 15 20 0 -40 -35 -30 -25 -20 -15 -10 13838-039 0.001 -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 13838-040 5 Figure 40. Supply Current vs. Input Level (PIN) for Various Temperatures Rev. B | Page 16 of 27 Data Sheet ADL5904 TEST CIRCUITS RF OUT ADL5904 EVALUATION BOARD RFIN AGILENT 33522A FUNCTION/ARBITRATRY WAVEFORM GENERATOR RF OUT VRMS PULSE IN VPOS ROHDE & SCHWARZ SIGNAL GENERATOR SMR 40 ENBL HP E3631A POWER SUPPLY TEKTRONIX DIGITAL PHOSPHOR OSCILLOSCOPE TDS5104 VPOS AGILENT 33522A FUNCTION/ARBITRATRY WAVEFORM GENERATOR CH1 13838-041 CH2 Figure 41. Hardware Configuration for Output Response to RF Burst Input Measurements RFIN VRMS PULSE IN 1M TRIGGER CH1 ADL5904 EVALUATION BOARD CH2 HP E3631A POWER SUPPLY ENBL TEKTRONIX DIGITAL PHOSPHOR OSCILLOSCOPE TDS5104 1M TRIGGER 13838-042 ROHDE & SCHWARZ SIGNAL GENERATOR SMR 40 Figure 42. Hardware Configuration for Output Response to ENBL Pin Gating Measurements Rev. B | Page 17 of 27 ADL5904 Data Sheet THEORY OF OPERATION two capacitors with values equal or similar to those shown in the Figure 44. Place these capacitors as close to Pin 5 as possible. Connect Pin 11 (GND) and the exposed pad to a ground plane with low electrical and thermal impedance. The ADL5904 is a true rms detector with a 45 dB measurement range at 1.9 GHz with useable range up to 6 GHz. It features no error ripple over its range, low temperature drift, and very low power consumption. Temperature stability of the rms output measurements provides 0.5 dB error (typical) over the temperature range of -40C to +85C at up to 3.5 GHz. The measurement output voltage scales linearly in decibels with a slope of typically 36.9 mV/dB at 1.9 GHz. A single-ended input at the RFIN pin drives the ADL5904. Because the input is dc-coupled, an external ac coupling capacitor must be used. A 470 nF capacitor is recommended for applications that require frequency coverage from 6 GHz down to tens of kilohertz. For applications that do not need such low frequency coverage, a larger value of capacitance can be used. The core rms processing of the ADL5904 uses a proprietary multistage technique that provides accuracy for complex modulation signals irrespective of the crest factor of the input signal. An integrating filter capacitor at the CRMS pin performs the square domain averaging. 5 4 7 VIN- RST 16 15 The rms measurement voltage is available on the VRMS pin. Place a 10 nF load capacitor on this pin. ADL5904 - R Q 12 Q S Q 13 Q The DECL pin provides a bypass capacitor connection for an on-chip regulator. The DECL pin is connected to ground with a 4.02 resistor and a 0.1 F capacitor. The CRMS pin is the averaging node for the rms computation. Place an rms averaging capacitor between the CRMS and DECL pins. For information on choosing the CRMS capacitor, see the Choosing a Value for CRMS section. Using smaller values for CRMS allows quicker response times to a pulsed waveform. Higher values of CRMS are required for correct rms computation as the peak to average ratio of modulated signals increases and the bandwidth of the modulated signals decreases. + ENVELOPE DETECTOR 1 RMS 10 11 3 9 4 GND VCAL CRMS DECL 2 6 VRMS 13838-044 RFIN 8 DNC Figure 43. Functional Block Diagram The output of the first signal processing stage (the envelope detector), also drives the noninverting input of a threshold detecting comparator. The inverting input of this comparator is typically driven by a fixed external dc voltage. When the output of the envelope detector exceeds the voltage on the inverting input of the comparator, the comparator goes high. This excursion is then captured and held by an SR flip flop. The state of this flip flop is then held until the level sensitive RST pin is taken high. If the threshold detection circuitry is not used, the VIN- pin can be tied to VPOS or left open (this pin has an internal pull-up to VPOS). The ENBL pin configures the device enable interface. Connecting the ENBL pin to a logic high signal (2 V to 3.3 V) enables the device, and connecting the pin to a logic low signal (0 V to 0.6 V) disables the device. The exposed pad is internally connected to GND and must be soldered to a low impedance ground plane. BASIC CONNECTIONS FOR RMS MEASUREMENT The ADL5904 requires a single supply of 3.3 V. The supply is connected to the VPOS supply pins. Decouple these pins using VPOS 3.3V 100pF 0.1F ENABLE/ DISABLE ENBL RST VIN- VPOS 5 14 7 16 15 ADL5904 - R Q 12 Q S Q 13 Q + 470nF RFIN RFIN ENVELOPE DETECTOR 1 RMS 10 82.5 VRMS VRMS 10nF 11 GND 3 4 9 VCAL CRMS 100nF DECL 2 6 8 DNC 4.02 100nF Figure 44. Basic Connections for RMS Power Measurement Rev. B | Page 18 of 27 13838-045 VPOS ENBL In addition to the ac-coupling capacitor, an external 82.5 shunt resistor is required to provide a wideband input match. Figure 13 shows a comparison of the input return loss, with and without the external shunt resistor. Data Sheet ADL5904 Figure 45 and Figure 46 show how output noise varies with CRMS when the ADL5904 is driven by a single-carrier W-CDMA (Test Model TM1-64, peak envelope power = 10.6 dB, bandwidth = 3.84 MHz) and by an LTE signal (Test Model TM1-20, peak envelope power = 11.58 dB, bandwidth = 20 MHz), respectively. Figure 45 and Figure 46 also show how the value of CRMS affects the response time. This response time is measured by applying an RF burst at 2.14 GHz at 0 dBm to the ADL5904. The 10% to 90% rise time and 90% to 10% fall time are then measured. 600 RISE/FALL TIMES (s) 1k 400 100 300 10 200 1.0 100 0.1 0.1 1 10 100 0 1000 CRMS CAPACITANCE (nF) 1k 500 100 400 10 300 1.0 200 0.1 100 0 0.1 1 10 100 0 1000 CRMS CAPACITANCE (nF) Figure 46. Output Noise, Rise and Fall Times vs. CRMS Capacitance, Single-Carrier LTE (Test Model TM1-20) at 900 MHz with PIN = 0 dBm Table 5 shows the recommended minimum values of CRMS for various modulation schemes. Table 5 also shows the output rise and fall times and noise performance. Using lower capacitor values results in faster response times but can result in degraded rms measurement accuracy. If the output noise shown in Table 5 is unacceptably high, it can be reduced by increasing CRMS or by implementing an averaging algorithm after the output voltage of the ADL5904 is sampled by an analog-to-digital converter (ADC). The values in Table 5 were experimentally determined to be the minimum capacitance that ensures good rms accuracy for that particular signal type. This test was initially performed with a large capacitance value on the CRMS pin (for example, 10 F). The value of VRMS was noted for a fixed input level (for example, -10 dBm). The value of CRMS was then progressively reduced (this can be accomplished with press-down capacitors) until the value of VRMS started to deviate from its original value (this indicates that the accuracy of the rms computation is degrading and that CRMS is becoming too small). 500 OUTPUT NOISE (mV p-p) 10% TO 90% RISE TIME (s) 90% TO 10% FALL TIME (s) OUTPUT NOISE (mV p-p) 13838-046 100k 600 OUTPUT NOISE (mV p-p) In applications where the response time is not critical, place a relatively large capacitor on the CRMS pin. In Figure 44, a value of 100 nF is used. For most signal modulation schemes, this value ensures excellent rms measurement accuracy and low residual output noise. There is no maximum capacitance limit for CRMS. 10% TO 90% RISE TIME (s) 90% TO 10% FALL TIME (s) OUTPUT NOISE (mV p-p) 10k RISE/FALL TIMES (s) CRMS provides the averaging function for the internal rms computation. Using the minimum value for CRMS allows the quickest response time to a pulsed waveform, but leaves significant output noise on the output voltage signal. However, a large filter capacitor reduces output noise and improves the rms measurement accuracy but at the expense of the response time. 10k 700 100k 13838-047 CHOOSING A VALUE FOR CRMS Figure 45. Output Noise, Rise and Fall Times vs. CRMS Capacitance, Single-Carrier W-CDMA (Test Model TM1-64) at 900 MHz with PIN = 0 dBm In general, the minimum CRMS value required increases as the peak to average ratio of the carrier increases. The minimum required CRMS also tends to increase as the bandwidth of the carrier decreases. With narrow-band carriers, the noise spectrum of the VRMS output tends to have a correspondingly narrow profile. The relatively narrow spectral profile requires a larger value of CRMS that reduces the low-pass corner frequency of the averaging function and ensures a valid rms computation. Table 5. Recommended Minimum CRMS Values for Various Modulation Schemes QPSK, 5 MSPS (SQR COS) Filter, = 0.35) Peak Envelope Power Ratio Ratio (dB) 3.3 Carrier Bandwidth (MHz) 5 CRMSMIN (nF) 10 Output Noise (mV p-p) 42 Rise/Fall Times (s) 4/25 QPSK ,15 MSPS (SQR COS Filter, = 0.35) 64 QAM, 1 MSPS (SQR COS Filter, = 0.35) 64 QAM, 5 MSPS (SQR COS Filter, = 0.35) 3.3 7.4 7.4 15 1 5 1 100 100 38 64 54 0.5/6 35/276 35/276 64 QAM, 13 MSPS (SQR COS Filter, = 0.35) W-CDMA, One-Carrier, TM1-64 W-CDMA Four-Carrier, TM1-64, TM1-32, TM1-16, TM1-8 LTE, TM1, One-Carrier, 20 MHz (2048 QPSK Subcarriers) 7.4 10.6 15.96 11.58 13 3.84 18.84 20 10 100 100 100 56 92 98 80 4/25 35/276 35/276 35/276 Modulation/Standard Rev. B | Page 19 of 27 ADL5904 Data Sheet 5 2.0 4 1.8 3 1.6 2 1.4 1 0 1.2 1.0 -1 0.8 -2 VOUT +25C VOUT -40C VOUT +85C ERROR +25C ERROR -40C ERROR +85C 0.4 0.2 0 -40 -30 -20 -10 0 10 6 2.2 5 2.0 4 1.8 3 1.6 2 1.4 1 1.2 0 1.0 -1 -3 VRMS (V) 0.6 2.4 -4 -5 -6 20 PIN (dBm) (1) where: Slope is the change in output voltage divided by the change in input level (unit is mV/dB). PIN is the input level (unit is dBm). Intercept is the calculated input level at which the output voltage is equal to 0 V (note that Intercept is an extrapolated theoretical value and not a measured value). Intercept has a unit of dBm. In general, calibration is performed during equipment manufacture by applying two or more known signal levels to the input of the ADL5904 and measuring the corresponding output voltages. The calibration points must be within the linear operating range of the device. With a two-point calibration, calculate the slope and intercept as follows: Slope = (VRMS1 - VRMS2)/(PIN1 - PIN2) (2) Intercept = PIN1 - (VRMS1/Slope) (3) After the slope and intercept are calculated (and stored in some form), use the following equation to calculate an unknown input level based on the output voltage of the detector: PIN (Unknown) = (VRMS (MEASURED)/Slope) + Intercept VOUT +25C VOUT -40C VOUT +85C ERROR +25C ERROR -40C ERROR +85C 0.6 Calibration must be performed to achieve high accuracy because the output voltage for a particular input level varies from device to device. For a two-point calibration, the equation for the idealized output voltage is VRMS (IDEAL) = Slope x (PIN - Intercept) -2 0.8 Figure 47. VRMS and Log Conformance Error at 900 MHz, -40C, +25C, and +85C with Log Conformance Error Calculated Based on Two-Point Calibration at -20 dBm and +10 dBm 0.4 0.2 0 -40 ERROR (dB) 6 2.2 (5) Use multipoint calibration to extend the measurement dynamic range further. In this case, the transfer function is segmented, with each segment having its own slope and intercept. Figure 48 shows the error plot of the same device with calibration points at -20 dBm, 0 dBm, and +10 dBm. The three-point calibration results in tighter log conformance and a slight extension of the linear operating range of the device. ERROR (dB) 2.4 Error (dB) = (VRMS (MEASURED) - VRMS(IDEAL))/Slope 13838-048 VRMS (V) The measured transfer function of the ADL5904 at 900 MHz is shown in Figure 47, which contains plots of both output voltage and log conformance error vs. input level for one device. As the input level varies from -30 dBm to +15 dBm, the output voltage varies from 200 mV to approximately 1.7 V. The log conformance error is the difference between this straight line and the actual performance of the detector. -30 -20 -10 PIN (dBm) 0 10 -3 -4 -5 20 -6 13838-049 VRMS CALIBRATION AND ERROR CALCULATION Figure 48. VRMS and Log Conformance Error at 900 MHz, -40C, +25C, and +85C with Log Conformance Error Calculated Based on Three-Point Calibration at -20 dBm, 0 dBm, and +10 dBm Where three-point calibration is used, two values of slope and two values of intercept must be calculated and stored during calibration. In addition, the transition point between the two calibration regions must be recorded so that the system knows which slope/intercept pair to use. In a typical system, the output of the ADL5904 is sampled by a precision ADC. For the example in Figure 48 (calibration points at -20 dBm, 0 dBm, and +10 dBm), the ADC output code for an input power of 0 dBm is stored with the calculated slopes and intercept. When the system is in operation in the field, the code from the ADC is compared to this stored code to determine whether to use the upper or lower slope/intercept pair. The calibration scheme for ADL5904 can be extended beyond three points. This technique can be used, for example, to linearize the response for input powers below -30 dBm. This effort, however, is less beneficial if the device is to be used over a wide temperature range. The multidevice plots (see Figure 15, Figure 19 to Figure 21, Figure 25 to Figure 27, and Figure 31) show how temperature stability becomes less predictable at low input power level. (4) Rev. B | Page 20 of 27 Data Sheet ADL5904 BASIC CONNECTIONS FOR THRESHOLD DETECTION THRESHOLD VOLTAGE INPUT VPOS 3.3V 100pF 0.1F ENABLE/ DISABLE RESET INPUT ENBL VPOS 5 14 RST VIN- 7 15 16 ADL5904 - R Q 12 S Q 13 Q Q Q Q + 470nF RFIN RFIN ENVELOPE DETECTOR 1 RMS 10 VRMS 82.5 3 11 GND VCAL 9 CRMS 4 DECL 2 6 8 DNC 13838-050 4.02 100nF CALIBRATION VOLTAGE OUTPUT Figure 49. Basic Connections for Threshold Detection Figure 49 shows the basic connections for operating the ADL5904 in threshold detection mode. A threshold voltage is applied to the VIN- input that corresponds to the RF power level at which the circuit trips. When the level on RFIN drives the envelope detector to an output voltage that exceeds the programmed threshold, the comparator output goes high causing the Q output to latch high and the Q output to latch low. The levels on Q and Q can be reset by setting the RST pin high (note that the RST function is level triggered, not edge triggered). Q and Q are held at low and high states respectively as long as RST is high, even if the RF input level is exceeding the programmed threshold voltage. RST must be taken low for the threshold detection circuit to reactivate. The response time of the Q and Q outputs is somewhat dependent on the level of overdrive with higher overdrive levels, giving a slightly faster response time. Figure 51 shows the response of the Q output when the RF input level overdrives the threshold by 5 dB, which reduces the response time to approximately 12 ns. Overdrive levels beyond 5 dB tend not to reduce the response time below this level. Capacitive loading on Q and Q also affects the response time, as shown in Figure 35. 3 Q AND Q RESPONSE TIME 2 CH2 1.0V CH3 200mV 3 M10ns 20GS/s A CH2 400mV 13838-052 Figure 50 shows the response of the Q output when the input power exceeds the programmed threshold by approximately 1 dB. The response time from the input power exceeding the threshold to the Q output reaching 50% of its final value is approximately 12 ns Figure 51. Q Output Response, PIN = Off to -5 dBm, Overdrive Threshold Voltage Set to Trigger at -10 dBm (Overdrive Level = 5 dB, VIN- = 75 mV) Figure 52 shows the response of the Q output, which goes low when the input threshold is exceeded. As shown in Figure 52, the response time of Q is equal to that of the Q output. CH2 1.0V CH3 100mV M10ns 20GS/s A CH2 1.52V 13838-051 2 Figure 50. Q Output Response at 900 MHz, PIN = Off to -9 dBm, Overdrive Threshold Voltage Set to Trigger at -10 dBm (Overdrive Level = 1 dB) Rev. B | Page 21 of 27 ADL5904 Data Sheet To set the threshold detect level more precisely, there are two calibration options. A single-point calibration is easily accomplished by applying the threshold trip power level and then adjusting VIN- until Q trips high. Initially, set VIN- to a high level such as 2 V, and then assert RST high and back to low to ensure that Q is low. Next, apply the RF input threshold power level to RFIN. Then, reduce the voltage on VIN- until the Q output goes high. Use this resulting voltage to set the threshold level when the equipment is in operation. 3 Alternatively, by measuring the voltage on the VCAL output pin with and without RF power applied, an equation can be derived that establishes a precise relationship between the VIN- voltage and the associated RF input power trip point. CH2 1.0V CH3 100mV M10ns 20GS/s A CH2 1.36V 13838-053 2 Figure 52. Q Output Response, PIN = Off to -7 dBm, Overdrive Threshold Voltage Set to Trigger at -10 dBm (Overdrive Level = 3 dB) SETTING THE VIN- THRESHOLD DETECTION VOLTAGE VCAL - VCALOFF = Slope x (VRFIN - Intercept) Figure 53 shows the typical relationship between the voltage on the VIN- pin and the resulting RF power threshold that causes Q and Q to latch high and low, respectively. This data is also presented in Table 6. 10 VIN- (V) 1 Within the linear operating range of the ADL5904, there is a linear relationship between VCAL - VCALOFF and the input voltage on RFIN. 0.01GHz 0.03GHz 0.1GHz 0.9GHz 1.9GHz 2.6GHz 3.6GHz 5.8GHz where: VCAL is the measured output voltage on the VCAL pin. VCALOFF is the measured output voltage on the VCAL pin with no RF input signal applied. VRFIN is the RF input power (in dBm) converted into volts rms, that is, VRFIN 0.1 (6) P R x log -1 IN 10 = 10 3 (8) where: R is the characteristic impedance (usually 50 ). PIN is the input power in dBm. 0.01 Rewriting the equation results in VCAL - VCALOFF = -5 0 5 10 15 20 PIN (dBm) R x log -1 PIN 10 Slope x - Intercept 3 10 13838-054 0.001 -40 -35 -30 -25 -20 -15 -10 Figure 53. VIN- Threshold Voltage vs. PIN at Various Frequencies Use Figure 53 and Table 6 to set the threshold voltage on the VIN- pin. However, because the relationship between the threshold voltage on VIN- and the resulting RF threshold power varies from device to device, there is an error level of up to 2.5 dB. For example, if the voltage on VIN- is set to cause the circuit to trip when the input power exceeds 0 dBm at 900 MHz (VIN- = 241 mV from Table 6), the trip point can vary from device to device by 2.5 dB at frequencies at or above 100 MHz and +2.5 dB to -5.5 dB for frequencies below 100 MHz. In Table 6, no recommended voltages are provided for input power levels below -25 dBm from 10 MHz to 3.5 GHz and below -20 dBm at 5.8 GHz. This is as a result of the increased temperature drift at these input power levels. Likewise, from 10 MHz to 3.5 GHz, no recommended voltages are provided for input power levels above 13 dBm because, at this power level, the response of the ADL5904 starts to become more nonlinear. (9) The voltage that must be applied to the VIN- pin for a particular input power is equal to (VCAL - VCALOFF). Therefore, Equation 9 can be rewritten as Rev. B | Page 22 of 27 R x log -1 PIN 10 VIN - = Slope x - Intercept 3 10 (10) Data Sheet ADL5904 Table 6. Recommended Typical Values for Threshold Voltage (VIN-) When Operating Uncalibrated 1 Input Threshold Power (dBm) -25.0 -24.0 -23.0 -22.0 -21.0 -20.0 -19.0 -18.0 -17.0 -16.0 -15.0 -14.0 -13.0 -12.0 -11.0 -10.0 -9.0 -8.0 -7.0 -6.0 -5.0 -4.0 -3.0 -2.0 -1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 11.0 12.0 13.0 14.0 15.0 1 10 MHz 18 19 21 23 25 28 31 34 37 41 47 52 58 64 71 80 88 98 110 123 137 154 172 193 214 240 269 300 336 376 421 472 529 592 664 743 858 939 1078 N/A N/A 30 MHz 18 19 21 23 25 28 31 34 38 42 47 52 58 64 72 80 89 99 111 123 137 153 172 192 214 238 266 298 334 374 419 466 522 585 652 723 844 957 1072 N/A N/A 100 MHz 18 20 22 24 26 29 32 35 39 43 48 53 59 66 73 81 90 101 112 125 139 155 173 193 216 239 268 300 336 377 421 471 528 591 663 742 830 927 1005 N/A N/A Threshold Voltage (mV) 900 MHz 1900 MHz 17 16 18 17 20 19 22 21 25 23 27 26 31 29 34 32 38 36 42 40 47 45 52 50 58 56 65 62 72 70 81 78 90 87 101 97 112 109 125 122 139 136 155 153 173 171 193 192 216 215 241 241 272 270 304 303 340 341 380 383 425 431 477 485 534 543 598 611 670 688 752 774 842 871 942 976 1047 1066 N/A N/A N/A N/A N/A means not applicable Rev. B | Page 23 of 27 2600 MHz 17 18 20 22 24 26 29 32 35 39 44 49 54 60 68 76 84 94 105 118 132 148 167 186 210 236 266 298 337 380 425 481 544 610 690 775 875 982 1061 N/A N/A 3500 MHz 12 13 14 15 17 19 21 23 25 28 31 35 39 44 49 55 61 69 77 87 98 110 124 140 158 177 200 226 255 289 327 370 419 474 537 608 684 774 876 N/A N/A 5800 MHz N/A N/A N/A N/A N/A 11 12 13 14 16 17 19 21 23 26 29 32 36 40 45 51 57 64 73 81 92 104 119 135 153 175 199 225 257 293 334 381 434 495 564 642 ADL5904 Data Sheet Use a two-point or a three-point calibration to establish the slope and intercept values in Equation 10. The procedure for a two-point calibration is as follows: 1. 2. 3. 4. With no RF input signal applied, measure the voltage on the VCAL pin (VCALOFF). Apply an RF input power that is towards the bottom end of the RF input range (RFINLOW). Calculate the associated rms input voltage (VRMSLOW) and measure the voltage on the VCAL pin (VCALLOW). Apply an RF input power that is towards the top end of the RF input range (RFINHIGH). Calculate the associated rms input voltage (VRMSHIGH) and measure the voltage on the VCAL pin (VCALHIGH) pin. Calculate SLOPE using the following equation: 5. Calculate intercept using the following equation: Intercept = VRFIN - (VCAL - VCALOFF)/Slope When the slope and intercept are known, nsert them into the equation for VIN-. VIN - R x log -1 PTHRESHOLD 10 - Intercept (11) = Slope x 3 10 where PTHRESHOLD is the desired RF power level at which the circuit trips. Slope = (VCALHIGH - VCALLOW)/(VRMSHIGH - VRMSLOW) Rev. B | Page 24 of 27 Data Sheet ADL5904 APPLICATIONS INFORMATION To operate the threshold detection circuitry, apply the RF signal that is being monitored again to the RFIN SMA connector. Apply the dc threshold voltage that causes the circuit to trip to the VIN_N SMA connector or to the TPVIN_N yellow test point. Reset the internal SR flip flop by pressing the RST button. EVALUATION BOARD SCHEMATIC AND CONFIGURATION OPTIONS The ADL5904-EVALZ is a fully populated, 4-layer, FR4based evaluation board. Apply a power supply of 3.3 V to the VPOS and GND test loops. To exercise the RMS detector portion of the circuit, apply the RF signal to be measured to the RFIN SMA connector. The corresponding rms output voltage is then available on the VRMS SMA connector and on the TP1 test point. S1 09-03-201-02 3 1 2 R31 VPOS Detailed configuration options for the evaluation board are listed in Table 7. 10k 1 ENBL YEL AGND1 VPOS R28 1 2 1.1k 3 4 RST C1 DNI TBD0603 B3S1000 R4 10k AGND1 TPVIN_N YEL 1 AGND1 0 C5 C4 R3 TBD0402 DNI L1 TBD0402 DNI AGND1 TBD0402 R1 DNI TBD0402 DNI L2 TBD0402 DNI AGND1 TBD0402 DNI 0.47F R8 82.5 R10 0 ENBL DECL VIN- RFIN CRMS RST VCAL AGND1 TCAL YEL DUT1 12 Q 13 QBAR 10 VRMS C12 0.1F DECL QX C7 0.1F 1 2 AGND1 AGND1 AGND1 ADL5904ACPZN R19 0 C15 TBD0603 DNI Q 5 4 3 2 JOHNSON142-0701-851 AGND1 AGND1 QX 1 2 AGND1 R21 Q 0 C16 TBD0603 DNI 1 C3 0.1F 826936-2 1 Q 5 4 3 2 JOHNSON142-0701-851 AGND1 TP1 YEL R16 0 1 GND BLK C14 10nF AGND1 AGND1 Figure 54. Evaluation Board Schematic Rev. B | Page 25 of 27 1 AGND1 R6 4.02 AGND1 826936-2 Q 1 VRMS 5 4 3 2 JOHNSON142-0701-851 AGND1 13838-060 0 C2 14 4 16 1 9 15 3 2 DNC 6 DNC 8 DNC 11 GND PAD EPAD R9 1 JOHNSON142-0701-851 2 3 4 5 AGND1 R2 VPOS 5 AGND1 C6 100pF C17 0.1F DNI AGND1 7 JOHNSON142-0701-851 2 3 4 5 RFIN VPOS RED VPOS 1 VPOS VIN_N 1 ADL5904 Data Sheet Table 7. Evaluation Board Configuration Options Component RFIN, R1, R2, R3, R8, R9, R10, L1, L2, C2, C4, C5 Function RF input VCAL, VIN_N, TPVIN_N, C17, VCAL threshold calibration R6, C3 DECL internal decoupling node Power supply interface VPOS, GND, C7, C6 VRMS, TP1, R16, C14 C12 Output interface RMS averaging capacitor Q, Q, QX, QX, R19, R21, C15, C16 Threshold detect output (Q and Q) ENBL, S1, R31 Enable interface RST push-button switch, R4, C1, R28 Threshold detect reset VIN_N, TPVIN_N, C17 Threshold detect level set Notes Apply the RF input signal to the ADL5904 to the SMA connector labeled RFIN. The ADL5904 RFIN pin (Pin 1) is dc-coupled and is not internally matched. A broadband 50 match is achieved using an external 82.5 shunt resistor with a 0.47 F ac coupling capacitor placed between the shunt resistor and the RF input. An external preemphasis network can be built to improve flatness vs. frequency using the components between R8 and the RFIN SMA connector. The output voltage from the threshold calibration pin (VCAL, Pin 3) is available on the yellow VCAL clip lead. Use the voltage on this pin to determine the correct threshold voltage that must be applied to Pin 16 (VIN-) to set a particular RF power threshold. This process includes two steps: first, measure the output voltage on the VCAL yellow clip lead with no RF signal applied to RFIN (this voltage is approximately 750 mV). Next, apply the RF input power to RFIN, which causes the circuit to trip, and again measure the voltage on the VCAL yellow clip lead. The difference between these two voltages is equal to the voltage that must be applied to VIN- during operation. This voltage can be applied either to the VIN_N SMA connector or to the TPVIN_N yellow clip lead. Use C17 to provide noise decoupling of the applied input voltage. A resistor in series with a capacitor to ground must be connected to the DECL pin (Pin 4). Apply the 3.3 V power supply for the evaluation board to the VPOS (red) and GND (black) test loops. The nominal supply decoupling consists of a 100 pF capacitor and a 0.1 F capacitor, with the 100 pF capacitor placed closest to the VPOS pin (Pin 5). The rms output voltage is available on the VRMS SMA connector or on the TP1 yellow clip lead. Set the value of the rms averaging capacitor based on the peak to average ratio and bandwidth of the input signal and based on the desired output response time and residual output noise. The threshold detect flip flop outputs (Q and Q) are available on the SMA connectors labeled Q and Q and on the 2-pin headers labeled QX and QX. To test the response time of Q and Q, remove R19 and R21 and probe QX and QX with low capacitance FET probes. The ADL5904 can be enabled by applying 3.3 V to the ENBL SMA connector or using the S1 switch. The enable voltage must be equal to but not greater than the 3.3 V supply voltage. The threshold detect flip-flop is reset using the RST push-button switch. The RST switch is connected the VPOS supply voltage through a 1.1 k resistor (R28). A 100 k pull-down resistor (R4) is connected to the RST pin, which pulls RST low in the absence of any other stimulus. The ADL5904 normally powers up with the Q and Q outputs high and low, respectively. A reset on the power-up circuit can be implemented by installing a capacitor on C1. When the VPOS supply turns on, RST goes high momentarily before being pulled low by R4. The voltage applied to the VIN_N SMA connector or to the TPVIN_N yellow test loop drives the inverting input of the threshold detect comparator (VIN-) and thereby defines the RF power level that trips the threshold detect comparator and flip flop. The threshold detect voltage can be optionally decoupled using C17. Rev. B | Page 26 of 27 Default Values C4= 0.47uF (0402) R8 = 82.5 (0402) R2, R9, R10 = 0 (0402) R1, R3 = open (0402) L1, L2 = open (0402) C2, C5 = open (0402) C17 = open (0603) C3 = 100 nF (0402) R6 = 4.02 (0402) C7 = 0.1 F (0402), C6 = 100 pF (0402) VPOS = 3.3 V R16 = 0 (0402) C14 = 10 nF (0603) C12 = 0.1 F (0402) C15 = C16 = open (0603) R19, R21 = 0 (0603) R31 = 10 k (0603) R4 = 10 k (0603) R28 = 1.1 k (0603) C1 = open (0603) C17 = open (0603) Data Sheet ADL5904 OUTLINE DIMENSIONS DETAIL A (JEDEC 95) 0.30 0.23 0.18 0.50 BSC 13 PIN 1 INDICATOR AREA OPTIONS 16 (SEE DETAIL A) 12 1 1.75 1.60 SQ 1.45 EXPOSED PAD 9 TOP VIEW 0.80 0.75 0.70 TOP VIEW PKG-005138 SEATING PLANE 0.50 0.40 0.30 4 8 5 BOTTOM VIEW 0.05 MAX 0.02 NOM COPLANARITY 0.08 0.20 REF 0.20 MIN FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. COMPLIANT TO JEDEC STANDARDS MO-220-WEED-6. 02-23-2017-E PIN 1 INDICATOR 3.10 3.00 SQ 2.90 Figure 55. 16-Lead Lead Frame Chip Scale Package [LFCSP] 3 mm x 3 mm Body and 0.75 mm Package Height (CP-16-22) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADL5904ACPZN-R7 ADL5904-EVALZ 1 Temperature Range -40C to +105C Package Description 16-Lead LFCSP, 7'' Tape and Reel Evaluation Board Z = RoHS Compliant Part. (c)2016-2017 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13838-0-7/17(B) Rev. B | Page 27 of 27 Package Option CP-16-22 Branding Q24 Ordering Quantity 3000