Ma rch 2003 1/17
®
VNQ05XSP16
QUAD CHAN NEL HIGH SIDE SOLID STAT E RELA Y
■ OUTPUT CURRENT (CONTINUOUS): 5A
■ CMOS COMPATIBLE INPUTS
■ MULTIPLEXED PROPORTIONAL LOAD
CURRENT SENSE
■ UNDERVOLTAGE & OVERVOLTAGE
SHU T- DOWN
■ OVERVOLTAGE CLAMP
■ THERMAL SHUT DOWN
■ CURRENT LIMITATI ON
■ VE RY LOW STAND-BY POWER DISSIPATION
■ PROTECTION AGAINST:
n LOSS OF GROUND & LOSS OF VCC
■ REVERSE BATTERY PROTECTION (**)
DESCRIPTION
The VNQ05XSP16 is a monolithic device
designed in STMicroelectronics VIPower M0-3
Technology. It is intended for driving any type of
multipl e loads w ith one side connec ted to grou nd.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table). This device has four
independent channels and one multiplexed analog
sense output which deliver a current proportional
to the selected output current. SenseEnable pin
allows to connect any number of VNQ05XSP16 on
the same Current Sense line. Active current
limitation combined with thermal shut-down and
automatic restart protect the device against
overload. Device automatically turns off in case of
ground pin disconnection.
TYPE RON(*) IOUT VCC
VNQ05XSP16 110mΩ5A (*) 36 V
ABSOLUTE MAXIMUM RATING
(** ) Se e application s c hematic at page 9
Symbol Parameter Value Unit
VCC Supply voltage (continuous) 41 V
-VCC Reverse supply voltage (continuous) -0.3 V
IOUT Output current (continuous), for each channel Internally limited A
IR R everse output current (continuous), for each cha nnel -5 A
IIN Input current (IN1,IN2,IN3,IN4,SELA,SELB,SENSENABLE) +/- 10 mA
VCSENSE C ur rent se nse max imum vo ltage -3
+15 V
V
IGND Ground current at Tcase<25°C (continuous) -200 mA
VESD
Electros tatic Discharge (Human Body Mo del: R=1.5Ω; C= 100pF )
- INPUT
- CURRENT SENSE
- OUTPU T
- V CC
4000
2000
5000
5000
V
V
V
V
Ptot Power dissipation at Tcase=25°C 78 W
EMAX Maxim um Swi tching Energy
(L=1.72mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=7.5A) 76 mJ
TjJunction operating temperature Internally limited °C
TcCase Operating Temperature - 40 to 150 °C
TSTG Storage temperature -55 to 150 °C
ORDER CODES
PACKAGE TUBE T&R
PowerSO-16™VNQ05XSP16 VNQ05XSP1613TR
PowerSO-16TM
(*) Per each channel
2/17
VNQ05XSP16
BLOCK DIAGRAM
LOGIC
UNDERVOLTAGE
OVERVOLTAGE
OVERTEMP. 1
OVERTEMP. 2
INP UT 1
GND
VCC
OUTPUT 1
QUAD
ILI M 1
KIOUT1
Ot1
INP UT 2
INP UT 3
INP UT 4
ANALOG
Mux
OVERTEMP. 3
OVERTEMP. 4
CS1
CS2
CS3
CS4
CURRENT SENSE
DIAG
LOGIC
SELECT A
SELECT B
SEN SE ENABLE
DRIVER 1
CS1
DEMAG 1
OUTPUT 2
OUTPUT 3
OUTPUT 4
Same structure for the channels2,3,4
VdsLIM 1
3/17
VNQ05XSP16
CURRENT AND VOLTAGE CONVE NTIO N S
1
2
3
4
5
6
7
89
10
11
GROUND
INPUT 4
C.SENSE
SENSENABLE N.C.
INPUT 1
INPUT 2
INPUT 3
SELA
SELB
VCC
N.C.
OUTPUT 1
OUTPUT 2
OUTPUT 3
OUTPUT 4
VCC
12
13
14
15
16
17
OUTPUT3
INPUT2
IOUT3
VOUT4
OUTPUT2 IOUT2
VOUT3
INPUT1
IIN1
OUTPUT1 IOUT1
OUTPUT4
IOUT4
VOUT2
VOUT1
IIN2
IIN4 INPUT3
INPUT4
VIN4
VIN3
IIN3
VIN2
VIN1
CONNE CTIO N DIAGRAM (TOP VIEW)
VCC
ISVCC
IGND
GND
VSENSE
ISENSE SENSE
SELA
SELB
SENSENABLE
VSENSENABLE
VSELB
VSELA
ISELA
ISELB
ISENSENABLE
4/17
VNQ05XSP16
THERMAL DATA
(*) When mounted o n FR4 printed circuit board wi th 0.5 cm² of copper area (a t least 35 µm thick) connected to all VCC pins
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40 °C<Tj<1 50°C; u nless otherwise speci fied) (Per e ach ch annel)
POWER
SW ITCHING (VCC=13V)
PROTECTIONS
Note 1: Vclamp and VOV are correlated. Typical difference is 5V.
Symbol Parameter Value Unit
Rthj-case Therma l r esistance junction -case (M AX) 1.6 °C/W
Rthj-amb Thermal r esistance j unction-ambient (M AX) 51.6 (*) °C/W
S ymbol Parameter Test Condition s Min Typ Max Unit
VCC Operating supply voltage 5.5 13 36 V
VUSD U n de r vo l ta ge shut do w n 3 4 5.5 V
VOV Overvoltage shut down 36 V
RON On st ate resistance IOUT1,2,3,4=1A; Tj=25°C
IOUT1,2,3,4=1A; Tj=150°C
IOUT1,2,3,4=0.5A; VCC=6V
110
220
330
mΩ
mΩ
mΩ
Vclamp Cl a m p Vo l tage I CC=20mA (See note 1) 41 48 55 V
ISSupply current Off state; Inputs=n.c.; VCC=13V
O n state; VIN=5V; VCC=13V ; I OUT=0A;
RSENSE=3.9kΩ
80
10 µA
mA
IL(off1) Off State Output Current VIN=VOUT=0V 0 50 µA
IL(off2) Off St ate Ou tput Cur rent VIN=0V; VOUT=3.5V -75 0 µA
IL(off3) Off St ate Ou tput Cur rent VIN=VOUT=0V; Vcc= 13V; Tj=125°C 5 µA
IL(off4) Off State Output Cur rent VIN=VOUT=0V; Vcc= 13V; Tj=25°C 3 µA
Symbol Parameter Test Conditions Min Typ Max Unit
td(on) Turn -on delay time RL=2.6Ω ch annels 1,2,3,4 (see figure 2) 40 µs
td(off) Turn-off de lay time RL=2.6Ω ch annels 1,2,3,4 (see figure 2) 40 µs
(dVOUT/
dt)on Turn-on voltage slope R L=2.6Ω ch annels 1,2,3,4 (see figure 2) See
relative
diagram V/µs
(dVOUT/
dt)off Turn-off voltage slope RL=2.6Ω channels 1 ,2,3, 4 (see figure 2) See
relative
diagram V/µs
Symbol Parameter Test Conditions Min Typ Max Unit
Ilim DC short c ircuit current VCC=13V
5.5V<VCC<36V 57.510
10 A
A
TTSD Thermal shut down
temperature 150 175 200 °C
TRThermal reset
temperature 135 °C
THYST T h ermal hysteres is 715 °C
V
demag Turn-off output voltage
clamp IOUT=2A; L=6m H VCC-41 VCC-48 VCC-55 V
VON Outpu t volt age dr op
limitation IOUT=0.1A
Tj=-40°C...+150°C 50 mV
1
5/17
VNQ05XSP16
CURRENT SENSE (9V< VCC <16V)
LOGIC CHARACTERISTICS (Inputs, Sela&b, Sensenable)
Note 2: c ur r ent sense signal delay after pos itive inp ut slope.
Note: S ens e pin doesn’t ha v e to be left f loating.
Symbol Parameter Test Conditions Min Typ Max Unit
K1IOUT/ISENSE IOUT=0.1A; VSENSE=0.5V
Tj=-40...+150°C 650 950 1200
dK1/K1Current Sense Ratio
Drift IOUT=0.1A; VSENSE=0.5V;
Tj= -40°C...+150°C -10 +10 %
K2IOUT/ISENSE IOUT=1.0A, VSENSE=4V
Tj=-40...+150°C 800 1000 1200
dK2/K2Current Sense Ratio
Drift IOUT=1.0A; VSENSE=4V;
Tj=-40°C...+150°C -8 +8 %
K3IOUT/ISENSE IOUT=2.0A, VSENSE=4V
Tj=-40...+150°C 850 1000 1150
dK3/K3Current Sense Ratio
Drift IOUT=2.0A; VSENSE=4V;
Tj=-40°C...+150°C -6 +6 %
ISENSEO Analog Sense
Leakage Current
VCC=6...16V;
IOUT=0A;VSENSE=0V;
Tj=-40°C...+150°C 010µA
V
SENSE1,2,3,4 Max analog sense
output voltage
VCC=5.5V, IOUT1,2,3,4=1.0A
RSENSE=10kΩ
VCC>8V , I OUT1,2,3,4=2.0A
RSENSE=10kΩ
2
4
V
V
VSENSEH
Analog sense output
voltage in
overtemperature
condition
VCC=13V; RSENSE= 3.9kΩ5.5 V
RVSENSEH
Analog sense output
i m pe da nce in
overtem p er ature
condition
VCC=13V; Tj>TTSD;
All Channels Open 400 Ω
tDSENSE Current sense delay VCC=13V; RSENSE=3.9kΩ
(see note 2) 300 500 µs
Sym bol Parameter Test Conditions M in Typ Max Unit
VIL I n put lo w lev el
voltage 1.25 V
VIH Input high level
voltage 3.25 V
VI(hyst) Inp ut hysteresis
voltage 0.5 V
IIL Low level input
current VIN=1.25V 1µA
IIN High lev el input
current VIN=3.25V 10 µA
VICL Input clamp voltage IIN=1mA
IIN=-1mA 66.8
-0.7 8V
V
2
6/17
VNQ05XSP16
TRUTH TABLE
TRUTH TABLE
Figure 1: IOUT/ISENSE ve rsu s IOUT
CONDITIONS INPUT OUTPUT SENSE
Norma l op eration L
HL
H0
Nominal
Overtemperature L
HL
L0
VSENSEH
Undervoltage L
HL
L0
0
Overvoltage L
HL
L0
0
Short circuit to GND L
H
H
L
L
L
0
(Tj<TTSD) 0
(Tj>TTSD)
VSENSEH
Short circuit to VCC L
HH
H0
< No m inal
Negative outp ut volt age
clamp LL 0
SENSENABLE SELB SELA SENSE
L X X High Impedance
HL LI
SENSE=IOUT1/K
HL HI
SENSE=IOUT2/K
HH LI
SENSE=IOUT3/K
HH HI
SENSE=IOUT4/K
1
500
600
700
800
900
1000
1100
1200
1300
1400
1500
012345678910
I
OUT (A)
IOUT/ISENSE
max. T j= -4 0°C<< 150° C
min. Tj= - 40 °C< <150°C
typical v alue
7/17
VNQ05XSP16
ELECTRICAL TRANSIENT REQUIREMENTS
Figure 2: Switching Characteristics (Resistive load RL=1.3Ω)
ISO T/R
7637/1
Test Pulse
Test Levels
ITest Levels
II Test Levels
III Test Levels
IV Test Levels
Delays and Impedance
1-25V -50 V -7 5V -100V 2m s, 10Ω
2+25V +50V + 75V +100V 0.2m s, 10Ω
3a -25V -50V -100V -150V 0.1µs, 50Ω
3b +25V +50V +75V +100V 0.1µs, 50Ω
4-4V -5V -6V -7V 10m s, 0.01Ω
5+26.5V + 46.5V +66.5V + 86.5V 400m s, 2Ω
ISO T/R
7637/1
Test Pulse
Test Levels Result
ITest Levels Result
II Test Levels Result
III Test Levels Result
IV
1CCCC
2CCCC
3a CCCC
3b CCCC
4CCCC
5CEEE
Class Contents
CAll func tions of the d evice are performed as designed aft er exposu re t o disturbance.
EOne or mor e fu nc t i ons of th e d evice is no t p erformed as designed a f te r ex posur e a nd cannot be
returned to proper o perati on without repla cing the device.
1
V
OUT
dV
OUT
/dt
(on)
t
r
80%
10% t
f
dV
OUT
/dt
(off)
I
SENSE
t
t
90%
t
d(off)
INPUT
t
90%
t
d(on)
t
DSENSE
8/17
VNQ05XSP16
1
Figure 3: Waveforms
SENSE1
INPUT1
N ORM AL OPERATION (for example: Ch anne l1 is ON)
UNDERVOLTAGE
VCC
VUSD
VUSDhyst
INPUT1
OVERVOLTAGE
VCC
SENSE1
INPUT1
SENSE1
LOAD CURREN T1
LOAD CURRENT1
LOAD CURRENT 1
OVERTEMPERATURE
INPUT1
SENSE1
TTSD
TR
Tj
LO AD CURRENT1
VOV
VCC > VOV
VCC < VOV
SHO RT TO GROUND
INPUT1
LOAD CURRENT1
SENSE1
LOAD VOLTAGE1
INPUT1
LOAD VOLTAGE1
SENSE1
LOAD CURREN T1
<Nominal <Nominal
SHO RT TO VCC
ISENSE=RSENSE
VSENSEH
SENSEN
SENSEN
SENSEN
SENSEN
SENSEN
SENSEN
9/17
VNQ05XSP16
APPLICATION SCHEMATIC
V
CC
OUTPUT2
C. SENS E
D
ld
+5V
R
prot
OUTPUT1
R
SENSE
INPUT1
INPUT2
µ
C
R
prot
R
prot
R
prot
INPUT3
INPUT4
D
GND
R
GND
V
GND
GND
OUTPUT3
R
prot
R
prot
R
prot
R
prot
OUTPUT4
Notes: Input1,2,3,4, SELA, SELB, SENSENABLE have the same structure.
SELA
SESB
SENSENABLE
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY
Solu tion 1: R esis to r in th e grou nd line (R
GND
only). This
can be use d with any type of lo ad.
The following is an indication on how to dimension the
R
GND
resistor.
1) R
GND
≤ 600mV / (IS(on)max).
2) R
GND
≥ (-VCC) / (-IGND)
where -IGND is the D C re ver se gr ou nd p in cu rr ent a nd c an
be found in the absolute maximum rating section of the
device’s datash eet.
Power Dissipation in R
GND
(when VCC< 0 : during re verse
battery situatio ns) is:
PD= (-VCC)2/R
GND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
cal culate d with formula (1) wher e IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the R
GND
will
prod uc e a shif t (I S(on)max * R
GND
) in the i n put t hr esho ld s
and the status output values. This shift will vary
depe ndin g on how m any devices are ON in the ca se o f
several high side drivers sharing the same R
GND
.
If the calculated power dissipation leads to a large
resistor or several devices have to share the same
resistor then the ST suggests to utilize Solution 2 (see
below).
So lu t ion 2: A diode (D
GND
) in the gr ound li ne.
A resistor (R
GND
=1kΩ) should be inserted in parallel to
D
GND
if th e device will be driving an indu ctive l oad.
This small signal diode can be safely shared amongst
sev er al d iff eren t H SD. Al s o in t his ca se, t he pr es ence of
the ground network will produce a shift (≅600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
LOAD DUMP PRO TECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating.
The same applies if the device will be subject to
transients on the VCC l ine t ha t are gr eate r tha n th e o nes
shown in the ISO T/R 7637/1 table.
µC I/Os PROTECTION:
If a ground protection network is used and negative
transients are present on the VCC line, the control pins
will be pulled negative. ST suggests to insert a resistor
(Rprot) in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up
limit of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-V
GND
) / IIHmax
For VCCpeak= - 1 00V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
R ecommended R prot value is 10kΩ.
A/D
C
PAR
R
SENSE
x C
PAR
<10
µ
s
C
FILTER
1
10/17
VNQ05XSP16
High Level Input Current
Input Clamp Voltage
Off State Output Current
Overvoltage Shutdown
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
IL(off) (µA)
Off state
Vcc=36V
Vin=Vout=0V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Iih (µA)
Vin=3.25V
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
6
6.25
6.5
6.75
7
7.25
7.5
7.75
8
Vicl (V)
Iin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
30
32.5
35
37.5
40
42.5
45
47.5
50
Vov (V)
Input High Level
ILIM Vs Tcase
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
Vih (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
2.5
5
7.5
10
12.5
15
17.5
20
Ilim (A)
Vcc=13V
1
11/17
VNQ05XSP16
Turn-on Voltage Slope Turn-off Voltage Slope
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
50
100
150
200
250
300
350
400
450
500
dVout/dt(on) (V/ms)
Vcc=13V
Rl=2.6Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
50
100
150
200
250
300
350
400
450
500
550
600
dVout/dt(off) (V/ms)
Vcc=13V
Rl=2.6Ohm
On State Resistance Vs Tcase On State Resistance Vs VCC
-50 -25 0 25 50 75 100 125 150 175
Tc (ºC)
0
25
50
75
100
125
150
175
200
225
250
Ron (mOhm)
Iout=1A
Vcc=8V & 36V
5 10152025303540
Vcc (V )
0
25
50
75
100
125
150
175
200
Ron (mOhm)
Iout=1A
Tc=150ºC
Tc=25ºC
Tc=-40ºC
1
12/17
VNQ05XSP16
Maximum turn off current versus load inductance
A = Single P ulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
t
Demagnetization Demagnetization Demagnetization
1
10
100
0.01 0.1 1 10
L(mH)
ILMAX (A)
A
B
C
1
13/17
VNQ05XSP16
PowerSO-16™ PC Board
Rthj-amb Vs P CB copper area in open box free air condition
PowerSO-16™ THERMAL DATA
Layout condition of Rth and Zth measurements (PCB FR4 area= 60mm x 60mm, PCB thickness=2m m ,
Cu thickness=35µm, Copper areas: 6cm2).
30
35
40
45
50
55
0246810
PCB Cu heatsink area (cm^2)
RTHj_amb (°C/W)
Tj-Tamb=50°C
1
14/17
VNQ05XSP16
Thermal fitting model of a quad HSD in
PowerSO-16 Pulse calculation formula
Thermal Parameter
Area/island (cm2) Footprint 6
R1 (°C/W) 0.18
R2 (°C/W) 0.8
R3 ( °C/W) 0.7
R4 (°C/W) 0.8
R5 (°C/W) 13
R6 (°C/W) 37 22
C 1 (W.s /°C) 0.0006
C2 (W.s/°C) 1.50E-03
C3 (W.s/°C) 1.75E-02
C4 (W.s/°C) 0.4
C5 (W.s/°C) 0.75
C6 (W.s/°C) 3 5
ZTHδRTH δZTHtp 1δ–()+⋅=
where δtpT⁄=
Thermal Impedance Junction Ambient Single Pulse
0.1
1
10
100
1000
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZTH (°C/W)
Pd1
C1
R4
C3 C4
R3R1 R6R5R2
C5 C6C2
Pd2
R14
C13 C14
R13
Tj_1
Tj_2
T_amb
Pd3
C7
R10
C9 C10
R9R7 R12R11
R8
C11 C12C8
Pd4
R16
C15 C16
R15
Tj_3
Tj_4
R17 R18
Footprint
6 cm2
1
15/17
VNQ05XSP16
DIM. mm.
MIN. TYP MAX.
A1 0 0.05 0.1
A2 3.4 3.5 3.6
A3 1.2 1.3 1.4
A4 0.15 0.2 0.25
a0.2
b 0.27 0.35 0.43
c 0.23 0.27 0.32
D 9.4 9.5 9.6
D1 7.4 7.5 7.6
d 0 0.05 0.1
E (1) 13.85 14. 1 14. 3 5
E1 9.3 9.4 9.5
E2 7.3 7.4 7.5
E3 5.9 6.1 6.3
e0.8
e1 5.6
F0.5
G1.2
L 0.8 1 1.1
R1 0.25
R2 0.8
T2° 5° 8°
T1 6° (typ .)
T2 10° (typ.)
Package Weight (typ.)
P013Q
POWERSO-16 TM MECHANICAL DATA
16/17
VNQ05XSP16
PowerSO-16™ SUGGESTED PAD LAYOUT
1
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
All dimensions are in mm.
Base Q. ty 600
Bulk Q.ty 600
A (max) 330
B (min ) 1.5
C (± 0. 2) 13
F20.2
G (+ 2 / -0) 24.4
N (min ) 60
T (m ax) 30.4
TAPE DIM ENSI ONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Fe b. 1986
A ll dimensions are in mm.
Tape width W 24
Tape Hole Spacing P0 (± 0 .1) 4
Com ponen t Spacing P 24
Hole Diameter D (± 0.1/-0) 1.5
Hole Diameter D1 (mi n) 1.5
Hole Position F (± 0.05) 11.5
Com partment Depth K (m ax) 6.5
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
All dimensio ns are in mm.
Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1)
50 1000 532 4.9 17.2 0.8
TUBE SHIPMENT (no suffix)
C
A
B
7.4 + /- 0.1
10.5 +/- 0.1
2 +/- 0.14
0.5 + /- 0.1
0.8 + /- 0.1
10 +/- 0.1
17/17
VNQ05XSP16
Informat ion furnished is believed to be a c c ur ate and reliable. Ho wev er, S TMicroelec troni c s as s um es n o r es ponsibility for the co nsequences
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