Information furnished by Analog Devices is be lieved to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
that may result from its use. No license is granted by implication or other-
wise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
AD626
Low Cost, Single-Supply
Differential Amplifi er
FEATURES
Pin Selectable Gains of 10 and 100
True Single-Supply Operation
Single-Supply Range of +2.4 V to +10 V
Dual-Supply Range of ⴞ1.2 V to ⴞ6 V
Wide Output Voltage Range of 30 mV to 4.7 V
Optional Low-Pass Filtering
Excellent DC Performance
Low Input Offset Voltage: 500 ␮V Max
Large Common-Mode Range: 0 V to +54 V
Low Power: 1.2 mW (VS = +5 V)
Good CMR of 90 dB Typ
AC Performance
Fast Settling Time: 24 ␮s (0.01%)
Includes Input Protection
Series Resistive Inputs (RIN = 200 k⍀)
RFI Filters Included
Allows 50 V Continuous Overload
APPLICATIONS
Current Sensing
Interface for Pressure Transducers, Position Indicators,
Strain Gages, and Other Low Level Signal Sources
PROD UCT DE SCRIP TION
The AD626 is a low cost, true sin gle-sup ply dif fer en tial am pli fi er
de signed for am pli fy ing and low-pass fi ltering small dif fer en tial
voltages from sources having a large common-mode voltage.
The AD626 can operate from either a single supply of +2.4 V to
+10 V, or dual supplies of ±1.2 V to ±6 V. The input common-mode
range of this amplifi er is equal to 6 (+V
S
– 1 V) which pro vides a
+24 V CMR while operating from a +5 V sup ply. Fur ther more,
the AD626 features a CMR of 90 dB typ.
The amplifi er’s inputs are protected against continuous overload of
up to 50 V, and RFI fi lters are included in the attenuator network.
The output range is +0.03 V to +4.9 V using a +5 V sup ply. The
amplifi er provides a preset gain of 10, but gains be tween 10 and
100 can be easily con fi g ured with an external re sis tor. Fur ther -
more, a gain of 100 is available by connecting the G = 100 pin to
analog ground. The AD626 also offers low-pass fi lter capability by
connecting a ca pac i tor between the fi lter pin and analog ground.
The AD626A and AD626B operate over the industrial tem per a ture
range of –40°C to +85°C. The AD626 is available in two 8-lead
packages: a plastic mini-DIP and SOIC.
140
0 1M
60
20
1
40
0.1
120
80
100
100k10k 1k100 10
FREQUENCY – Hz
COMMON-MODE REJECTION – dB
G = 10, 100
VS = +5V
G = 100
VS = ⴞ5V
G = 10
VS = ⴞ5V
Figure 1. Common-Mode Rejection vs. Frequency
25
0 5
15
5
2
10
1
20
4
3
SUPPLY VOLTAGE – ⴞV
INPUT COMMON-MODE RANGE – V
ⴞVCM FOR SINGLE
AND DUAL SUPPLIES
ⴞVCM FOR DUAL
SUPPLIES ONLY
Figure 2. Input Common-Mode Range vs. Supply
CONNECTION DIAGRAM
8-Lead Plastic Mini-DIP (N)
and SOIC (R) Packages
1
2
3
4
8
7
6
5
AD626
1/6
200k⍀
–IN
ANALOG
GND
–VS
FILTER
+IN
G = 100
OUT
+VS
100k⍀
G=2
G = 30
200k⍀
REV. D
–2–
AD626–SPECIFICATIONS
Model AD626A AD626B
Parameter Condition Min Typ Max Min Typ Max Unit
GAIN
Gain Accuracy Total Error
Gain = 10 @ VOUT ≥ 100 mV dc 0.4 1.0 0.2 0.6 %
Gain = 100 @ VOUT ≥ 100 mV dc 0.1 1.0 0.5 0.6 %
Over Temperature, TA = TMIN to TMAX G = 10 50 30 ppm/°C
G = 100 150 120 ppm/°C
Gain Linearity
Gain = 10 @ VOUT ≥ 100 mV dc 0.014 0.016 0.014 0.016 %
Gain = 100 @ VOUT ≥ 100 mV dc 0.014 0.02 0.014 0.02 %
OFFSET VOLTAGE
Input Offset Voltage 1.9 2.5 1.9 2.5 mV
vs. Temperature TMIN to TMAX, G = 10 or 100 2.9 2.9 mV
vs. Temperature TMIN to TMAX, G = 10 or 100 6 6 µV/°C
vs. Supply Voltage (PSR)
+PSR 74 80 74 80 dB
–PSR 64 66 64 66 dB
COMMON-MODE REJECTION RL = 10 k⍀
+CMR Gain = 10, 100 f = 100 Hz, VCM = +24 V 66 90 80 90 dB
±CMR Gain = 10, 100 f = 10 kHz, VCM = +6 V 55 64 55 64 dB
–CMR Gain = 10, 100* f = 100 Hz, VCM = –2 V 60 85 73 85 dB
COMMON-MODE VOLTAGE RANGE
+CMV Gain = 10 CMR > 85 dB +24 +24 V
–CMV Gain = 10 CMR > 85 dB –2 –2 V
INPUT
Input Resistance
Differential 200 200 k⍀
Common-Mode 100 100 k⍀
Input Voltage Range (Common-Mode) 6 (VS – l) 6 (VS – l) V
OUTPUT
Output Voltage Swing RL = 10 k⍀
Positive Gain = 10 4.7 4.90 4.7 4.90 V
Gain = 100 4.7 4.90 4.7 4.90 V
Negative Gain = 10 0.03 0.03 V
Gain = 100 0.03 0.03 V
Short Circuit Current
+ISC 12 12 mA
NOISE
Voltage Noise RTI
Gain = 10 f = 0.1 Hz–10 Hz 2 2 µV p-p
Gain = 100 f = 0.1 Hz–10 Hz 2 2 µV p-p
Gain = 10 f = 1 kHz 0.25 0.25 µV/
冑
Hz
Gain = 100 f = 1 kHz 0.25 0.25 µV/
冑
Hz
DYNAMIC RESPONSE
–3 dB Bandwidth VOUT = +1 V dc 100 100 kHz
Slew Rate, TMIN to TMAX Gain = 10 0.17 0.22 0.17 0.22 V/µs
Gain = 100 0.1 0.17 0.1 0.17 V/µs
Settling Time to 0.01%, 1 V Step 24 22 µs
POWER SUPPLY
Operating Range TA = TMIN to TMAX 2.4 5 12 2.4 5 10 V
Quiescent Current Gain = 10 0.16 0.20 0.16 0.20 mA
Gain = 100 0.23 0.29 0.23 0.29 mA
TRANSISTOR COUNT Number of Transistors 46 46
*At temperatures above 25°C, –CMV degrades at the rate of 12 mV/°C; i.e., @ 25°C CMV = –2 V, @ 85°C CMV = –1.28 V.
Specifi cations subject to change without notice.
(@+VS = +5 V and TA = 25ⴗC, un less oth er wise noted.)
SINGLE SUPPLY
REV. D
AD626
–3–
Model AD626A AD626B
Parameter Condition Min Typ Max Min Typ Max Unit
GAIN
Gain Accuracy Total Error
Gain = 10 RL = 10 k⍀ 0.2 0.5 0.1 0.3 %
Gain = 100 0.25 1.0 0.15 0.6 %
Over Temperature, TA = TMIN to TMAX G = 10 50 30 ppm/°C
G = 100 100 80 ppm/°C
Gain Linearity
Gain = 10 0.045 0.055 0.045 0.055 %
Gain = 100 0.01 0.015 0.01 0.015 %
OFFSET VOLTAGE
Input Offset Voltage 50 500 50 250 µV
vs. Temperature TMIN to TMAX, G = 10 or 100 1.0 0.5 mV
vs. Temperature TMIN to TMAX, G = 10 or 100 1.0 0.5 µV/°C
vs. Supply Voltage (PSR)
+PSR 74 80 74 80 dB
–PSR 64 66 64 66 dB
COMMON-MODE REJECTION RL = 10 k⍀
+CMR Gain = 10, 100 f = 100 Hz, VCM = +24 V 66 90 80 90 dB
±CMR Gain = 10, 100 f = 10 kHz, VCM = 6 V 55 60 55 60 dB
COMMON-MODE VOLTAGE RANGE
+CMV Gain = 10 CMR > 85 dB 26.5 26.5 V
–CMV Gain = 10 CMR > 85 dB 32.5 32.5 V
INPUT
Input Resistance
Differential 200 200 k⍀
Common-Mode 110 110 k⍀
Input Voltage Range (Common-Mode) 6 (VS – l) 6 (VS – l) V
OUTPUT
Output Voltage Swing RL = 10 k⍀
Positive Gain = 10, 100 4.7 4.90 4.7 4.90 V
Negative Gain = 10 –1.65 –2.1 –1.65 –2.1 V
Gain = 100 –1.45 –1.8 –1.45 –1.8 V
Short Circuit Current
+ISC 12 12 mA
–ISC 0.5 0.5 mA
NOISE
Voltage Noise RTI
Gain = 10 f = 0.1 Hz–10 Hz 2 2 µV p-p
Gain = 100 f = 0.1 Hz–10 Hz 2 2 µV p-p
Gain = 10 f = 1 kHz 0.25 0.25 µV/
冑
Hz
Gain = 100 f = 1 kHz 0.25 0.25 µV/
冑
Hz
DYNAMIC RESPONSE
–3 dB Bandwidth VOUT = +1 V dc 100 100 kHz
Slew Rate, TMIN to TMAX Gain = 10 0.17 0.22 0.17 0.22 V/µs
Gain = 100 0.1 0.17 0.1 0.17 V/µs
Settling Time to 0.01%, 1 V Step 24 22 µs
POWER SUPPLY
Operating Range TA = TMIN to TMAX ⫾1.2 ⫾5 ⫾6 ⫾1.2 ⫾5 ⫾6 V
Quiescent Current Gain = 10 1.5 2 1.5 2 mA
Gain = 100 1.5 2 1.5 2 mA
TRANSISTOR COUNT Number of Transistors 46 46
Specifi cations subject to change without notice.
DUAL SUPPLY
(@+VS = ⴞ5 V and TA = 25ⴗC, un less oth er wise noted.)
REV. D
AD626
–4–
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily ac cu mu late
on the human body and test equipment and can discharge without detection. Although the AD626 features
proprietary ESD pro tec tion circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD pre cau tions are rec om mend ed to avoid per for mance
deg ra da tion or loss of functionality.
ABSOLUTE MAXIMUM RATINGS1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +36 V
Internal Power Dissipation
2
Peak Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +60 V
Maximum Reversed Supply Voltage Limit . . . . . . . . . . . . . –34 V
Output Short Circuit Duration . . . . . . . . . . . . . . . . . . Indefi nite
Storage Temperature Range (N, R) . . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD626A/AD626B . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . +300°C
METALLIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
NOTES
1
Stresses above those listed under Absolute Max i mum Ratings may cause per ma nent
damage to the device. This is a stress rating only; functional operation of the device
at these or any other conditions above those indicated in the operational section of
this specifi cation is not implied. Exposure to ab so lute maximum rating con di tions
for extended periods may affect device re li abil i ty.
2
8-Lead Plastic Package: ␪
JA
= 100°C/W; ␪
JC
= 50°C/W.
8-Lead SOIC Package: ␪
JA
= 155°C/W; ␪
JC
= 40°C/W.
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
AD626AN –40°C to +85°C Plastic DIP N-8
AD626AR –40°C to +85°C Small Outline IC R-8
AD626BN –40°C to +85°C Plastic DIP N-8
AD626AR-REEL –40°C to +85°C 13" Tape and Reel
AD626AR-REEL7 –40°C to +85°C 7" Tape and Reel
REV. D
–5–
Typical Performance Characteristics–AD626
25
0 5
15
5
2
10
1
20
4
3
SUPPLY VOLTAGE – ⴞV
INPUT COMMON-MODE RANGE – V
ⴞVCM FOR SINGLE
AND DUAL SUPPLIES
ⴞVCM FOR DUAL
SUPPLIES ONLY
TPC 1. Input Common-Mode Range vs. Supply
SUPPLY VOLTAGE – V
POSITIVE OUTPUT VOLTAGE SWING – V
5
0 5
3
1
1
2
0
4
4 3 2
DUAL SUPPLY
ONLY
SINGLE AND
DUAL SUPPLY
TA = 25ⴗC
TPC 2. Positive Output Voltage Swing vs. Supply Voltage
SUPPLY VOLTAGE – V
NEGATIVE OUTPUT VOLTAGE SWING – V
–5
0 5
–3
–1
1
–2
0
–4
4 3 2
DUAL SUPPLY
ONLY
TA = 25ⴗC
TPC 3. Negative Output Voltage Swing vs. Supply Voltage
6
1
–1
10 100 10k 1k
4
0
2
3
5
LOAD RESISTANCE – ⍀
POSITIVE OUTPUT VOLTAGE – V
VS = ⴞ5V
GAIN = 10, 100
TPC 4. Positive Output Voltage Swing vs. Resistive Load
–6
–1
1
100 1k 100k 10k
–4
0
–2
–3
–5
LOAD RESISTANCE – ⍀
NEGATIVE OUTPUT VOLTAGE – V
GAIN = 10
GAIN = 100
TPC 5. Negative Output Voltage Swing vs. Resistive Load
30
0
05
20
10
1432
WARM-UP TIME – Minutes
CHANGE IN OFFSET VOLTAGE – ␮V
TPC 6. Change in Input Offset Voltage vs. Warm-Up Time
REV. D
AD626
–6–
1000
100
010 100 1M100k10k1k
10
FREQUENCY – Hz
CLOSED-LOOP GAIN
GAIN = 100
GAIN = 10
VS = ⴞ5V
DUAL SUPPLY
VS = +5V
SINGLE SUPPLY
VS = ⴞ5V
DUAL SUPPLY
TPC 7. Closed-Loop Gain vs. Frequency
140
0
1M
60
20
1
40
0.1
120
80
100
100k10k 1k100 10
FREQUENCY – Hz
COMMON-MODE REJECTION – dB
G = 10, 100
VS = +5
G = 100
VS = ⴞ5
G = 10
VS = ⴞ5
TPC 8. Common-Mode Rejection vs. Frequency
100
65
25
80
70
0
75
–5
95
85
90
20 15 10 5
INPUT COMMON-MODE VOLTAGE – V
COMMON-MODE REJECTION – dB
G = 10, 100
VS = +5
TPC 9. Common-Mode Rejection vs. Input Common-
Mode Voltage for Single-Supply Operation
100
65 30
80
70
22
75
20
95
85
90
28 26 24
INPUT COMMON-MODE VOLTAGE – V
COMMON-MODE REJECTION – dB
VS = ⴞ5
TPC 10. Common-Mode Rejection vs. Input
Common- Mode Voltage for Dual-Supply Operation
100
60
080
90
70
20
80
40 60
INPUT SOURCE RESISTANCE MISMATCH – ⍀
COMMON-MODE REJECTION – dB
G = 10, 100
TPC 11. Common-Mode Rejection vs. Input Source
Resistance Mismatch
0.6
10 100 1k
0.5
0.4
0.3
0.2
0.1
SOURCE RESISTANCE MISMATCH – ⍀
ADDITIONAL GAIN ERROR – %
0.7
0.0
TOTAL GAIN ERROR =
GAIN ACCURACY (FROM SPEC TABLE)
+ ADDITIONAL GAIN ERROR
CURVE APPLIES TO
ALL SUPPLY VOLTAGES
AND GAINS BETWEEN 10 AND 100
TPC 12. Additional Gain Error vs. Source
Resistance Mismatch
REV. D
AD626
–7–
0.16
0.12
1 5
0.15
0.13
2
0.14
3 4
SUPPLY VOLTAGE – V
QUIESCENT CURRENT – mA
G = 10
TPC 13. Quiescent Supply Current vs. Supply Voltage
for Single-Supply Operation
2.0
0
ⴞ1ⴞ5
1.5
0.5
ⴞ2
1.0
ⴞ3ⴞ4
SUPPLY VOLTAGE – V
QUIESCENT CURRENT – mA
TPC 14. Quiescent Supply Current vs. Supply Voltage
for Dual-Supply Operation
10
1.0
0.01 110 100k10k1k100
0.1
VOLTAGE NSD – ␮V/ Hz
FREQUENCY – Hz
GAIN = 10, 100
VS = ⴞ5V DUAL SUPPLY
TPC 15. Noise Voltage Spectral Density vs. Frequency
5 SECONDS PER HORIZONTAL DIVISION
2␮V PER VERTICAL DIVISION
TPC 16. 0.1 Hz to 10 Hz RTI Voltage Noise. VS = ±5 V,
Gain = 100
100
80
0
110 1M100k10k1k100
60
40
20
VALUE OF RESISTOR R
G
– ⍀
CLOSED-LOOP GAIN
FOR VS = ⴞ5V AND +5V
TPC 17. Closed-Loop Gain vs. RG
20
1M
60
40
1 0.1
100
80
120
140
100k10k 1k100 10
FREQUENCY – Hz
POWER SUPPLY REJECTION – dB
ALL CURVES FOR
GAINS OF 10 OR 100
SINGLE AND DUAL
–PSRR
DUAL
+PSRR
DUAL
+PSRR
SINGLE
+PSRR
TPC 18. Power Supply Rejection vs. Frequency
REV. D
AD626
–8–
10
90
100
0%
TPC 19. Large Signal Pulse Response. VS = ±5 V, G = 10
10
90
100
0%
TPC 20. Large Signal Pulse Response. VS = ±5 V, G = 100
10
90
100
0%
TPC 21. Large Signal Pulse Response. VS = +5 V, G = 10
10
90
100
0%
TPC 22. Large Signal Pulse Response. VS = +5 V, G = 100
10
90
100
0%
TPC 23. Settling Time. VS = ±5 V, G = 10
10
90
100
0%
500mV
TPC 24. Settling Time. VS = ±5 V, G = 100
REV. D
AD626
–9–
10
90
100
0%
TPC 25. Settling Time. VS = +5 V, G = 10
AD626
C1
5pF
+IN
–IN
R1
200k⍀
R2
200k⍀
R3
41k⍀
C2
5pF
R4
41k⍀
R5
4.2k⍀
R11
10k⍀
R6
500⍀
R7
500⍀
R8
10k⍀
R10
10k⍀
R14
555⍀
GND GAIN = 100
R13
10k⍀
R15
10k⍀
R17
95k⍀
R9
10k⍀
R12
100k⍀
FILTER
OUT
+VS
A1
A2
–VS
Figure 4. Simplifi ed Schematic
10
90
100
0%
TPC 26. Settling Time. VS = +5 V, G = 100
10k⍀10k⍀
10k⍀
INPUT
20V p–p
1k⍀
+VS
AD626
–VS
ERROR
OUT
2k⍀
Figure 3. Settling Time Test Circuit
THEORY OF OPERATION
The AD626 is a differential amplifi er con sist ing of a precision
bal anced attenuator, a very low drift preamplifi er (A1), and an
out put buffer amplifi er (A2). It has been designed so that small
differential signals can be accurately am pli fi ed and fi ltered in the
presence of large common -mode voltages (V
CM
), without the use
of any other active components.
Figure 4 shows the main elements of the AD626. The signal in puts
at Pins 1 and 8 are fi rst applied to dual resistive at ten u a tors R1
through R4 whose purpose is to reduce the peak com mon-mode
voltage at the input to the preamplifi er—a feed back stage based
on the very low drift op amp A1. This allows the dif feren tial
input voltage to be accurately amplifi ed in the pres ence of large
common-mode volt ag es six times greater than that which can be
tol er at ed by the actual input to A1. As a re sult, the in put CMR
ex tends to six times the quantity (V
S
– 1 V). The over all common -
mode error is min i mized by precise laser-trimming of R3 and R4,
thus giving the AD626 a common-mode re jec tion ra tio (CMRR)
of at least 10,000:1 (80 dB).
To minimize the effect of spurious RF signals at the inputs due to
rectifi cation at the input to A1, small fi lter capacitors C1 and C2
are included.
The output of A1 is connected to the in put of A2 via a 100 k⍀
(R12) resistor to facilitate the low-pass fi ltering of the sig nal of
in ter est (see Low-Pass Filtering section).
The 200 k⍀ input impedance of the AD626 requires that the source
re sis tance driving this amplifi er be low in val ue (<1 k⍀)—this is
REV. D
AD626
–10–
necessary to min i mize gain error. Also, any mis match be tween the
total source re sis tance at each input will af fect gain ac cu ra cy and
common -mode rejection (CMR). For ex am ple: when operating at
a gain of 10, an 80 ⍀ mismatch in the source re sis tance between
the inputs will degrade CMR to 68 dB.
The output buffer, A2, operates at a gain of 2 or 20, thus setting
the overall, precalibrated gain of the AD626 (with no ex ter nal
com po nents) at 10 or 100. The gain is set by the feedback net work
around amplifi er A2.
The output of amplifi er A2 relies on a 10 k⍀ resistor to –V
S
for
“pull-down.” For single-supply operation, (–V
S
= “GND”), A2
can drive a 10 k⍀ ground ref er enced load to at least +4.7 V. The
min i mum, nominally “zero,” output voltage will be 30 mV. For
dual-supply op er a tion (±5 V), the positive output voltage swing
will be the same as for a single supply. The negative swing will be
to –2.5 V, at G = 100, limited by the ratio:
–VRR
RRR
S×
+
++
15 14
13 14 15
The negative range can be extended to –3.3 V (G = 100) and –4 V
(G = 10) by add ing an external 10 k⍀ pull-down from the out put
to –V
S
. This will add 0.5 mA to the AD626’s qui es cent cur rent,
bringing the total to 2 mA.
The AD626’s 100 kHz bandwidth at G = 10 and 100 (a 10 MHz
gain bandwidth) is much higher than can be obtained with low
power op amps in discrete dif fer en tial amplifi er circuits. Fur ther -
more, the AD626 is stable driving capacitive loads up to 50 pF
(G10) or 200 pF (G100). Capacitive load drive can be increased
to 200 pF (G10) by connecting a 100 ⍀ resistor in series with the
AD626’s output and the load.
ADJUSTING THE GAIN OF THE AD626
The AD626 is easily confi gured for gains of 10 or 100. Figure 5
shows that for a gain of 10, Pin 7 is simply left un con nect ed; simi-
larly, for a gain of 100, Pin 7 is grounded, as shown in Fig ure 6.
Gains between 10 and 100 are easily set by connecting a vari able
resistance between Pin 7 and Analog GND, as shown in Fig ure 7.
Because the on-chip resistors have an absolute tol er ance of ±20%
(although they are ratio matched to within 0.1%), at least a 20%
adjustment range must be provided. The values shown in the
table in Figure 7 provide a good trade-off be tween gain set range
and resolution, for gains from 11 to 90.
0.1␮F
OUTPUT
+VS
NOT
CONNECTED
+INPUT
–INPUT
0.1␮F
1
2
3
4
8
7
6
5
–IN +IN
G = 10
OUT
AD626
200k⍀200k⍀
100k⍀
G = 2
ANALOG
GND
–VS
FILTER
1/6
+VS
–VS
G = 30
Figure 5. AD626 Confi gured for a Gain of 10
0.1␮F
OUTPUT
+INPUT
–INPUT
0.1␮F
1
2
3
4
8
7
6
5
–IN +IN
G = 100
OUT
AD626
200k⍀200k⍀
100k⍀
ANALOG
GND
–VS
FILTER
1/6
+VS+VS
–VS
G = 30
G = 2
Figure 6. AD626 Confi gured for a Gain of 100
RG
RH
CF
FILTER
(OPTIONAL)
OUTPUT
+VS
+INPUT
–INPUT
0.1␮F
1
2
3
4
8
7
6
5
–IN +IN
G = 100
OUT
AD626
200k⍀200k⍀
100k⍀
ANALOG
GND
–VS
FILTER
1/6
+VS
CORNER FREQUENCY OF FILTER = 1
2␲CF (100k⍀)
GAIN RANGE RG(⍀) RH(⍀)
11 – 20
20 – 40
40 – 80
80 – 100
100k
10k
1k
100
4.99k
802
80
2
RESISTOR VALUES FOR GAIN ADJUSTMENT
0.1␮F
–VS
G = 2
G = 30
Figure 7. Recommended Circuit for Gain Adjustment
SINGLE-POLE LOW-PASS FILTERING
A low-pass fi lter can be easily implemented by using the fea tures
provided by the AD626.
By simply connecting a capacitor between Pin 4 and ground,
a single-pole low-pass fi lter is created, as shown in Figure 8.
CF
CORNER FREQUENCY OF FILTER = 1
2␲CF (100k⍀)
OUTPUT
+10V
+INPUT
–INPUT
0.1␮F
1
2
3
4
8
7
6
5
–IN +IN
G = 100
OUT
AD626
200k⍀200k⍀
100k⍀
ANALOG
GND
–VS
FILTER
1/6
+VS
G = 2
G = 30
Figure 8. A One-Pole Low-Pass Filter Circuit
Which Operates from a Single +10 V Supply
REV. D
AD626
–11–
CURRENT SENSOR INTERFACE
A typical current sensing application, making use of the large
common-mode range of the AD626, is shown in Figure 9. The
cur rent being measured is sensed across resistor R
S
. The value of
R
S
should be less than 1 k⍀ and should be selected so that the
average differential voltage across this resistor is typically 100 mV.
To produce a full-scale output of +4 V, a gain of 40 is used adjust-
able by ±20% to absorb the tolerance in the sense re sis tor. Note
that there is suffi cient headroom to allow at least a 10% over range
(to +4.4 V).
RG
RH
CF
OPTIONAL
LOW-PASS
FILTER
OUTPUT
+VS
CURRENT IN
C
URRENT OUT
0.1␮F
1
2
3
4
8
7
6
5
–IN +IN
G = 100
OUT
AD626
200k⍀200k⍀
100k⍀
ANALOG
GND
–VS
FILTER
1/6
+VS
0.1␮F
–VS
RS
CURRENT
SENSOR
G = 2
G = 30
Figure 9. Current Sensor Interface
BRIDGE APPLICATION
Figure 10 shows the AD626 in a typical bridge application. Here,
the AD626 is set to operate at a gain of 100, using dual-sup ply
voltages and offering the option of low-pass fi ltering.
CF
OPTIONAL
LOW-PASS
FILTER
OUTPUT
+5V
0.1␮F
1
2
3
4
8
7
6
5
–IN +IN
G = 100
OUT
AD626
200k⍀200k⍀
100k⍀
ANALOG
GND
–VS
FILTER
1/6
+VS
0.1␮F
–5V
+VS
G = 30
G = 2
Figure 10. A Typical Bridge Application
REV. D
C00781–0–1/03(D)PRINTED IN U.S.A.
–12–
AD626
Revision History
Location Page
1/03—Data Sheet changed from REV. C to REV. D.
Renumbered Figures and TPCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal
Edits to Figure 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to SPECIFICATIONS, Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Edit to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Update to standard CAUTION/ESD Warning note and diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Edits to TPC 8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
OUTLINE DIMENSIONS
8-Lead Standard Small Outline Package [SOIC]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
0.25 (0.0098)
0.19 (0.0075)
1.27 (0.0500)
0.41 (0.0160)
0.50 (0.0196)
0.25 (0.0099)
ⴛ45ⴗ
8ⴗ
0ⴗ
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
85
41
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2440)
5.80 (0.2284)
0.51 (0.0201)
0.33 (0.0130)
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
8-Lead Plastic Dual-In Line Package [PDIP]
(N-8)
Dimensions shown in inches and (millimeters)
SEATING
PLANE
0.015
(0.38)
MIN
0.180
(4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79) 0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
8
14
50.295 (7.49)
0.285 (7.24)
0.275 (6.98)
0.100 (2.54)
BSC
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
REV. D