IRF40DM229 - INFINEON TECHNOLOGIES AG

IR MOSFET

StrongIRFET™

IRF40DM229

Application

Brushed Motor drive applications

BLDC Motor drive applications

Battery powered circuits

Half-bridge and full-bridge topologies

Synchronous rectifier applications

Resonant mode power supplies

OR-ing and redundant power switches

DC/DC and AC/DC converters

DC/AC Inverters

Benefits

Improved Gate, Avalanche and Dynamic dv/dt Ruggedness

Fully Characterized Capacitance and Avalanche SOA

Enhanced body diode dv/dt and di/dt Capability

Lead-Free, RoHS Compliant

Base part number Package Type

Standard Pack Orderable Part Number

Form Quantity

IRF40DM229 DirectFET™ MF Tape and Reel 4800 IRF40DM229

VDSS 40V

RDS(on) typ. 1.4m

max 1.85m

ID (Silicon Limited) 159A

Fig 1. Typical On-Resistance vs. Gate Voltage Fig 2. Maximum Drain Current vs. Case Temperature

DirectFET™ ISOMETRIC



DirectFET™ N-Channel Power MOSFET 

1 2016-3-2

46810 12 14 16 18 20

VGS, Gate -to -Source Voltage (V)

0.0

1.0

2.0

3.0

4.0

5.0

6.0

RDS(on)

, Drain-to -Source On Resistance (m

)

ID = 97A

TJ = 25°C

TJ = 125°C

25 50 75 100 125 150

TC , Case Temperature (°C)

100

125

150

175

ID, Drain Current (A)

IRF40DM229

2 2016-3-2

Notes:

 Mounted on minimum footprint full size board with metalized

back and with small clip heatsink.

 Used double sided cooling , mounting pad with large heatsink.

Absolute Maximum Ratings  

Symbol Parameter Max. Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 159

ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited) 101 A

IDM Pulsed Drain Current  636 

PD @TC = 25°C Maximum Power Dissipation 83 W

Linear Derating Factor 0.67 W/°C

VGS Gate-to-Source Voltage ± 20 V

TJ Operating Junction and -55 to + 150 °C

TSTG Storage Temperature Range

Avalanche Characteristics 

EAS (Thermally limited) Single Pulse Avalanche Energy  72

EAS (tested) Single Pulse Avalanche Energy Tested Value  195

IAR Avalanche Current  See Fig.15,16, 23a, 23b A

EAR Repetitive Avalanche Energy  mJ

Thermal Resistance  

Symbol Parameter Typ. Max. Units

RJA Junction-to-Ambient  ––– 45

°C/W

RJA Junction-to-Ambient  12.5 –––

RJA Junction-to-Ambient  20 –––

RJC Junction-to-Case  ––– 1.5

RJ-PCB Junction-to-PCB Mounted 1.0 –––

EAS (Thermally limited) Single Pulse Avalanche Energy  169

Static @ TJ = 25°C (unless otherwise specified)   

Symbol Parameter Min. Typ. Max. Units Conditions

V(BR)DSS Drain-to-Source Breakdown Voltage 40 ––– ––– V VGS = 0V, ID = 250µA

V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 32 ––– mV/°C Reference to 25°C, ID = 1.0mA

RDS(on) Static Drain-to-Source On-Resistance ––– 1.4 1.85 m VGS = 10V, ID = 97A 

––– 3.0 –––VGS = 6.0V, ID = 49A 

VGS(th) Gate Threshold Voltage 2.2 2.8 3.9 V VDS = VGS, ID = 100µA

IDSS Drain-to-Source Leakage Current ––– ––– 1.0 µA VDS = 40V, VGS = 0V

––– ––– 150 VDS = 40V, VGS = 0V, TJ = 125°C

IGSS Gate-to-Source Forward Leakage ––– ––– 100 VGS = 20V

Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -20V

RG Internal Gate Resistance ––– 1.0 ––– 

 TC measured with thermocouple mounted to top (Drain) of part.

 Surface mounted on 1 in. square Cu

board (still air).

 Mounted to a PCB with small clip

heatsink (still air) 

 Mounted on minimum footprint full size

board with metalized back and with

small clip heatsink (still air)

IRF40DM229

3 2016-3-2

Dynamic @ TJ = 25°C (unless otherwise specified)  

Symbol Parameter Min. Typ. Max. Units Conditions

gfs Forward Transconductance 87 ––– ––– S VDS = 10V, ID = 97A

Qg Total Gate Charge ––– 107 161

ID = 97A

Qgs Gate-to-Source Charge ––– 30 ––– VDS =20V

Qgd Gate-to-Drain ("Miller") Charge ––– 39 ––– VGS = 10V 

Qsync Total Gate Charge Sync. (Qg - Qgd) ––– 68 –––

td(on) Turn-On Delay Time ––– 16 –––

VDD = 20V

tr Rise Time ––– 66 ––– ID = 30A

td(off) Turn-Off Delay Time ––– 54 ––– RG = 2.7

tf Fall Time ––– 54 ––– VGS = 10V 

Ciss Input Capacitance ––– 5317 –––

VGS = 0V

Coss Output Capacitance ––– 866 ––– VDS = 25V

Crss Reverse Transfer Capacitance ––– 575 ––– ƒ = 1.0MHz

Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 1037 ––– VGS = 0V, VDS = 0V to 32V 

Coss eff. (TR) Effective Output Capacitance (Time Related) ––– 1237 ––– VGS = 0V, VDS = 0V to 32V 

Diode Characteristics  

Symbol Parameter Min. Typ. Max. Units Conditions

IS Continuous Source Current ––– ––– 83

MOSFET symbol

(Body Diode) showing the

ISM Pulsed Source Current ––– ––– 636 integral reverse

(Body Diode)  p-n junction diode.

VSD Diode Forward Voltage ––– ––– 1.2 V TJ= 25°C,IS = 97A, VGS = 0V

dv/dt Peak Diode Recovery  ––– 3.2 ––– V/ns

TJ =150°C,IS = 97A,VDS = 40V

trr Reverse Recovery Time ––– 26 ––– ns TJ = 25° C VR = 34V

––– 27 ––– TJ = 125°C IF = 97A

Qrr Reverse Recovery Charge ––– 24 ––– TJ = 25°C di/dt = 100A/µs 

––– 23 ––– TJ = 125°C

IRRM Reverse Recovery Current ––– 1.2 ––– A TJ = 25°C

Notes:

Repetitive rating; pulse width limited by max. junction

temperature.

 Limited by TJmax, starting TJ = 25°C, L = 0.015mH

RG = 50, IAS = 97A, VGS =10V.

 ISD ≤ 97A, di/dt ≤ 862A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C.

Pulse width ≤ 400µs; duty cycle ≤ 2%.

Coss eff. (TR) is a fixed capacitance that gives the

same charging time as Coss while VDS is rising from 0

to 80% VDSS.

Coss eff. (ER) is a fixed capacitance that gives the

same energy as Coss while VDS is rising from 0 to

80% VDSS.

When mounted on 1" square PCB (FR-4 or G-10

Material). For recommended footprint and soldering

techniques refer to application note # AN-994.

http://www.irf.com/technical-info/appnotes/an-994.pdf

 R

 is measured at TJ approximately 90°C.

 This value determined from sample failure population,

starting TJ = 25°C, L= 0.015mH, RG = 50, IAS = 97A,

GS =10V.

Limited by TJmax, starting TJ = 25°C, L = 1mH

RG = 50, IAS = 18A, VGS =10V.

IRF40DM229

4 2016-3-2

Fig 6. Normalized On-Resistance vs. Temperature

Fig 5. Typical Transfer Characteristics

Fig 4. Typical Output Characteristics

Fig 3. Typical Output Characteristics

Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage

Fig 7. Typical Capacitance vs. Drain-to-Source Voltage

0.1 110 100

VDS, Drain-to-Source Voltage (V)

100

1000

ID, Drain-to-Source Current (A)

VGS

TOP 15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM 4.5V

60µs PULSE WIDTH

Tj = 25°C

4.5V

0.1 110 100

VDS, Drain-to-Source Voltage (V)

100

1000

ID, Drain-to-Source Current (A)

VGS

TOP 15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

BOTTOM 4.5V

60µs PULSE WIDTH

Tj = 150°C

4.5V

-60 -40 -20 020 40 60 80 100 120 140 160

TJ , Junction Temperature (°C)

0.0

0.5

1.0

1.5

2.0

0.0

0.5

1.0

1.5

2.0

RDS(on) , Drain-to-Source On Resistance

(Normalized)

ID = 97A

VGS = 10V

0.1 110 100

VDS, Drain-to-Source Voltage (V)

100

1000

10000

100000

C, Capacitance (pF)

VGS = 0V, f = 1 MHZ

Ciss = Cgs + Cgd, Cds SHORTED

Crss = Cgd

Coss = Cds + Cgd

Coss

Crss

Ciss

0 20 40 60 80 100 120 140

QG, Total Gate Charge (nC)

0.0

2.0

4.0

6.0

8.0

10.0

12.0

14.0

VGS, Gate-to-Source Voltage (V)

VDS= 32V

VDS= 20V

VDS= 8.0V

ID= 97A

3456789

VGS, Gate-to-Source Voltage (V)

1.0

100

1000

ID, Drain-to-Source Current (A)

TJ = 25°C

TJ = 150°C

VDS = 10V

60µs PULSE WIDTH

IRF40DM229

5 2016-3-2

Fig 10. Maximum Safe Operating Area

Fig 11. Drain-to-Source Breakdown Voltage

Fig 9. Typical Source-Drain Diode Forward Voltage

Fig 13. Typical On-Resistance vs. Drain Current

Fig 12. Typical Coss Stored Energy

0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

VSD, Source-to-Drain Voltage (V)

0.1

100

1000

ISD, Reverse Drain Current (A)

TJ = 25°C

TJ = 150°C

VGS = 0V

-60 -40 -20 020 40 60 80 100 120 140 160

TJ , Temperature ( °C )

V(BR)DSS, Drain-to-Source Breakdown Voltage (V)

Id = 1.0mA

-5 0 5 10 15 20 25 30 35 40 45

VDS, Drain-to-Source Voltage (V)

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

Energy (µJ)

025 50 75 100 125 150 175 200

ID, Drain Current (A)

RDS(on), Drain-to -Source On Resistance (

m)

VGS = 5.5V

VGS = 6.0V

VGS = 7.0V

VGS = 8.0V

VGS = 10V

0.1 1 10 100

VDS, Drain-to-Source Voltage (V)

0.01

0.1

100

1000

10000

ID, Drain-to-Source Current (A)

Tc = 25°C

Tj = 150°C

Single Pulse

1msec

10msec

OPERATION IN THIS AREA

LIMITED BY RDS(on)

100µsec

IRF40DM229

6 2016-3-2

Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 16. Maximum Avalanche Energy vs. Temperature

Notes on Repetitive Avalanche Curves , Figures 15, 16:

(For further info, see AN-1005 at www.irf.com)

1.Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a

temperature far in excess of Tjmax. This is validated for every

part type.

2. Safe operation in Avalanche is allowed as long asTjmax is not

exceeded.

3. Equation below based on circuit and waveforms shown in Figures

23a, 23b.

4. PD (ave) = Average power dissipation per single avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage

increase during avalanche).

6. Iav = Allowable avalanche current.

7. T = Allowable rise in junction temperature, not to exceed Tjmax

(assumed as 25°C in Figure 14, 15).

av = Average time in avalanche.

D = Duty cycle in avalanche = tav ·f

thJC(D, tav) = Transient thermal resistance, see Figures 13)

PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC

av = 2T/ [1.3·BV·Zth]

AS (AR) = PD (ave)·tav

1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

0.001

0.01

0.1

Thermal Response ( Z

thJC ) °C/W

0.20

0.10

D = 0.50

0.02

0.01

0.05

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

0.1

100

1000

Avalanche Current (A)

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming j = 25°C and

Tstart = 125°C.

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming Tj = 125°C and

Tstart =25°C (Single Pulse)

25 50 75 100 125 150

Starting TJ , Junction Temperature (°C)

EAR , Avalanche Energy (mJ)

TOP Single Pulse

BOTTOM 1.0% Duty Cycle

ID = 97A

Fig 15. Avalanche Current vs. Pulse Width

IRF40DM229

7 2016-3-2

Fig 17. Threshold Voltage vs. Temperature

Fig 21. Typical Stored Charge vs. dif/dt

Fig 18. Typical Recovery Current vs. dif/dt

-75 -50 -25 025 50 75 100 125 150

TJ , Temperature ( °C )

1.5

2.0

2.5

3.0

3.5

4.0

4.5

VGS(th), Gate threshold Voltage (V)

ID = 100µA

ID = 250µA

ID = 1.0mA

ID = 1.0A

100 200 300 400 500 600 700

diF /dt (A/µs)

IRRM (A)

IF = 65A

VR = 34V

TJ = 25°C

TJ = 125°C

100 200 300 400 500 600 700

diF /dt (A/µs)

IRRM (A)

IF = 97A

VR = 34V

TJ = 25°C

TJ = 125°C

100 200 300 400 500 600 700

diF /dt (A/µs)

100

125

150

175

200

QRR (nC)

IF = 65A

VR = 34V

TJ = 25°C

TJ = 125°C

100 200 300 400 500 600 700

diF /dt (A/µs)

100

125

150

175

200

225

QRR (nC)

IF = 97A

VR = 34V

TJ = 25°C

TJ = 125°C

Fig 20. Typical Stored Charge vs. dif/dt

Fig 19. Typical Recovery Current vs. dif/dt

IRF40DM229

8 2016-3-2

Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs

Fig 23a. Unclamped Inductive Test Circuit

0.01



D.U.T

VDS

-V

DRIVER

15V

20V

Fig 25a. Gate Charge Test Circuit

(BR)DSS

Fig 23b. Unclamped Inductive Waveforms

Fig 24a. Switching Time Test Circuit Fig 24b. Switching Time Waveforms

Vds

Vgs

Vgs(th)

Qgs1 Qgs2 Qgd Qgodr

Fig 25b. Gate Charge Waveform

VDD

IRF40DM229

9 2016-3-2

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

DirectFET™ Board Footprint, MF Outline

(Medium Size Can, E-Designation)

Please see DirectFET™ application note AN-1035 for all details regarding the assembly of DirectFET™.

This includes all recommendations for stencil and substrate designs.

G = GATE

D = DRAIN

S = SOURCE

IRF40DM229

10 2016-3-2

DirectFET™ Outline Dimension, MF Outline

(Medium Size Can, E-Designation)

Please see DirectFET™ application note AN-1035 for all details regarding the assembly of DirectFET™. This includes all

recommendations for stencil and substrate designs.

DirectFET™ Part Marking

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

Dimensions are shown in

millimeters (inches)

CODE

0.017

0.085

0.156

0.044

0.018

0.024

MAX

0.250

0.38

2.035

3.85

1.08

0.35

0.58

MIN

6.25

4.80

0.42

2.165

3.95

1.12

0.45

0.62

MAX

6.35

5.05

0.015

0.080

0.152

0.043

0.023

0.014

MIN

0.189

0.246

METRIC IMPERIAL

DIMENSIONS

0.93 0.97

1.28 1.32

0.0380.037

0.0520.050

J1 0.0230.620.58 0.024

0.0330.9650.835 0.038K

0.199

0.028

0.007

0.59

0.08

0.70

0.17

0.023

0.003

N0.02 0.08 0.0008 0.003

PART NUMBER

BATCH NUMBER

DATE CODE

Line above the last character of

the date code indicates "Lead-Free"

GATE MARKING

LOGO

IRF40DM229

11 2016-3-2

DirectFET™ Tape & Reel Dimension (Showing component orientation).



Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

LOADED TAPE FEED DIRECTION

NOTE: CONTROLLING

DIMENSIONS IN MM CODE

IMPERIAL

MIN

0.311

0.154

0.469

0.215

0.201

0.256

0.059

MAX

8.10

4.10

12.30

5.55

5.30

6.70

N.C

1.60

MIN

7.90

3.90

11.90

5.45

5.10

6.50

1.50

METRIC

DIMENSIONS

MAX

0.319

0.161

0.484

0.219

0.209

0.264

N.C

0.063

NOTE: Controlling dimensions in mm

Std reel quantity is 4800 parts. Ordered as IRF40DM229.

REEL DIMENSIONS

MAX

N.C

0.520

N.C

0.724

0.567

0.606

IMPERIAL

MIN

330.0

20.2

12.8

1.5

100.0

N.C

12.4

11.9

STANDARD OPTION (QTY 4800)

CODE

MAX

N.C

13.2

N.C

18.4

14.4

15.4

MIN

12.992

0.795

0.504

0.059

3.937

N.C

0.488

0.469

METRIC

IRF40DM229

12 2016-3-2

Published by

Infineon Technologies AG

81726 München, Germany

IMPORTANT NOTICE

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics

(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any

information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and

liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third

party.

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this

document and any applicable legal requirements, norms and standards concerning customer’s products and any use of

the product of Infineon Technologies in customer’s applications.

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of

customer’s technical departments to evaluate the suitability of the product for the intended application and the

completeness of the product information given in this document with respect to such application.

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest

Infineon Technologies office (www.infineon.com).

WARNINGS

Due to technical requirements products may contain dangerous substances. For information on the types in question

please contact your nearest Infineon Technologies office.

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized

representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a

failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.

Qualification Information† 

Qualification Level 

Industrial *

(per JEDEC JESD47F†† guidelines)

Moisture Sensitivity Level DFET 1.5

MSL1

(per JEDEC J-STD-020D††)

RoHS Compliant Yes

† Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability

†† Applicable version of JEDEC standard at the time of product release.

* Industrial qualification standards except autoclave test conditions.