©2005 Fairchild Semiconductor Corporation
1
www.fairchildsemi.com
August 2005
FDN352AP Rev. C1
FDN352AP Single P-Channel, PowerTrench
®
MOSFET
FDN352AP
Single P-Channel, PowerTrench
®
MOSFET
Features
■
–1.3 A, –30V R
DS(ON)
= 180 m
Ω
@ V
GS
= –10V
–1.1 A, –30V R
DS(ON)
= 300 m
Ω
@ V
GS
= –4.5V
■
High performance trench technology for extremely low
R
DS(ON)
.
■
High power version of industry Standard SOT-23 package.
Identical pin-out to SOT-23 with 30% higher power handling
capability.
Applications
■
Notebook computer power management
General Description
This P-Channel Logic Level MOSFET is produced using Fair-
child Semiconductor advanced Power Trench process that has
been especially tailored to minimize the on-state resistance and
yet maintain low gate charge for superior switching perfor-
mance.
These devices are well suited for low voltage and battery pow-
ered applications where low in-line power loss is needed in a
very small outline surface mount package.
Absolute Maximum Ratings
T
A
= 25°C unless otherwise noted
Package Marking and Ordering Information
Symbol Parameter Ratings Units
V
DSS
Drain-Source Voltage –30 V
V
GSS
Gate-Source Voltage
±
25 V
I
D
Drain Current – Continuous (Note 1a) –1.3 A
– Pulsed –10
P
D
Power Dissipation for Single Operation (Note 1a) 0.5 W
(Note 1b) 0.46
T
J
, T
STG
Operating and Storage Junction Temperature Range –55 to +150
°
C
Thermal Characteristics
R
θ
JA
Thermal Resistance, Junction-to-Ambient (Note 1a) 250
°
C/W
R
θ
JC
Thermal Resistance, Junction-to-Case (Note 1) 75
Device Marking Device Reel Size Tape width Quantity
52AP FDN352AP 7’’ 8mm 3000 units
G
SuperSOT™-3
G
S
D
D
G S
2
www.fairchildsemi.com
FDN352AP Rev. C1
FDN352AP Single P-Channel, PowerTrench
®
MOSFET
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting
surface of the drain pins R
θ
JC
is guaranteed by design while R
θ
JA
is determined by the user’s board design.
(a) R
θ
JA
= 250°C/W when mounted on a 0.02 in
2
pad of 2oz. copper.
(b) R
θ
JA
= 270°C/W when mounted on a 0.001 in
2
pad of 2oz. copper.
2. Pulse Test: Pulse Width < 300
µ
s, Duty Cycle < 2.0%
Electrical Characteristics
T
A
= 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BV
DSS
Drain–Source Breakdown Voltage V
GS
= 0 V, I
D
= –250
µ
A –30 V
∆
BV
DSS
∆
T
J
Breakdown Voltage Temperature Coefficient I
D
= –250
µ
A, Referenced to 25
°
C –17 mV/
°
C
I
DSS
Zero Gate Voltage Drain Current V
DS
= –24 V, V
GS
= 0 V –1
µ
A
I
GSS
Gate–Body Leakage V
GS
=
±
25 V, V
DS
= 0 V
±
100 nA
On Characteristics
(Note 2)
V
GS(th)
Gate Threshold Voltage V
DS
= V
GS
, I
D
= –250
µ
A –0.8 –2.0 –2.5 V
∆
V
GS(th)
∆
T
J
Gate Threshold Voltage
Temperature Coefficient
I
D
= –250
µ
A, Referenced to 25
°
C4mV/
°
C
R
DS(on)
Static Drain–Source
On–Resistance
V
GS
= –10 V, I
D
= –1.3 A
V
GS
= –4.5 V, I
D
= –1.1 A
V
GS
= –4.5 V, I
D
= –1.1 A, T
J
= 125
°
C
150
250
330
180
300
400
m
Ω
g
FS
Forward Transconductance V
DS
= –5 V, I
D
= –0.9 A 2.0 S
Dynamic Characteristics
C
iss
Input Capacitance V
DS
= –15 V, V
GS
= 0 V, f = 1.0 MHz 150 pF
C
oss
Output Capacitance 40 pF
C
rss
Reverse Transfer Capacitance 20 pF
Switching Characteristics
(Note 2)
t
d(on)
Tu r n–On Delay Time V
DD
= –10 V, I
D
= –1 A,
V
GS
= –10 V, R
GEN
= 6
Ω
48ns
t
r
Tu r n–On Rise Time 15 28 ns
t
d(off)
Tu r n–Off Delay Time 10 18 ns
t
f
Tu r n–Off Fall Time 12ns
Q
g
Total Gate Charge V
DS
= –10V, I
D
= –0.9 A,
V
GS
= –4.5 V
1.4 1.9 nC
Q
gs
Gate–Source Charge 0.5 nC
Q
gd
Gate–Drain Charge 0.5 nC
Drain–Source Diode Characteristics and Maximum Ratings
I
S
Maximum Continuous Drain–Source Diode Forward Current –0.42 A
V
SD
Drain–Source Diode Forward Voltage V
GS
= 0 V, I
S
= –0.42 A (Note 2) –0.8 –1.2 V
t
rr
Diode Reverse Recovery Time I
F
= –3.9 A,
dI
F
/dt = 100 A/µs
17 ns
Q
rr
Diode Reverse Recovery Charge 7 nC
3
www.fairchildsemi.com
FDN352AP Rev. C1
FDN352AP Single P-Channel, PowerTrench
®
MOSFET
Typical Characteristics
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
0246810
-ID, DRAIN CURRENT (A)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
V
GS
= -4.0V
-10V
-6.0V
-5.0V
-7.0V
-4.5V
-8.0V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.6
0.8
1
1.2
1.4
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
I
D
= -0.9A
V
GS
= -10V
0.1
0.2
0.3
0.4
0.5
0.6
0.7
246810
-VGS, GATE TO SOURCE VOLTAGE (V)
RDS(ON), ON-RESISTANCE (OHM)
I
D
= -0.45A
T
A
= 125
o
C
T
A
= 25
o
C
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
2
4
6
8
10
12345678
-V
GS
, GATE TO SOURCE VOLTAGE (V)
-ID, DRAIN CURRENT (A)
T
A
= -55
o
C
25oC
125
o
C
V
DS
= -5V
0.0001
0.001
0.01
0.1
1
10
100
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
-V
SD
,
BODY DIODE FORWARD VOLTAGE (V)
-IS, REVERSE DRAIN CURRENT (A)
V
GS
= 0V
T
A
= 125
o
C
25
o
C
-55
o
C
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
0
2
4
6
8
10
012345
-VDS, DRAIN TO SOURCE VOLTAGE (V)
-I
D
, DRAIN CURRENT (A)
VGS = -10V
-4.5V
-3.5V
-3.0V
-6.0V
-4.0V
4
www.fairchildsemi.com
FDN352AP Rev. C1
FDN352AP Single P-Channel, PowerTrench
®
MOSFET
Typical Characteristics
0.001
0.01
0.1
1
0.0001 0.001 0.01 0.1 1 10 100 1000
t
1
, TIME (sec)
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
0
2
4
6
8
10
0 0.5 1 1.5 2 2.5 3
Q
g
, GATE CHARGE (nC)
-VGS, GATE-SOURCE VOLTAGE (V)
I
D
= -0.9A
V
DS
= -10V
-20V
-15V
0
50
100
150
200
051015 20 25 30
-V
DS
, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
C
iss
C
oss
C
rss
f = 1 MHz
V
GS
= 0 V
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
100
0.1 1 10 100
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
-ID, DRAIN CURRENT (A)
DC
10s
1s
100ms
R
DS(ON)
LIMIT
V
GS
= -10V
SINGLE PULSE
R
JA
= 270
o
C/W
T
A
= 25
o
C
10ms
1ms
100µs
0
10
20
30
40
50
0.0001 0.001 0.01 0.1 1 10 100 1000
t
1
, TIME (sec)
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
R
JA
= 270°C/W
T
A
= 25°C
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
θ
θ
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
RθJA(t) = r(t) * RθJA
RθJA = 270°C/W
TJ
– TA = P * RθJA(t)
Duty Cycle, D = t 1 / t2
P(pk)
t1
t
2
5www.fairchildsemi.com
FDN352AP Rev. C1
FDN352AP Single P-Channel, PowerTrench® MOSFET
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
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In Design
First Production
Full Production
Not In Production
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