LTM8068
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For more information www.linear.com/LTM8068
V
IN
(V)
0
9
18
27
36
50
150
250
350
LOAD CURRENT (mA)
8068 TA01
TYPICAL APPLICATION
FEATURES DESCRIPTION
2.8VIN to 40VIN Isolated
µModule DC/DC Converter
with LDO Post Regulator
The LT M
®
8068 is a 2kVAC isolated flyback µModule
®
(power module) DC/DC converter with LDO post regula-
tor. Included in the package are the switching controller,
power switches, transformer, LDO, and all support com-
ponents. Operating over an input voltage range of 2.8V to
40V, the LTM8068 supports an output voltage range of
2.5V to 18V, set by a single resistor. There is also a linear
post regulator whose output voltage is adjustable from
1.2V to 18V as set by a single resistor. Only output and
input capacitors are needed to finish the design.
The LTM8068 is packaged in a thermally enhanced, com-
pact (9mm × 11.25mm × 4.92mm) overmolded ball grid
array (BGA) package suitable for automated assembly
by standard surface mount equipment. The LTM8068 is
available with SnPb or RoHS compliant terminal finish.
L, LT, LTC, LTM, Linear Technology, the Linear logo and µModule are registered trademarks of
Analog Devices, Inc. All other trademarks are the property of their respective owners.
APPLICATIONS
n 2kVAC Isolated µModule Converter
n UL60950 Recognized File E464570
n Wide Input Voltage Range: 2.8V to 40V
n VOUT1 Output:
n Up to 450mA (VIN=24V, VOUT1=5V)
n 2.5V to 18V Output Range
n VOUT2 Low Noise Linear Post Regulator:
n Up to 300mA
n 1.2V to 18V Output Range
n Current Mode Control
n User Configurable Undervoltage Lockout
n Low Profile (9mm × 11.25mm × 4.92mm)
BGA Package
n Industrial Sensors
n Industrial Switches
n Ground Loop Mitigation
Total Output Current vs VIN
2kVAC Isolated Low Noise µModule Regulator
VOUT2
FB2
VOUTN
LTM8068
162k
8068 TA01a
(5.6V)
VOUT2
5V
300mA MAX
10µF
VOUT1
VIN
RUN
GND
FB1
PIN BYP IS NOT USED IN THIS SCHEMATIC
7.32k
2.2µF
VIN
2.8V TO 38V
LOW
NOISE
LDO
•
•22µF
LTM8068
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For more information www.linear.com/LTM8068
PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS
VIN, RUN ..................................................................42V
VOUT1 Relative to VOUTN ............................................ 25V
VIN + VOUT1 (Note 2) .................................................45V
VOUT2 Relative to VOUTN ..........................................+20V
FB2 Relative to VOUTN ...............................................+7V
GND to VOUTN Isolation (Note 3) ...........................2kVAC
Maximum Internal Temperature (Note 4) .............. 125°C
Maximum Peak Body Reflow Temperature ........... 245°C
Storage Temperature.............................. –55°C to 125°C
(Note 1)
TOP VIEW
H
G
F
E
D
C
B
A
1234567
BANK 2
VOUTN
BANK 1
VOUT1
BANK 4
GND
RUN
FB2
BYP
FB1
BANK 5
VIN
BANK 3
VOUT2
BGA PACKAGE
38-LEAD (11.25mm × 9mm × 4.92mm)
TJMAX = 125°C, θJA = 18.2°C/W, θJCbottom = 4.8°C/W, θJCtop = 18.1°C/W, θJB = 4.8°C/W
WEIGHT = 1.1g, θ VALUES DETERMINED PER JEDEC 51-9, 51-12
PART NUMBER PAD OR BALL FINISH
PART MARKING* PACKAGE
TYPE
MSL
RATING
TEMPERATURE RANGE
(Note 4)DEVICE FINISH CODE
LTM8068EY#PBF SAC305 (RoHS) LTM8068Y e1 BGA 3 –40°C to 125°C
LTM8068IY#PBF SAC305 (RoHS) LTM8068Y e1 BGA 3 –40°C to 125°C
LTM8068IY SnPb (63/37) LTM8068Y e0 BGA 3 –40°C to 125°C
Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Terminal Finish Part Marking:
www.linear.com/leadfree
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures:
www.linear.com/umodule/pcbassembly
• LGA and BGA Package and T
ray Drawings:
www.linear.com/packaging
ORDER INFORMATION
http://www.linear.com/product/LTM8068#orderinfo
LTM8068
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For more information www.linear.com/LTM8068
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: VIN + VOUT1 is defined as the sum of:
(VIN – GND) + (VOUT1 – VOUTN)
Note 3: The LTM8068 isolation test voltage of either 2kVAC or its
equivalent of 2.83kVDC is applied for one second.
The l denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at TA = 25°C, RUN = 2V (Note 4).
PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input DC Voltage RUN = 2V l2.8 V
VOUT1 DC Voltage RFB1 = 15.4k
RFB1 = 8.25k
RFB1 = 2.37k
l
4.75
2.5
5
18
5.25
V
V
V
VIN Quiescent Current VRUN = 0V
Not Switching
7
3 µA
mA
VOUT1 Line Regulation 3V ≤ VIN ≤ 40V, IOUT = 0.1A, RUN = 2V 1 %
VOUT1 Load Regulation 0.05A ≤ IOUT ≤ 0.3A, RUN = 2V 1 %
VOUT1 Ripple (RMS) IOUT = 0.1A, 1MHz BW 30 mV
Isolation Voltage (Note 3) 2 kV
Input Short-Circuit Current VOUT1 Shorted 80 mA
RUN Pin Input Threshold RUN Pin Falling 1.18 1.214 1.25 V
RUN Pin Current VRUN = 1V
VRUN = 1.3V
2.5
0.1
µA
µA
LDO (VOUT2) Minimum Input DC Voltage (Note 5) 1.5 2.3 V
VOUT2 Voltage Range VOUT1 = 16V, RFB2 Open, No Load (Note 5)
VOUT1 = 16V, RFB2 = 41.2k, No Load (Note 5)
1.22
17.7
V
V
FB2 Pin Voltage VOUT1 = 2V, IOUT2 = 1mA (Note 5)
VOUT1 = 2V, IOUT2 = 1mA (Note 5)
l
1.19
1.22
1.25
V
V
VOUT2 Line Regulation 2V < VOUT1 < 16V, IOUT2 = 1mA (Note 5) 1 5 mV
VOUT2 Load Regulation VOUT1 = 5V, 10mA ≤ IOUT2 ≤ 300mA (Note 5) 2 10 mV
LDO Dropout Voltage IOUT2 = 10mA (Note 5)
IOUT2 = 100mA (Note 5)
IOUT2 = 300mA (Note 5)
0.25
0.34
0.43
V
V
V
VOUT2 Ripple (RMS) CBYP = 0.01µF, IOUT2 = 300mA, BW = 100Hz to 100kHz (Note 5) 20 µVRMS
Note 4: The LTM8068E is guaranteed to meet performance specifications
from 0°C to 125°C. Specifications over the –40°C to 125°C internal
temperature range are assured by design, characterization and correlation
with statistical process controls. LTM8068I is guaranteed to meet
specifications over the full –40°C to 125°C internal operating temperature
range. Note that the maximum internal temperature is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal resistance and other environmental factors.
Note 5: VRUN = 0V (Flyback not running), but the VOUT2 post regulator is
powered by applying a voltage to VOUT1.
LTM8068
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For more information www.linear.com/LTM8068
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current,
VOUT1=2.5V
Efficiency vs Load Current,
VOUT1=8V
Input Current vs Load Current,
VOUT1=2.5
Efficiency vs Load Current,
VOUT1=3.3V
Efficiency vs Load Current,
VOUT1=12V
Input Current vs Load Current,
VOUT1=3.3V
Efficiency vs Load Current,
VOUT1=5V
Input Current vs Load Current,
VOUT1=15V
Input Current vs Load Current,
VOUT1=5V
Unless otherwise noted, operating conditions are
as in Table 1 (TA=25°C).
LOAD CURRENT (mA)
0
50
100
150
200
250
300
350
30
40
50
60
70
80
EFFICIENCY (%)
8068 G01
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
LOAD CURRENT (mA)
0
50
100
150
200
250
300
350
400
40
50
60
70
80
EFFICIENCY (%)
8068 G02
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
LOAD CURRENT (mA)
0
100
200
300
400
500
600
40
50
60
70
80
90
EFFICIENCY (%)
8068 G03
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
LOAD CURRENT (mA)
0
100
200
300
400
500
45
55
65
75
85
EFFICIENCY (%)
8068 G04
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
LOAD CURRENT (mA)
0
50
100
150
200
250
300
45
55
65
75
85
EFFICIENCY (%)
8068 G05
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
LOAD CURRENT (mA)
0
50
100
150
200
250
55
65
75
85
EFFICIENCY (%)
8068 G06
VIN = 5V
VIN = 12V
VIN = 24V
V
IN
=5V
V
IN
=12V
V
IN
=24V
V
IN
=36V
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
LOAD CURRENT (mA)
0
50
100
150
200
250
300
350
0
25
50
75
100
INPUT CURRENT (mA)
8068 G07
LOAD CURRENT (mA)
0
100
200
300
400
0
25
50
75
100
125
INPUT CURRENT (mA)
8068 G08
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
LOAD CURRENT (mA)
0
100
200
300
400
500
600
0
60
120
180
240
300
INPUT CURRENT (mA)
8068 G09
LTM8068
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For more information www.linear.com/LTM8068
TYPICAL PERFORMANCE CHARACTERISTICS
Input Current vs Load Current,
VOUT1=8V
Input Current vs Load Current,
VOUT1=12V
Input Current vs VIN,
VOUT1 Shorted, VOUT2 Open
Maximum Load Current vs VIN Maximum Load Current vs VIN Maximum Load Current vs VIN
Input Current vs VIN,
VOUT2 Shorted Maximum Load Current vs VOUT1
Input Current vs Load Current,
VOUT1=15V
Unless otherwise noted, operating conditions are
as in Table 1 (TA=25°C).
LOAD CURRENT (mA)
0
100
200
300
400
500
0
100
200
300
400
INPUT CURRENT (mA)
8068 G10
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
VIN = 5V
VIN = 12V
VIN = 24V
VIN = 36V
LOAD CURRENT (mA)
0
100
200
300
0
100
200
300
400
INPUT CURRENT (mA)
8068 G11
LOAD CURRENT (mA)
0
100
200
300
0
100
200
300
400
INPUT CURRENT (mA)
8068 G12
VIN = 5V
VIN = 12V
VIN = 24V
V
IN
(V)
0
10
20
30
40
0
50
100
150
200
250
INPUT CURRENT (mA)
8068 G13
V
IN
(V)
0
10
20
30
40
0
90
180
270
360
450
INPUT CURRENT (mA)
8068 G14
V
IN
=5V
V
IN
=12V
V
IN
=24V
V
OUT1
(V)
0
5
10
15
20
25
0
125
250
375
500
MAXIMUM LOAD CURRENT (mA)
8068 G15
VIN = 5V
VIN = 12V
VIN = 24V
2.5V
OUT1
3.3V
OUT1
V
IN
(V)
0
10
20
30
40
100
200
300
400
8068 G16
MAXIMUM LOAD CURRENT (mA)
5V
OUT1
8V
OUT1
V
IN
(V)
0
10
20
30
40
0
200
400
600
8068 G17
MAXIMUM LOAD CURRENT (mA)
12V
OUT1
15V
OUT1
V
IN
(V)
0
10
20
30
40
0
100
200
300
MAXIMUM LOAD CURRENT (mA)
8068 G18
LTM8068
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Minimum Load Current vs VOUT1
Over Full Input Voltage Range
TYPICAL PERFORMANCE CHARACTERISTICS
Output Noise and Ripple
DC2358A, 200mA Load Current
Frequency vs VOUT1 Load Current
Stock DC2358A Demo Board
VOUT2 Dropout
Unless otherwise noted, operating conditions are
as in Table 1 (TA = 25°C).
V
OUT1
(V)
0
6
12
18
24
0
5
10
15
20
25
MINIMUM LOAD CURRENT (mA)
8068 G19
C9 = 470pF
HP461 150MHz AMPLIFIER AT 40dB GAIN
2µs/DIV
VOUT2
500µV/DIV
VOUT1
20mV/DIV
8068 G20
LOAD CURRENT (mA)
0
100
200
300
400
500
600
150
250
350
450
SWITCHING FREQUENCY (kHz)
8068 G21
VIN = 5V
VIN = 12V
VIN = 24V
VOUT2 LOAD CURRENT (mA)
VOUT2 DROPOUT VOLTAGE (V)
0.7
0.6
0.5
0.4
0.3
0.2
0
0.1
8058 G22
0 100
300
200 25015050
–40°C
125°C
25°C
VOUT2 = 3.3V
Derating, 1.2VOUT2 Derating, 1.5VOUT2
Derating, 2.5VOUT2 Derating,3.3VOUT2
Derating, 1.8VOUT2
0LFM AIRFLOW
AMBIENT TEMPERATURE (
°
C)
25
50
75
100
125
0
100
200
300
400
MAXIMUM LOAD CURRENT (mA)
8068 G23
VIN = 5V
VIN = 12V
VIN = 24V, 36V
0LFM AIRFLOW
AMBIENT TEMPERATURE (
°
C)
25
50
75
100
125
0
100
200
300
400
MAXIMUM LOAD CURRENT (mA)
8068 G24
VIN = 5V
VIN = 12V
VIN = 24V, 36V
0LFM AIRFLOW
AMBIENT TEMPERATURE (
°
C)
25
50
75
100
125
0
100
200
300
400
MAXIMUM LOAD CURRENT (mA)
8068 G25
VIN = 5V
VIN = 12V
VIN = 24V, 36V
0LFM AIRFLOW
AMBIENT TEMPERATURE (
°
C)
25
50
75
100
125
0
100
200
300
400
MAXIMUM LOAD CURRENT (mA)
8068 G26
VIN = 5V
VIN = 12V
VIN = 24V, 36V
0LFM AIRFLOW
AMBIENT TEMPERATURE (
°
C)
25
50
75
100
125
0
100
200
300
400
MAXIMUM LOAD CURRENT (mA)
8068 G27
VIN = 5V
VIN = 12V
VIN = 24V, 36V
LTM8068
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For more information www.linear.com/LTM8068
TYPICAL PERFORMANCE CHARACTERISTICS
Unless otherwise noted, operating conditions are
as in Table 1 (TA = 25°C).
Derating, 5VOUT2
Derating, 15VOUT2
Derating, 8VOUT2
Derating, 18VOUT2
Derating, 12VOUT2
0LFM AIRFLOW
AMBIENT TEMPERATURE (
°
C)
25
50
75
100
125
0
100
200
300
400
MAXIMUM LOAD CURRENT (mA)
8068 G28
VIN = 5V
VIN = 12V, 24V, 36V
0LFM AIRFLOW
AMBIENT TEMPERATURE (
°
C)
25
50
75
100
125
0
100
200
300
400
MAXIMUM LOAD CURRENT (mA)
8068 G29
VIN = 5V
VIN = 12V
VIN = 24V, 36V
0LFM AIRFLOW
AMBIENT TEMPERATURE (
°
C)
25
50
75
100
125
0
100
200
300
MAXIMUM LOAD CURRENT (mA)
8068 G30
VIN = 5V
VIN = 12V
VIN = 24V, 32V
0LFM AIRFLOW
AMBIENT TEMPERATURE (
°
C)
25
50
75
100
125
0
50
100
150
200
250
MAXIMUM LOAD CURRENT (mA)
8068 G31
VIN = 5V
VIN = 12V
VIN = 24V
0LFM AIRFLOW
AMBIENT TEMPERATURE (
°
C)
25
50
75
100
125
0
50
100
150
200
MAXIMUM LOAD CURRENT (mA)
8068 G32
VIN = 5V
VIN = 12V
VIN = 24V
LTM8068
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For more information www.linear.com/LTM8068
PIN FUNCTIONS
VOUT1 (Bank 1): VOUT1 and VOUTN comprise the isolated
output of the LTM8068 flyback stage. Apply an external
capacitor between VOUT1 and VOUTN. Do not allow VOUTN
to exceed VOUT1.
VOUTN (Bank 2): VOUTN is the return for both VOUT1 and
VOUT2. VOUT1 and VOUTN comprise the isolated output of
the LTM8068. In most applications, the bulk of the heat
flow out of the LTM8068 is through the GND and VOUTN
pads, so the printed circuit design has a large impact on
the thermal performance of the part. See the PCB Layout
and Thermal Considerations sections for more details.
Apply an external capacitor between VOUT1 and VOUTN.
VOUT2 (Bank 3): The output of the secondary side linear
post regulator. Apply the load and output capacitor between
VOUT2 and VOUTN. See the Applications Information sec-
tion for more information on output capacitance and
reverse output characteristics.
GND (Bank 4): This is the local ground of the LTM8068
primary. In most applications, the bulk of the heat flow
out of the LTM8068 is through the GND and VOUTN pads,
so the printed circuit design has a large impact on the
thermal performance of the part. See the PCB Layout and
Thermal Considerations sections for more details.
VIN (Bank 5): VIN supplies current to the LTM8068’s inter-
nal regulator and to the integrated power switch. These
pins must be locally bypassed with an external, low ESR
capacitor.
FB2 (Pin A2): This is the input to the error amplifier of the
secondary side LDO post regulator. This pin is internally
clamped to ±7V. The FB2 pin voltage is 1.22V referenced
to VOUTN and the output voltage range is 1.22V to 12V.
Apply a resistor from this pin to V
OUTN
, using the equation
RFB2 = 608.78/(VOUT2 – 1.22)kΩ. If the post regulator is
not used, leave this pin floating.
BYP (Pin B2): The BYP pin is used to bypass the refer-
ence of the LDO to achieve low noise performance from
the linear post regulator. The BYP pin is clamped internally
to ±0.6V relative to VOUTN. A small capacitor from VOUT2
to this pin will bypass the reference to lower the output
voltage noise. A maximum value of 0.01µF can be used
for reducing output voltage noise to a typical 20µV
RMS
over a 100Hz to 100kHz bandwidth. If not used, this pin
must be left unconnected.
RUN (Pin F3): A resistive divider connected to V
IN
and this
pin programs the minimum voltage at which the LTM8068
will operate. Below 1.24V, the LTM8068 does not deliver
power to the secondary. When RUN is less than 1.24V,
the pin draws 2.5µA, allowing for a programmable hys-
teresis. Do not allow a negative voltage (relative to GND)
on this pin.
FB1 (Pin G7): Apply a resistor from this pin to GND to
set the output voltage VOUT1 relative to VOUTN, using the
recommended value given in Table 1. If Table 1 does not
list the desired VOUT1 value, the equation
RFB1 =37.415 VOUT1–0.955
( )
kΩ
may be used to approximate the value. To the seasoned
designer, this exponential equation may seem unusual.
The equation is exponential due to nonlinear current
sources that are used to temperature compensate the
regulation. Do not drive this pin.
LTM8068
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For more information www.linear.com/LTM8068
OPERATION
The LTM8068 is a stand-alone isolated flyback switching
DC/DC power supply that can deliver up to 450mA of
output current at 5VOUT1, 24VIN. This module provides a
regulated output voltage programmable via one external
resistor from 2.5V to 18V. It is also equipped with a high
performance linear post regulator. The input voltage range
of the LTM8068 is 2.8V to 40V. Given that the LTM8068
is a flyback converter, the output current depends upon
the input and output voltages, so make sure that the
input voltage is high enough to support the desired out-
put voltage and load current. The Typical Performance
Characteristics section gives several graphs of the maxi-
mum load versus VIN for several output voltages.
A simplified block diagram is given. The LTM8068 con-
tains a current mode controller, power switching ele-
ment, power transformer, power Schottky diode, a mod-
est amount of input and output capacitance, and a high
performance linear post regulator
.
The LTM8068 has a galvanic primary to secondary iso-
lation rating of 2kVAC. For details please refer to the
Isolation, Working Voltage and Safely Compliance sec-
tion. The LTM8068 is a UL 60950 recognized component.
The RUN pin is used to turn on or off the LTM8068, dis-
connecting the output and reducing the input current to
1μA or less.
The LTM8068 is a variable frequency device. For a given
input and output voltage, the frequency decreases as the
load increases. For light loads, the current through the
internal transformer may be discontinuous.
The post regulator is a high performance 300mA low
dropout regulator with micropower quiescent current and
shutdown. The device is capable of supplying 300mA at
a dropout voltage of 430mV. Output voltage noise can be
lowered to 20µVRMS over a 100Hz to 100kHz bandwidth
with the addition of a 0.01μF reference bypass capacitor.
Additionally, this reference bypass capacitor will improve
transient response of the regulator, lowering the settling
time for transient load conditions. The linear regulator is
protected against both reverse input and reverse output
voltages.
LTM8068
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For more information www.linear.com/LTM8068
APPLICATIONS INFORMATION
For most applications, the design process is straight for-
ward, summarized as follows:
1. Look at Table 1a (or Table 1b, if the post linear regula-
tor is used) and find the row that has the desired input
range and output voltage.
2. Apply the recommended CIN, COUT1, COUT2, RFB1 and
RFB2 as required.
While these component combinations have been tested
for proper operation, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions. Bear in mind that
the maximum output current may be limited by junc-
tion temperature, the relationship between the input and
output voltage magnitude and polarity and other factors.
Please refer to the graphs in the Typical Performance
Characteristics section for guidance.
Capacitor Selection Considerations
The CIN, COUT1 and COUT2 capacitor values in Table 1 are
the minimum recommended values for the associated
operating conditions. Applying capacitor values below
those indicated in Table 1 is not recommended, and may
result in undesirable operation. Using larger values is
generally acceptable, and can yield improved dynamic
response, if it is necessary. Again, it is incumbent upon
the user to verify proper operation over the intended sys-
tem’s line, load and environmental conditions.
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable. X5R
and X7R types are stable over temperature and applied
voltage and give dependable service. Other types, includ-
ing Y5V and Z5U have very large temperature and voltage
coefficients of capacitance. In an application circuit they
may have only a small fraction of their nominal capaci-
tance resulting in much higher output voltage ripple than
expected.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8068. A
ceramic input capacitor combined with trace or cable
inductance forms a high-Q (underdamped) tank circuit.
If the LTM8068 circuit is plugged into a live supply, the
input voltage can ring to much higher than its nominal
value, possibly exceeding the device’s rating. This situa-
tion is easily avoided; see the Hot-Plugging Safely section.
LTM8068 Table 1a. Recommended Component Values and Configuration for Specific VOUT1 Voltages (TA = 25°C)
VIN VOUT1 CIN COUT1 RFB1
2.8V to 40V 2.5V 2.2µF, 50V, 1206 100µF, 6.3V, 1210 15.4k
2.8V to 40V 3.3V 2.2µF, 50V, 1206 47µF, 6.3V, 1210 11.8k
2.8V to 40V 5V 2.2µF, 50V, 1206 22µF, 16V, 1210 8.25k
2.8V to 37V 8V 2.2µF, 50V, 1206 22µF, 16V, 1210 5.23k
2.8V to 33V 12V 4.7µF, 50V, 1206 10µF, 50V, 1210 3.48k
2.8V to 30V 15V 4.7µF, 50V, 1206 4.7µF, 25V, 1210 2.8k
2.8V to 27V 18V 4.7µF, 50V, 1206 4.7µF, 25V, 1210 2.37k
Note: An input bulk capacitor is required.
LTM8068
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For more information www.linear.com/LTM8068
LTM8068 Table 1b. Recommended Component Values and Configuration for Specific VOUT2 Voltages (TA = 25°C)
VIN VOUT1 VOUT2 CIN COUT1 COUT2 RFB1 RFB2
2.8V to 40V 1.7V 1.2V 2.2µF, 50V, 1206 100µF, 6.3V, 1210 10µF, 6.3V, 1206 20.5k open
2.8V to 40V 2V 1.5V 2.2µF, 50V, 1206 100µF, 6.3V, 1210 10µF, 6.3V, 1206 18.2k 2.32M
2.8V to 40V 2.4V 1.8V 2.2µF, 50V, 1206 100µF, 6.3V, 1210 10µF, 6.3V, 1206 15.8k 1.07M
2.8V to 40V 3.1V 2.5V 2.2µF, 50V, 1206 100µF, 6.3V, 1210 10µF, 6.3V, 1206 12.7k 487k
2.8V to 40V 3.9V 3.3V 2.2µF, 50V, 1206 47µF, 6.3V, 1210 10µF, 6.3V, 1206 10.5k 294k
2.8V to 38V 5.6V 5V 2.2µF, 50V, 1206 22µF, 16V, 1210 10µF, 6.3V, 1206 7.32k 162k
2.8V to 36V 8.6V 8V 2.2µF, 50V, 1206 22µF, 16V, 1210 10µF, 10V, 1206 4.89k 88.7k
2.8V to 32V 12.7V 12V 4.7µF, 50V, 1206 10µF, 50V, 1210 22µF, 16V, 1206 3.32k 56.2k
2.8V to 29V 15.8V 15V 4.7µF, 50V, 1206 4.7µF, 25V, 1210 22µF, 16V, 1206 2.67k 44.2k
2.8V to 26V 18.8V 18V 4.7µF, 50V, 1206 4.7µF, 25V, 1210 22µF, 25V, 1206 2.26k 36.5k
Note: An input bulk capacitor is required.
APPLICATIONS INFORMATION
Isolation, Working Voltage and Safety Compliance
The LTM8068 isolation is 100% hi-pot tested by tying
all of the primary pins together, all of the secondary pins
together and subjecting the two resultant circuits to a
high voltage differential for one second. This establishes
the isolation voltage rating of the LTM8068 component.
The isolation rating of the LTM8068 is not the same as
the working or operational voltage that the application
will experience. This is subject to the application’s power
source, operating conditions, the industry where the end
product is used and other factors that dictate design
requirements such as the gap between copper planes,
traces and component pins on the printed circuit board, as
well as the type of connector that may be used. To maxi-
mize the allowable working voltage, the LTM8068 has two
columns of solder balls removed to facilitate the printed
circuit board design. The ball to ball pitch is 1.27mm, and
the typical ball diameter is 0.78mm. Accounting for the
missing columns and the ball diameter, the printed circuit
board may be designed for a metal-to-metal separation of
up to 3.03mm. This may have to be reduced somewhat to
allow for tolerances in solder mask or other printed circuit
board design rules. For those situations where informa-
tion about the spacing of LTM8068 internal circuitry is
required, the minimum metal to metal separation of the
primary and secondary is 0.75mm.
To reiterate, the manufacturer’s isolation voltage rating
and the required working or operational voltage are often
different numbers. In the case of the LTM8068, the iso-
lation voltage rating is established by 100% hi-pot test-
ing. The working or operational voltage is a function of
the end product and its system level specifications. The
actual required operational voltage is often smaller than
the manufacturer’s isolation rating.
The LTM8068 is a UL recognized component under
UL 60950, file number E464570. The UL 60950 insula-
tion category of the LTM8068 transformer is Functional.
Considering UL 60950 Table 2N and the gap distances
stated above, 3.03mm external and 0.75mm internal,
the LTM8068 may be operated with up to 250V working
voltage in a pollution degree 2 environment. The actual
working voltage, insulation category, pollution degree and
other critical parameters for the specific end application
depend upon the actual environmental, application and
safety compliance requirements. It is therefore up to the
user to perform a safety and compliance review to ensure
that the LTM8068 is suitable for the intended application.
VOUT2 Post Regulator
V
OUT2
is produced by a high performance low dropout
300mA regulator. At full load, its dropout is less than
430mV. Its output is set by applying a resistor from the
RFB2 pin to GND; the value of RFB2 can be calculated by
the equation:
RFB2 =
608.78
V
OUT2
–1.22 kΩ
LTM8068
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For more information www.linear.com/LTM8068
APPLICATIONS INFORMATION
VOUT2 Post Regulator Bypass Capacitance and Low
Noise Performance
The VOUT2 linear regulator may be used with the addition
of a 0.01μF bypass capacitor from VOUT to the BYP pin
to lower output voltage noise. A good quality low leak-
age capacitor, such as a X5R or X7R ceramic, is recom-
mended. This capacitor will bypass the reference of the
regulator
, lowering the output voltage noise to as low as
20µV
RMS
. Using a bypass capacitor has the added benefit
of improving transient response.
Safety Rated Capacitors
Some applications require safety rated capacitors, which
are high voltage capacitors that are specifically designed
and rated for AC operation and high voltage surges. These
capacitors are often certified to safety standards such
as UL 60950, IEC 60950 and others. In the case of the
LTM8068, a common application of a safety rated capaci-
tor would be to connect it from GND to VOUTN. To provide
maximum flexibility, the LTM8068 does not include any
components between GND and V
OUTN
. Any safety capaci-
tors must be added externally.
The specific capacitor and circuit configuration for any
application depends upon the safety requirements of the
system into which the LTM8068 is being designed. Table
2 provides a list of possible capacitors and their manufac-
turers. The application of a capacitor from GND to VOUTN
may also reduce the high frequency output noise on the
output.
Table 2. Safety Rated Capacitors
MANUFACTURER PART NUMBER DESCRIPTION
Murata
Electronics
GA343DR7GD472KW01L 4700pF, 250V AC,X7R,
4.5mm × 3.2mm
Capacitor
Johanson
Dielectrics
302R29W471KV3E-****-SC 470pF, 250V AC,X7R,
4.5mm × 2mm
Capacitor
Syfer Technology 1808JA250102JCTSP 100pF, 250V AC, C0G,
1808 Capacitor
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8068. The LTM8068 is neverthe-
less a switching power supply, and care must be taken to
minimize electrical noise to ensure proper operation. Even
with the high level of integration, you may fail to achieve
specified operation with a haphazard or poor layout. See
Figure1 for a suggested layout. Ensure that the grounding
and heat sinking are acceptable.
A few rules to keep in mind are:
1. Place the RFB1 and RFB2 resistors as close as possible
to their respective pins.
2. Place the C
IN
capacitor as close as possible to the V
IN
and GND connections of the LTM8068.
3. Place the COUT1 capacitor as close as possible to
VOUT1 and VOUTN. Likewise, place the COUT2 capaci-
tor as close as possible to VOUT2 and VOUTN.
4. Place the CIN and COUT capacitors such that their
ground current flow directly adjacent or underneath
the LTM8068.
8068 F01
RUN
FB2 BYP
FB1
LTM8058
COUT2
COUT1
VOUTN
VOUT2 VIN
VOUT1
CIN
THERMAL/INTERCONNECT VIAS
Figure1. Layout Showing Suggested External
Components, Planes and Thermal Vias
LTM8068
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For more information www.linear.com/LTM8068
APPLICATIONS INFORMATION
5. Connect all of the GND connections to as large a cop-
per pour or plane area as possible on the top layer.
Avoid breaking the ground connection between the
external components and the LTM8068.
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure1. The LTM8068 can benefit
from the heat sinking afforded by vias that connect
to internal GND planes at these locations, due to their
proximity to internal power handling components.
The optimum number of thermal vias depends upon
the printed circuit board design. For example, a board
might use very small via holes. It should employ more
thermal vias than a board that uses larger holes.
Minimum Load
Due to the nature of the flyback regulator in general, and
the LTM8068 control scheme specifically, the LTM8068
requires a minimum load for proper operation. Otherwise,
the output may go out of regulation if the load is too
light. The most common way to address this is to place a
resistor across the output. The Minimum Load Current vs
VOUT Over Full Output Voltage Range graph in the Typical
Performance Characteristics section of may be used as
a guide in selecting the resistor. Note that this graph
describes room temperature operation. If the end appli-
cation operates at a colder temperature, the minimum
load requirement may be higher and the minimum load
condition must be characterized for the lowest operating
temperature.
If it is impractical to place a resistive load permanently
across the output, a resistor and Zener diode may be
used instead, as shown in Figure 2. While the minimum
load resistor mentioned in the prior paragraph will always
draw current while the LTM8068 output is powered, the
series resistor-Zener diode combination will only draw
current if the output is too high. When using this circuit,
take care to ensure that the characteristics of the Zener
diode are appropriate for the intended application’s tem-
perature range.
Figure 2: Use a Resistor and Zener Diode to Meet
the Minimum Load Requirement
LTM8068
VOUTP
VOUTN
8068 F02
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of the LTM8068. However, these capaci-
tors can cause problems if the LTM8068 is plugged into
a live supply (see Linear Technology Application Note 88
for a complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an underdamped tank circuit, and the volt-
age at the VIN pin of the LTM8068 can ring to more than
twice the nominal input voltage, possibly exceeding the
LTM8068’s rating and damaging the part. If the input
supply is poorly controlled or the user will be plugging
the LTM8068 into an energized supply, the input network
should be designed to prevent this overshoot. This can be
accomplished by installing a small resistor in series to V
IN
,
but the most popular method of controlling input voltage
overshoot is adding an electrolytic bulk capacitor to the
VIN net. This capacitor’s relatively high equivalent series
resistance damps the circuit and eliminates the voltage
overshoot. The extra capacitor improves low frequency
ripple filtering and can slightly improve the efficiency of the
circuit, though it can be a large component in the circuit.
Thermal Considerations
The LTM8068 output current may need to be derated if
it is required to operate in a high ambient temperature.
The amount of current derating is dependent upon the
input voltage, output power and ambient temperature. The
temperature rise curves given in the Typical Performance
Characteristics section can be used as a guide. These
curves were generated by the LTM8068 mounted to
a 58cm2 4-layer FR4 printed circuit board. Boards of
other sizes and layer count can exhibit different thermal
behavior, so it is incumbent upon the user to verify proper
LTM8068
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For more information www.linear.com/LTM8068
APPLICATIONS INFORMATION
operation over the intended system’s line, load and envi-
ronmental operating conditions.
For increased accuracy and fidelity to the actual applica-
tion, many designers use FEA to predict thermal perfor-
mance. To that end, the Pin Configuration section of the
data sheet typically gives four thermal coefficients:
θ
JA: Thermal resistance from junction to ambient
θ
JCbottom
: Thermal resistance from junction to the
bottom of the product case
θ
JCtop: Thermal resistance from junction to top of the
product case
θ
JCboard: Thermal resistance from junction to the
printed circuit board.
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confu-
sion and inconsistency. These definitions are given in
JESD 51-12, and are quoted or paraphrased as follows:
θJA is the natural convection junction-to-ambient air
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to
as still air although natural convection causes the air to
move. This value is determined with the part mounted to a
JESD 51-9 defined test board, which does not reflect an
actual application or viable operating condition.
θJCbottom is the junction-to-board thermal resistance with
all of the component power dissipation flowing through
the bottom of the package. In the typical µModule con-
verter, the bulk of the heat flows out the bottom of the
package, but there is always heat flow out into the ambient
environment. As a result, this thermal resistance value
may be useful for comparing packages but the test condi-
tions don’t generally match the user’s application.
θJCtop is determined with nearly all of the component
power dissipation flowing through the top of the pack-
age. As the electrical connections of the typical µModule
converter are on the bottom of the package, it is rare for
an application to operate such that most of the heat flows
from the junction to the top of the part. As in the case of
θJCbottom, this value may be useful for comparing pack-
ages but the test conditions don’t generally match the
user’s application.
θ
JCboard
is the junction-to-board thermal resistance where
almost all of the heat flows through the bottom of the
µModule converter and into the board, and is really the
sum of the θ
JCbottom
and the thermal resistance of the
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a two-sided,
two-layer board. This board is described in JESD 51-9.
Given these definitions, it should now be apparent that
none of these thermal coefficients reflects an actual physi-
cal operating condition of a µModule converter. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
A graphical representation of these thermal resistances
is given in Figure 3.
The blue resistances are contained within the µModule
converter, and the green are outside.
The die temperature of the LTM8068 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8068. The bulk of the heat flow out of the LTM8068
is through the bottom of the module and the BGA pads
into the printed circuit board. Consequently a poor printed
circuit board design can cause excessive heating, result-
ing in impaired performance or reliability. Please refer to
the PCB Layout section for printed circuit board design
suggestions.
LTM8068
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For more information www.linear.com/LTM8068
TYPICAL APPLICATIONS
12V Flyback Converter with Low Noise Bypass
3.3V Flyback Converter VOUT2 Maximum Load Current vs VIN
VOUT2 Maximum Load Current vs VIN
V
IN
(V)
0
10
20
30
40
50
150
250
350
LOAD CURRENT (mA)
8068 TA02b
V
IN
(V)
0
8
16
24
32
50
100
150
200
250
LOAD CURRENT (mA)
8068 TA03b
VOUT2
FB2
VOUTN
LTM8068
294k
8068 TA02a
(3.9V)
VOUT2
3.3V
300mA MAX
10µF
VOUT1
VIN
RUN
GND
FB1
PIN BYP IS NOT USED IN THIS SCHEMATIC
10.5k
2.2µF
VIN
2.8V TO 40V
LOW
NOISE
LDO
•
•47µF
VOUT2
FB2
BYP
VOUTN
LTM8068
56.2k
0.01µF
8068 TA03a
(12.7V)
VOUT2
12V
240mA MAX
22µF
VOUT1
VIN
RUN
GND
FB1
3.32k
4.7µF
VIN
2.8V TO 32V
LOW
NOISE
LDO
•
•10µF
Figure 3. Approximate Thermal Model of LTM8068
8068 F03
µMODULE DEVICE
JUNCTION-TO-CASE (TOP)
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
CASE (TOP)-TO-AMBIENT
RESISTANCE
BOARD-TO-AMBIENT
RESISTANCE
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
JUNCTION
AMBIENT
CASE (BOTTOM)-TO-BOARD
RESISTANCE
APPLICATIONS INFORMATION
LTM8068
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For more information www.linear.com/LTM8068
PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION
A1 VOUT2 B1 VOUT2 C1 - D1 - E1 GND F1 - G1 VIN H1 VIN
A2 FB2 B2 BYP C2 - D2 - E2 GND F2 - G2 VIN H2 VIN
A3 VOUTN B3 VOUTN C3 - D3 - E3 GND F3 RUN G3 - H3 -
A4 VOUTN B4 VOUTN C4 - D4 - E4 GND F4 GND G4 GND H4 GND
A5 VOUTN B5 VOUTN C5 - D5 - E5 GND F5 GND G5 GND H5 GND
A6 VOUT1 B6 VOUT1 C6 - D6 - E6 GND F6 GND G6 GND H6 GND
A7 VOUT1 B7 VOUT1 C7 - D7 - E7 GND F7 GND G7 FB1 H7 GND
Pin Assignment Table
(Arranged by Pin Number)
PACKAGE DESCRIPTION
PACKAGE PHOTO
LTM8068
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For more information www.linear.com/LTM8068
PACKAGE DESCRIPTION
5. PRIMARY DATUM -Z- IS SEATING PLANE
6. SOLDER BALL COMPOSITION IS 96.5% Sn/3.0% Ag/0.5% Cu
7 PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY
!
PACKAGE TOP VIEW
4
PIN “A1”
CORNER
YX
aaa Z
aaa Z
DETAIL A
PACKAGE BOTTOM VIEW
3
SEE NOTES
H
G
F
E
D
C
B
A
1234567
PIN 1
BGA 38 1212 REV A
TRAY PIN 1
BEVEL PACKAGE IN TRAY LOADING ORIENTATION
COMPONENT
PIN “A1”
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
2. ALL DIMENSIONS ARE IN MILLIMETERS
BALL DESIGNATION PER JESD MS-028 AND JEP95
4
3
DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
DETAIL A
Øb (38 PLACES)
DETAIL B
SUBSTRATE
0.27 – 0.37
3.95 – 4.05
// bbb Z
A
A1
b1
ccc Z
DETAIL B
PACKAGE SIDE VIEW
MOLD
CAP
Z
MX YZddd
MZeee
SYMBOL
A
A1
A2
b
b1
D
E
e
F
G
aaa
bbb
ccc
ddd
eee
MIN
4.72
0.50
4.22
0.60
0.60
NOM
4.92
0.60
4.32
0.75
0.63
11.25
9.0
1.27
8.89
7.62
MAX
5.12
0.70
4.42
0.90
0.66
0.15
0.10
0.20
0.30
0.15
NOTES
DIMENSIONS
TOTAL NUMBER OF BALLS: 38
A2
D
E
e
b
F
G
SUGGESTED PCB LAYOUT
TOP VIEW
0.000
0.635
1.905
0.635
3.175
1.905
4.445
3.175
4.445
3.810
2.540
1.270
3.810
2.540
1.270
0.3175
0.3175
0.000
4.1275
4.7625
LTMXXXXXX
µModule
BGA Package
38-Lead (11.25mm × 9.00mm × 4.92mm)
(Reference LTC DWG # 05-08-1925 Rev A)
7
SEE NOTES
Please refer to http://www.linear.com/product/LTM8068#packaging for the most recent package drawings.
LTM8068
19
8068fb
For more information www.linear.com/LTM8068
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 05/16 Corrected symbol of internal switch on Block Diagram from NPN transistor to N-channel MOSFET 9
B 07/17 Added Minimum Load section 14
LTM8068
20
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For more information www.linear.com/LTM8068
LINEAR TECHNOLOGY CORPORATION 2016
LT 0717 REV B • PRINTED IN USA
www.linear.com/LTM8068
RELATED PARTS
TYPICAL APPLICATION
3.3V, 2.5V Dual Output Converter with Low Noise Bypass Maximum Load Current vs VIN
V
OUT2
V
OUT1
V
IN
(V)
0
8
16
24
32
100
200
300
400
LOAD CURRENT (mA)
8068 TA04b
VOUT2
FB2
BYP
VOUTN
LTM8068
487k
0.01µF
8068 TA04a
VOUT2
2.5V
300mA MAX
VOUT1
3.3V
10µF
VOUT1
VIN
RUN
GND
FB1
11.8k
2.2µF
VIN
2.8V TO 40V
LOW
NOISE
LDO
•
•100µF
DESIGN RESOURCES
Part Number Description Comments
LTM8067 2kVAC Isolated µModule Converter 2.8V≤VIN≤40V, 2.5V≤VOUT≤24V, UL60950 Recognized
LTM8047 725VDC, 1.5W Isolated µModule Converter 3.1V≤VIN≤32V, 2.5V≤VOUT≤12V
LTM8048 725VDC, 1.5W Isolated µModule Converter with
LDO Post Regulator
3.1V≤VIN≤32V, 1.2V≤VOUT≤12V; 20µVRMS Output Ripple
LTM8045 Inverting or SEPIC µModule DC/DC Converter 2.8V≤VIN≤18V, 2.5V≤VOUT≤15V or –2.5V≤VOUT≤–15V, Up to 700mA
LT
®
8300 Isolated Flyback Converter with 100VIN, 150V/260mA
Power Switch
6V≤VIN≤100V, No Opt-Isolator Required
LT8301 Isolated Flyback Converter with 65V/1.2A Power Switch 2.7V≤VIN≤42V, No Opt-Isolator Required
LT8302 Isolated Flyback Converter with 65V/3.6A Power Switch 2.8V≤VIN≤42V, No Opt-Isolator Required
SUBJECT DESCRIPTION
µModule Design and Manufacturing Resources Design:
• Selector Guides
• Demo Boards and Gerber Files
• Free Simulation Tools
Manufacturing:
• Quick Start Guide
• PCB Design, Assembly and Manufacturing Guidelines
• Package and Board Level Reliability
µModule Regulator Products Search 1. Sort table of products by parameters and download the result as a spread sheet.
2. Search using the Quick Power Search parametric table.
TechClip Videos Quick videos detailing how to bench test electrical and thermal performance of µModule products.
Digital Power System Management Linear Technology’s family of digital power supply management ICs are highly integrated solutions that
offer essential functions, including power supply monitoring, supervision, margining and sequencing,
and feature EEPROM for storing user configurations and fault logging.
