TDA7295S
80V - 80W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY
VERY HIGH OPERATING VOLTAGE RANGE
(±40V)
DMOS POWER STAGE
HIGH OUTPUT POWER (80W @ THD = 10%,
MUSIC POWER)
MUTI N G/STAND-BY FUNC TION S
NO SWITCH ON/OFF NOISE
VERY LOW DISTORTION
VERY LOW NOISE
SHORT CIR C U IT PROTECTION
THERMA L SHUTDOW N
CLIP DETECTOR
MODULARITY (MORE DEVICES CAN BE
EASILY CONNECTED IN PARALLEL TO
DRIVE VERY LOW IMPEDANCES)
DESCRIPTION
The TDA7295S is a monolithic integrated circuit
in Multiwatt15 package, intended for use as audio
class AB amplifier in Hi-Fi field applications
(Home Stereo, self powered loudspeakers, Top-
class TV). Thanks to the wide voltage range and
to t he high out current capability it is able to sup-
ply the highest power into both 4 and 8 loads.
The built in muting function with turn on delay
simplifies the remote operation avoiding switching
on-off noises.
Parallel mode is made possible by connecting
more device through of pin11. High output power
can be delivered to very low impedance loads, so
optimizing the thermal dissipation of the s ystem.
January 2003
®
IN- 2
R2
680
C2
22µF
C1 470nF IN+
R1 22K
3
R3 22K
-
+
MUTE
STBY
4
VMUTE
VSTBY
10
9
SGND
MUTE
STBY
R4 22K
THERMAL
SHUTDOWN S/C
PROTECTION
R5 10K
C3 10µF C4 10µF
1
STBY-GND
C5
22µF
713
14
6
158
-Vs -PWVs
BOOTSTRAP
OUT
+PWVs+Vs
C9 100nF C8 1000µF
-Vs
D97AU805A
+Vs
C7 100nF C6 1000µF
BUFFER DRIVER
11
BOOT
LOADER
12
5VCLIP
CLIP DET
(*)
(*) see Application note
(**) for SLAVE function
(**)
Figure 1: Typical Application and Test Circuit
Multiwatt15
ORDERING NUMBER: TDA7295S
MULTIPOWER BCD TECHNOLOGY
1/13
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ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VSSupply Voltage (No Signal) ±42 V
V1VSTAND-BY GND Voltage Referred to -VS (pin 8) 80 V
V2Input Voltage (inverting) Referred to -VS 80 V
V2 - V3Maximum Differential Inputs ±30 V
V3Input Voltage (non inverting) Referred to -VS 80 V
V4Signal GND Voltage Referred to -VS 80 V
V5Clip Detector Voltage Referred to -VS 80 V
V6Bootstrap Voltage Referred to -VS 80 V
V9Stand-by Voltage Referred to -VS 80 V
V10 Mute Voltage Referred to -VS 80 V
V11 Buffer Voltage Referred to -VS 80 V
V12 Bootstrap Loader Voltage Referred to -VS 80 V
IOOutput Peak Current 10 A
Ptot Power Dissipation Tcase = 70°C50W
T
op Operating Ambient Temperature Range 0 to 70 °C
Tstg, TjStorage and Junction Temperature 150 °C
1
2
3
4
5
6
7
9
10
11
8
BUFFER DRIVER
MUTE
STAND-BY
-V
S
(SIGNAL)
+V
S
(SIGNAL)
BOOTSTRAP
CLIP AND SHORT CIRCUIT DETECTOR
SIGNAL GROUND
NON INVERTING INPUT
INVERTING INPUT
STAND-BY GND
TAB CONNECTED TO PIN 8
13
14
15
12
-V
S
(POWER)
OUT
+V
S
(POWER)
BOOTSTRAP LOADER
D97AU806
PIN C ONNECTION (Top view)
QUICK REFERENCE DATA
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VSSupply Voltage Operating ±12 ± 40 V
GLOOP Closed Loop Gain 26 45 dB
Ptot Output Power VS = ±34V; RL = 8; THD = 10% 80 W
VS = ±27V; RL = 4; THD = 10% 80 W
SVR Supply Voltage Rejection 75 dB
THERMAL DATA
Symbol Description Typ Max Unit
Rth j-case Thermal Resistance Junction-case 1 1.5 °C/W
TDA7295S
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ELECTRICA L CHARACTERI STICS (Refer to the Test Circuit VS = ±30V, RL = 8, GV = 30dB;
Rg = 50 ; Tamb = 25°C , f = 1 kHz; unless otherwise specified).
Symbol Parameter Test Condition Min. Typ. Max. Unit
VSOperating Supply Range ±10 ±40 V
IqQuiescent Current 20 30 65 mA
IbInput Bias Current 500 nA
VOS Input Offset Voltage ±10 mV
IOS Input Offset Current ±100 nA
PORMS Continuous Output Power d = 0.5%:
VS = ± 30V, RL = 8
VS = ± 26V, RL = 6
VS = ± 22V, RL = 4
45
45
45
50
50
50
W
W
W
Music Power (RMS) (*)
t = 1s d = 10%;
RL = 8; VS = ±34V
(***)RL = 4; VS = ±27V 80
80 W
W
d Total Harmonic Distortion (**) PO = 5W; f = 1kHz
PO = 0.1 to 30W; f = 20Hz to 20kHz 0.005 0.1 %
%
VS = ±22V, RL = 4Ω:
PO = 5W; f = 1kHz
PO = 0.1 to 30W; f = 20Hz to 20kHz 0.01 0.1 %
%
IMAX Overcurrent Protection Threshold 6 A
SR Slew Rate 7 10 V/µs
GVOpen Loop Voltage Gain 80 dB
GVClosed Loop Voltage Gain 26 30 45 dB
eNTotal Input Noise A = curve
f = 20Hz to 20kHz 1
25
µ
V
µ
V
f
L
, fHFrequency Response (-3dB) PO = 1W 20Hz to 20kHz
RiInput Resistance 100 k
SVR Supply Voltage Rejection f = 100Hz; Vripple = 0.5Vrms 60 75 dB
TSThermal Shutdown 150 °C
STAND-BY FUNCTION (Ref: -VS or GND)
VST on Stand-by on Threshold 1.5 V
VST off Stand-by off Threshold 3.5 V
ATTst-by Stand-by Attenuation 70 90 dB
Iq st-by Quiescent Current @ Stand-by 1 3 mA
MUTE FUNCTION (Ref: -VS or GND)
VMon Mute on Threshold 1.5 V
VMoff Mute off Threshold 3.5 V
ATTmute Mute Attenuation 60 80 dB
No te (* ):
MUSIC POWER is the maximal power which the amplifier is capable of producing across the rated load resistance (regardless of non linearity)
1 sec after the application of a sinusoidal i nput signal of frequency 1KHz .
No te (* *) : Tested with optimized Application Board (see fig. 2)
No te (* **) : Limited by the max. allowable out current
TDA7295S
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Figure 2: Typical Application P.C. Board and Component Layout (scale 1:1)
TDA7295S
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APPLICATION SUGGES TION S (see Test and Application Circuits of the Fig. 1)
The rec ommended values of the external components ar e those s hown on t he application circuit of Fig-
ure 1. Different values can be used; the following table can help the designer.
COMPONENTS SUGGESTED VALUE PURPOSE LARGER THAN
SUGGESTED SMALLER THAN
SUGGESTED
R1 (*) 22k INPUT RESISTANCE INCREASE INPUT
IMPEDANCE DECREASE INPUT
IMPEDANCE
R2 680CLOSED LOOP GAIN
SET TO 30dB (**) DECREASE OF GAIN INCREASE OF GAIN
R3 (*) 22k INCREASE OF GAIN DECREASE OF GAIN
R4 22k ST-BY TIME
CONSTANT LARGER ST-BY
ON/OFF TIME SMALLER ST-BY
ON/OFF TIME;
POP NOISE
R5 10k MUTE TIME
CONSTANT LARGER MUTE
ON/OFF TIME SMALLER MUTE
ON/OFF TIME
C1 0.47µF INPUT DC
DECOUPLING HIGHER LOW
FREQUENCY
CUTOFF
C2 22µF FEEDBACK DC
DECOUPLING HIGHER LOW
FREQUENCY
CUTOFF
C3 10µF MUTE TIME
CONSTANT LARGER MUTE
ON/OFF TIME SMALLER MUTE
ON/OFF TIME
C4 10µF ST-BY TIME
CONSTANT LARGER ST-BY
ON/OFF TIME SMALLER ST-BY
ON/OFF TIME;
POP NOISE
C5 22µFXN (***) BOOTSTRAPPING SIGNAL
DEGRADATION AT
LOW FREQUENCY
C6, C8 1000µF SUPPLY VOLTAGE
BYPASS
C7, C9 0.1µF SUPPLY VOLTAGE
BYPASS DANGER OF
OSCILLATION
(*) R1 = R3 for pop optimization
(** ) Closed Loop Gain has to be 26dB
(** *) Multiply this value for the number of modular part connected
MASTER
UNDEFINED
SLAVE
-V
S
+3V
-V
S
+1V
-V
S
D98AU821
Slave functi on: pin 4 (Ref to pin 8 -VS)Note:
If in the application, the speakers are connected
via long wires, it is a good rule to add between
the output and GND, a Boucherot Cell, in order to
avoid dangerous spurious oscillations when the
speakers terminal are shorted.
The suggested Boucherot Resistor is 3.9/2W
and the capacitor is 1µF.
TDA7295S
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INTRODUCTION
In consumer electronics, an increasing demand
has arisen for very high power monolithic audio
amplifiers able to match, with a low cost, the per-
formance obtained from the best discrete de-
signs.
The task of realizing this linear integrated circuit
in conventional bipolar technology is made ex-
tremely difficult by the occurence of 2nd break-
down phoenomenon. It limits the safe operating
area (SOA) of the power devices, and, as a con-
sequence, the maximum attainable output power,
especially in presenc e of highly reactive loads.
Moreover, full exploitation of the SOA translates
into a substantial increase in circuit and layout
complexity due to the need of sophisticated pro-
tection circuits.
To overcome these substantial drawbacks, the
use of power MOS devices, which are immune
from secondar y breakdown is highly desirable.
The device described has therefore been devel-
oped in a mixed bipolar-MOS high voltage tech-
nology called BCDII 100.
1) Output Stage
The main des ign task in developping a po wer op-
erational amplifier, independently of the technol-
ogy used, is that of realization of the output stage.
The solution shown as a principle shematic by
Fig3 represents the DMOS unity - gain output
buffer of the TDA7295S.
This large-signal, high-power buffer must be ca-
pable of handling extrem ely high current and volt-
age levels while maintaining acceptably low har-
monic distortion and good behaviour over
frequency response; moreover, an accurate con-
trol of quiescent curr ent is required.
A local linearizing feedback, provided by differen-
tial amplifier A, is used to fullf il the above require-
ments, allowing a simple and effective quiescent
current setting.
Proper biasing of the power output transistors
alone is however not enough to guarantee the ab-
sence of crossover distort ion.
While a linearization of the DC transfer charac-
teristic of the stage is obtained, the dynamic be-
haviour of the system must be taken into account.
A significant aid in keeping the distortion contrib-
uted by the final stage as low as possible is pro-
vided by the compensation scheme, which ex-
ploits the direct connection of the Miller capacitor
at the amplifier’s output to introduce a local AC
feedback path enclosing the output stage itself.
2) Protections
In designing a power IC, particular attention must
be reserved to the circuits devoted to protection
of the device from short circuit or overload condi-
tions.
Due to the absence of the 2nd breakdown phe-
nomenon, the SOA of the power DMOS transis-
tors is delimited only by a maximum dissipation
curve dependent on the duration of the applied
stimulus.
In order to fully exploit the capabilities of the
power transistors, the protection scheme imple-
mented in this device combines a conventional
SOA prot ect ion circuit with a novel local temper a-
ture sensing technique which " dynamically" con-
trols the maximum dissipation.
Figure 3: Principle Schematic of a DMOS unity -gain buffer.
TDA7295S
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In addition to the overload protection described
above, the device features a thermal shutdown
circuit which initially puts the device into a mut ing
state (@ Tj = 150 oC) and then into stand-by (@
Tj = 160 oC).
Full protection against electrostatic discharges on
every pin is included.
3) Other Feat ures
The device is provided with both stand-by and
mute functions, independently driven by two
CMOS logic compatible input pins.
The circuits dedicated t o the switching on and off
of the amplifier have been carefully optimized to
avoid any kind of unc ontrolled audible transient at
the output.
The sequence that we recommend during the
ON/OFF t ransient s is shown by Figure 4.
The application of figure 5 shows the possibility of
using only one command f or bot h st -by and mute
functions. On both the pins, the maximum appli-
cable range corresponds to the operating supply
voltage.
APPLICATION INFORMATION
HIGH-EFFICIENCY
Constraints of implementing high power solutions
are the power dissipation and the size of the
power supply. These are both due to the low eff i-
ciency of conventional AB class amplifier ap-
proaches.
Here below (figure 6) is described a circuit pro-
posal for a high efficiency amplifier which can be
adopted for both HI-FI and CAR-RADIO applica-
tions.
1N4148
10K 30K
20K
10µF10µF
MUTE STBY
D93AU014
MUTE/
ST-BY
Figure 5: Single Signal ST-BY/MUTE Control
Circuit
PLAY
OFF
ST-BY
MUTE MUTE
ST-BY OFF
D98AU817
5V
5V
+Vs
(V)
+40
-40
VMUTE
PIN #10
(V)
VST-BY
PIN #9
(V)
-Vs
VIN
(mV)
IQ
(mA)
VOUT
(V)
Figure 4: Turn ON/OFF Suggested Sequence
TDA7295S
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The TDA7295S is a monolithic MOS power ampli-
fier whic h can be operated at 76V supply voltage
(80V with no signal applied) while delivering out-
put currents up to ±6A.
This allows the use of this device as a very high
power amplifier (up to 80W as peak power with
T.H.D.=10 % and Rl = 4 Ohm); the only drawback
is the power dissipation, hardly manageable in
the above power range.
The typical junction-to-case thermal resistance of
the TDA7295S is 1 oC/W (max= 1.5 oC/W). To
avoid that, in worst case conditions, the chip tem-
perature exceedes 150 oC, the thermal resistance
of t he heatsink must be 0.038 oC/W (@ max am-
bient temperature of 50 oC).
As the above value is pratically unreachable; a
high efficiency system is needed in those cases
where the continuous RMS output power is higher
than 50-60 W.
The TDA7295S was designed to work also in
higher efficiency way.
For this reason there are four power supply pins:
two intended for the signal part and two for the
power part.
T1 and T2 are two power transistors that only
operate when the output power reaches a cert ain
threshold (e.g. 20 W). If the output power in-
creases, these transistors are switched on during
the portion of the signal where more output volt-
age swing is needed, thus "bootstrapping" the
power supply pins (#13 and #15).
The current generators formed by T4, T7, zener
diodes Z1, Z2 and resistors R7,R8 define the
minimum drop across the power MOS transistors
of the TDA7295S. L1, L2, L3 and the snubbers
C9, R1 and C10, R2 s tabilize the loops formed by
the "bootstrap" circuits and the output s tage of the
TDA7295S.
By considering again a maximum average
output power (music signal) of 20W, in case
of the high efficiency application, the thermal
resistance value needed from the heatsink is
2.2oC/W (Vs =±40V and Rl= 8 Ohm).
All components (TDA7295S and power tran-
sistors T1 and T2) can be placed on a
1.5oC/W heatsink, with the power darlingtons
electrically insulated from the heats ink.
Since the total power dissipation is less than that
of a usual c lass AB amplifier, additiona l cost sav-
ings can be obtained while optimizing the power
supply, even with a high heatsink .
BRIDGE APPLICA TION
Another application suggestion is the BRIDGE
configurat ion, where two TDA7295S are used.
In this application, the value of the load must not
be lower than 8 Ohm for dissipation and current
capability reasons.
A suitable field of application includes HI-FI/TV
subwoofers realizations.
The main advant ages offered by this solution are:
- High power performances with limited s upply
volt age level.
- Considerably high output power even with high
load values (i.e. 16 Ohm).
With Rl = 8 Ohm, VS = ±25V the max imum out put
power obtainable is 150W (Music Power)
APPLICATION NOTE: (ref. fig. 7)
Modular Application (more Devices in Parallel)
The use of the modular application lets very high
power be deliver ed to very low im pedance loads.
The modular application implies one device to act
as a master and the others as slaves.
The slave power stages are driven by the master
device and work in parallel all together, while the
input and the gain stages of the slave device are
disabled, the f igure below shows the connections
required to configure two devices to work to-
gether.
The master chip connections are the same as
the normal single ones.
The outputs can be connected together with-
out t he need of any ballast resistance.
The slave SGND pin must be tied to the nega-
tive supply.
The slave ST-BY pin must be connected to
ST-BY pin.
The bootstrap lines must be connected to-
gether and the boot st rap capacitor must be in-
creased: for N devices the boostrap capacitor
must be 22µF times N.
The slave Mute and IN-pins must be grounded.
THE BOOTSTRAP CAPACITOR
For compatibility purpose with the previous de-
vices of the family, the boostrap capacitor can be
connected both between the bootstrap pin (6) and
the output pin (14) or between the boostrap pin
(6) and the bootstrap loader pin (12) .
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3
1
4
137
815
2
14
6
10
R3 680 C11 22µF
L3 5µH
R18 270
R16
13K
C15
22µF
9
R12
13K
C13 10µF
R13 20K
C12 330nF
R15 10K
C14
10µF
R14 30K
D5
1N4148
PLAY
ST-BY
R17 270
L1 1µH
T1
BDX53A
T3
BC394
D3 1N4148
R4
270 R5
270
T4
BC393 T5
BC393
R6
20K
R7
3.3K C16
1.8nF
R8
3.3K C17
1.8nF
Z2 3.9V
Z1 3.9V
L2 1µH
R19 270
D4 1N4148
D2 BYW98100
R1
2
R2
2
C9
330nF
C10
330nF
T2
BDX54A T6
BC393
T7
BC394 T8
BC394
R9
270 R10
270 R11
20K
OUT
INC7
100nF
C5
1000µF
35V
C8
100nF
C6
1000µF
35V
C1
1000µF
63V
C2
1000µF
63V
C3
100nF
C4
100nF
+50V
+25V D1 BYW98100
GND
-25V
-50V
D97AU807C
12
D6
1N4001
R20
20K
R21
20K
D7
1N4001
R22
10K
R23
10K
P
ot
Figure 6: High Efficiency Application Circuit
Figure 6a: PCB and Component Layout of the fig. 6
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IN- 2
R2
680
C2
22µF
C1 470nF IN+
R1 22K
3
R3 22K
-
+
MUTE
STBY
4
10
9
SGND
MUTE
STBY
R4 22K
THERMAL
SHUTDOWN S/C
PROTECTION
R5 10K
C3 10µF
C4 10µF
1
STBY-GND
C5
47µF
713
14
6
158
-Vs -PWVs
BOOTSTRAP
OUT
+PWVs+Vs
C9 100nF C8 1000µF
-Vs
D97AU808C
+Vs
C7 100nF C6 1000µF
BUFFER
DRIVER
11
BOOT
LOADER
12
IN- 2
IN+ 3
-
+
MUTE
STBY
4
10
9
SGND
MUTE
THERMAL
SHUTDOWN S/C
PROTECTION
1
STBY-GND
713
14
6
158
-Vs -PWVs
BOOTSTRAP
OUT
+PWVs+Vs
C9 100nF C8 1000µF
-Vs
+Vs
C7 100nF C6 1000µF
BUFFER
DRIVER
11
BOOT
LOADER
12
5CLIP DET
5
MASTER
SLAVE
C10
100nF
R7
2
VMUTE
VSTBY
STBY
Figure 7: Modular Application Circuit
Figure 6b: PCB - Solder Side of the fig. 6.
TDA7295S
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Figure 8b: Modular Application P.C. Board and Component Layout (scale 1:1) (S older SIDE)
Figure 8a: Modular Application P.C. Board and Component Layout (scale 1:1) (Component SIDE)
TDA7295S
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Multiwatt15 V
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 5 0.197
B 2.65 0.104
C 1.6 0.063
D 1 0.039
E 0.49 0.55 0.019 0.022
F 0.66 0.75 0.026 0.030
G 1.02 1.27 1.52 0.040 0.050 0.060
G1 17.53 17.78 18.03 0.690 0.700 0.710
H1 19.6 0.772
H2 20.2 0.795
L 21.9 22.2 22.5 0.862 0.874 0.886
L1 21.7 22.1 22.5 0.854 0.870 0.886
L2 17.65 18.1 0.695 0.713
L3 17.25 17.5 17.75 0.679 0.689 0.699
L4 10.3 10.7 10.9 0.406 0.421 0.429
L7 2.65 2.9 0.104 0.114
M 4.25 4.55 4.85 0.167 0.179 0.191
M1 4.63 5.08 5.53 0.182 0.200 0.218
S 1.9 2.6 0.075 0.102
S1 1.9 2.6 0.075 0.102
Dia1 3.65 3.85 0.144 0.152
OUTLINE AND
MECHANICAL DATA
TDA7295S
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Infor mation furni shed is bel ieved to be ac curate and reliabl e. Howev er, STMicroel ectr onics assum es no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
grante d by implication or other wise under any paten t or patent righ ts of STMicroelectronics. Specifica tion mentioned in this publication are
subj ect to change without notic e. This public ation supers edes and rep laces all informat ion p reviously supplied. STMic roelec tronic s products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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