HN27C4096ACP Series 262144-word x 16-bit CMOS One Time Programmable ROM ADE-203-240B (Z) Rev. 2.0 Jun. 22, 1995 Description The Hitachi HN27C4096ACP is a 4-Mbit one time programmable ROM, featuring high speed and low power dissipation. Fabricated on advanced fine process and high speed circuitry technique, the HN27C4096ACP makes high speed access time possible. Therefore, it is suitable for 16-bit microcomputer systems using high speed microcomputer such as the 80286 and 68020. The HN27C4096ACP offers high speed programming using page programming mode. This device is packaged in a 44-pin plastic leaded chip carrier (PLCC). Therefore, this device cannot be rewritten. Features * High speed Access time: 120 ns/150 ns (max) * Low power dissipation Standby mode: 5 W (typ) Active mode: 35 mW/MHz (typ) * Fast high reliability page programming, fast high-reliability programming and option programming Programming voltage: +12.5 V D.C. Program time: 3.5 sec (min) (Theoretical in Page programming) * Inputs and outputs TTL compatible during both read and program modes * Pin arrangement: 44-pin PLCC JEDEC standard * Device identifier mode: Manufacturer code and device code * Fully compatible with the HN27C4096CP Series Ordering Information Type No. Access Time Package HN27C4096ACP-12 HN27C4096ACP-15 120 ns 150 ns 44-pin PLCC (CP-44) HN27C4096ACP Series Pin Arrangement NC 2 1 44 43 42 41 40 A14 V PP 3 A15 CE 4 A16 I/O15 5 A17 I/O14 6 VCC I/O13 HN27C4096ACP Series I/O12 7 39 A13 I/O11 8 38 A12 I/O10 9 37 A11 I/O9 10 36 A10 I/O8 11 35 A9 VSS 12 34 V SS NC 13 33 NC I/O7 14 32 A8 I/O6 15 31 A7 I/O5 16 30 A6 I/O4 17 29 A5 (Top View) Pin Description Pin Name Function A0 - A17 Address I/O0 - I/O15 Input/output CE Chip enable OE Output enable VCC Power supply VPP Programming power supply VSS Ground 2 A4 A3 A2 A1 A0 NC OE I/O0 I/O1 I/O2 I/O3 18 19 20 21 22 23 24 25 26 27 28 HN27C4096ACP Series Block Diagram A7 ............ 2048 x 2048 X-Decoder Memory Matrix A17 I/O0 .... Input Data Control I/O15 Y-Gating Y-Decoder CE OE H A0 ............ A6 VCC VPP H VSS H : High Threshold Inverter 3 HN27C4096ACP Series Mode Selection Mode CE (3) OE (22) A9 (35) VPP (2) Pin VCC (44) I/O (4 - 11, 14 - 21) Read VIL VIL X VSS - VCC VCC Dout Output disable VIL VIH X VSS - VCC VCC High-Z Standby VIH X Page program Word program Page program set VIH X VSS - VCC VCC High-Z VH *2 X VPP VCC High-Z *2 X VPP VCC Din Page data latch VIL VH Page program VIL VIH X VPP VCC High-Z Page program verify VIH VIL X VPP VCC Dout Page program reset VIH VIH X VCC VCC High-Z Program VIL VIH X VPP VCC Din Program verify VIH VIL X VPP VCC Dout Optional verify VIL VIL X VPP VCC Dout Program inhibit VIH VIH X VPP VCC High-Z VSS - VCC VCC Code Identifier VIL VIL VH *2 Notes: 1. X: Don't care. 2. VH : 12.0 V 0.5 V Absolute Maximum Ratings Parameter All input and output voltages Symbol Vin, Vout Value Unit Notes *2 V 1, 2 *2 -0.6 to +7.0 Voltage on pin A9 and OE VID -0.6 to +13.0 V 2 VPP voltage VPP -0.6 to +13.5 V 1 VCC voltage VCC -0.6 to +7.0 V 1 Operating temperature range Topr 0 to +70 C Storage temperature range Tstg -55 to +125 C Storage temperature under bias Tbias -20 to +80 C Notes: 1. Relative to VSS . 2. Vin, Vout, V ID min = -2.0 V for pulse width 20 ns. 3. Storage temperature range of device before programming. 4 3 HN27C4096ACP Series Capacitance (Ta = 25C, f = 1 MHz) Parameter Symbol Min Typ Max Unit Test Conditions Input capacitance Cin -- -- 12 pF Vin = 0 V Output capacitance Cout -- -- 20 pF Vout = 0 V Read Operation DC Characteristics (VCC = 5 V 10%, VPP = VSS to VCC, Ta = 0 to +70C) Parameter Symbol Min Typ Max Unit Test Conditions Input leakage current I LI -- -- 2 A Vin = 5.5 V Output leakage current I LO -- -- 2 A Vout = 5.5 V/0.45 V VPP current I PP1 -- 1 20 A VPP = 5.5 V Standby V CC current I SB1 -- -- 1 mA CE = VIH I SB2 -- 1 20 A CE = VCC 0.3 V I CC1 -- -- 30 mA Iout = 0 mA, f = 1 MHz I CC2 -- -- 90 mA Iout = 0 mA, f = 8.4 MHz -- 0.8 Operating VCC current Input voltage Output voltage VIL -0.3 *1 V *2 VIH 2.2 -- VCC + 1 V VOL -- -- 0.45 V I OL = 2.1 mA VOH 2.4 -- -- V I OH = -400 A Notes: 1. VIL min = -1.0 V for pulse width 50 ns. VIL min = -2.0 V for pulse width 20 ns. 2. VIH max = Vcc +1.5 V for pulse width 20 ns. If V IH is over the specified maximum value, read operation cannot be guaranteed. 5 HN27C4096ACP Series AC Characteristics (VCC = 5 V 10%, VPP = VSS to VCC, Ta = 0 to +70C) Test Conditions * * * * Input pulse levels: 0.45 to 2.4 V Input rise and fall time: 10 ns Output load: 1 TTL Gate + 100 pF Reference levels for measuring timing: 0.8 V, 2.0 V HN27C4096ACP -12 -15 Parameter Symbol Min Max Min Max Unit Test Conditions Address to output delay t ACC -- 120 -- 150 ns CE = OE = VIL CE to output delay t CE -- 120 -- 150 ns OE = VIL t OE -- 60 -- 70 ns CE = VIL t DF 0 40 0 50 ns CE = VIL t OH 5 -- 5 -- ns CE = OE = VIL OE to output delay OE high to output float *1 Address to output hold Note: 1. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. Read Timing Waveform Address CE Standby mode Active mode Standby mode tCE OE tDF tOE tOH t ACC Data Out 6 Data Out Valid HN27C4096ACP Series Fast High-Reliability Page Programming This device can be applied the high performance page programming algorithm shown in the following flowchart. This algorithm allows to obtain faster programming time without any voltage stress to the device nor deterioration in reliability of programmed data. Page Program Set Apply 12 V to OE pin after applying 12.5 V to VPP to set a page program mode. The device operates in a page program mode until reset. Page Program Reset Set VPP to VCC level or less to reset a page program mode. 7 HN27C4096ACP Series START SET PAGE PROG LATCH MODE VPP = 12.5 0.3 V, VCC = 6.25 0.25 V OE = 12.0 0.5 V Address = 0 n=0 Latch Address + 1 Address Latch Address + 1 Address Latch Address + 1 Address Latch n + 1 n SET PAGE PROG./VERIFY MODE VPP = 12.5 0.3 V, VCC = 6.25 0.25 V Address + 1 Address Program tPW = 50 s 5% VERIFY NO NOGO GO LAST address? n = 10? YES SET READ MODE VCC = 5.0 0.5 V, VPP = VCC READ all address YES NOGO GO END Fast High-Reliability Page Programming Flowchart 8 FAIL NO HN27C4096ACP Series DC Characteristics (VCC = 6.25 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C) Parameter Symbol Min Typ Max Unit Test Conditions Input leakage current I LI -- -- 2 A Vin = 6.5 V/0.45 V Output voltage during verify VOL -- -- 0.45 V I OL = 2.1 mA VOH 2.4 -- -- V I OH = -400 A I CC -- -- 50 mA -- 0.8 Operating VCC current Input voltage VPP supply current VIL -0.1 *5 V *6 VIH 2.2 -- VCC + 0.5 V VH 11.5 12.0 12.5 V I PP -- -- 70 mA CE = VIL Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after V PP . 2. VPP must not exceed 13 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while VPP = 12.5 V. 4. Do not alter VPP either V IL to 12.5 V or 12.5 V to VIL when CE = low. 5. VIL min = -0.6 V for pulse width 20 ns. 6. If V IH is over the specified maximum value, programming operation cannot be guaranteed. 9 HN27C4096ACP Series AC Characteristics (VCC = 6.25 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C) Test Conditions * Input pulse levels: 0.45 to 2.4 V * Input rise and fall time: 20 ns * Reference levels for measuring timing: Inputs: 0.8 V, 2.0 V, Outputs: 0.8 V, 2.0 V Parameter Symbol Min Typ Max Unit Address setup time t AS 2 -- -- s OE setup time t OES 2 -- -- s Data setup time t DS 2 -- -- s Address hold time t AH 0 -- -- s Data hold time t DH 2 -- -- s 0 -- 130 ns *1 OE high to output float delay t DF VPP setup time t VPS 2 -- -- s VCC setup time t VCS 2 -- -- s CE programming pulse width t PW 47.5 50.0 52.5 s CE setup time t CES 2 -- -- s Data valid from OE t OE 0 -- 150 ns CE pulse width during data latch t LW 1 -- -- s OE = VH setup time t OHS 2 -- -- s OE = VH hold time t OHH 2 -- -- s t VRS 1 -- -- s *2 VPP hold time Test Conditions Notes: 1. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 2. Page program mode will be reset when VPP is set to VCC or less. 10 HN27C4096ACP Series Fast High-Reliability Page Programming Timing Waveform Page program mode Program data latch Page program Program verify A2 - A17 t AH t AS t AS t AH A0, A1 t DH t OE t DF t DS Data in stable Data Data out valid t VPS VPP VPP VCC t VCS VCC + 1.25 VCC t OHH VCC t CES t PW t OES t OHS CE t LW OE VH t VRS VIH VIL 11 HN27C4096ACP Series Fast High-Reliability Progamming This device can be applied the fast high-reliability programming algorithm shown in the following flowchart. This algorithm allows to obtain faster programming time without any voltage stress to the device nor deterioration in reliability of programmed data. START SET PROG./VERIFY MODE VPP = 12.5 0.3 V, VCC = 6.25 0.25 V Address = 0 n=0 n+1 n Program tPW = 50 s 5% Address + 1 VERIFY GO Address NO NOGO n = 10? LAST address? YES YES SET READ MODE VCC = 5.0 0.5 V, VPP = VCC READ all address NOGO GO END Fast High-Reliability Programming Flowchart 12 FAIL NO HN27C4096ACP Series DC Characteristics (VCC = 6.25 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C) Parameter Symbol Min Typ Max Unit Test Conditions Input leakage current I LI -- -- 2 A Vin = 6.5 V/0.45 V VPP supply current I PP -- -- 40 mA CE = VIL Operating VCC current I CC -- -- 50 mA -- 0.8 Input voltage Output voltage VIL -0.1 *5 V *6 VIH 2.2 -- VCC + 0.5 V VOL -- -- 0.45 V I OL = 2.1 mA VOH 2.4 -- -- V I OH = -400 A Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after V PP . 2. VPP must not exceed 13 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while VPP = 12.5 V. 4. Do not alter VPP either V IL to 12.5 V or 12.5 V to VIL when CE = low. 5. VIL min = -0.6 V for pulse width 20 ns. 6. If V IH is over the specified maximum value, programming operation cannot be guaranteed. AC Characteristics (VCC = 6.25 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C) Test Conditions * Input pulse levels: 0.45 to 2.4 V * Input rise and fall time: 20 ns * Reference levels for measuring timing: Inputs: 0.8 V, 2.0 V, Outputs: 0.8 V, 2.0 V Parameter Symbol Min Typ Max Unit Address setup time t AS 2 -- -- s OE setup time t OES 2 -- -- s Data setup time t DS 2 -- -- s Address hold time t AH 0 -- -- s Data hold time t DH 2 -- -- s 0 -- 130 ns *1 OE to output float delay t DF VPP setup time t VPS 2 -- -- s VCC setup time t VCS 2 -- -- s CE programming pulse width t PW 47.5 50.0 52.5 s Data valid from OE t OE 0 -- 150 ns Note: Test Conditions 1. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 13 HN27C4096ACP Series Fast High-Reliability Programming Timing Waveform Program Program Verify Address t AH t AS Data Data In Stable t DS V PP Data Out Valid t DF t DH V PP V CC t VPS V CC V CC+1.25 V CC t VCS CE t PW t OES t OE OE Optional Page Programming This device can be applied the optional page programming algorithm shown in the following flowchart. This algorithm allows to obtain faster programming time without any voltage stress to the device nor deterioration in reliability of programmed data. This programming algorithm is the combination of page programming and word verify. It can avoid the increase of programming verify time when a programmer with slow machine cycle is used, and shorten the total programming time. Regarding the timing specifications for page programming and word verify, please refer to the specifications for fast high-relaibility page programming and fast high-reliability programming. 14 HN27C4096ACP Series START SET PAGE PROG. LATCH MODE VPP = 12.5 0.3 V, VCC = 6.25 0.25 V OE = 12.0 0.5 V Address = 0 Latch Address + 1 Address Latch Address + 1 Address Latch Address + 1 Address Latch SET PAGE PROG./MODE VPP = 12.5 0.3 V, VCC = 6.25 0.25 V Address + 1 Program tPW = 50 s 5% Address NO LAST address? YES PAGE PROG. RESET VPP = VCC = 6.25 0.25 V SET WORD PROG./VERIFY MODE VPP = 12.5 0.3 V, VCC = 6.25 0.25 V Address = 0 n=0 VERIFY GO NOGO n+1 Address + 1 Address n Program tPW = 50 s 5% VERIFY NOGO GO NO LAST address? n = 10? YES SET READ MODE VCC = 5.0 0.5 V, VPP = VCC READ all address NO YES NOGO GO END FAIL Optional Page Programming Flowchart 15 HN27C4096ACP Series DC Characteristics (VCC = 6.25 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C) Parameter Symbol Min Typ Max Unit Test Conditions Input leakage current I LI -- -- 2 A Vin = 6.5 V/0.45 V Output voltage during verify VOL -- -- 0.45 V I OL = 2.1 mA VOH 2.4 -- -- V I OH = -400 A I CC -- -- 50 mA -- 0.8 Operating VCC current Inputt voltage VPP supply current VIL -0.1 *5 V *6 VIH 2.2 -- VCC + 0.5 V VH 11.5 12.0 12.5 V I PP -- -- 70 mA CE = VIL Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after V PP . 2. VPP must not exceed 13 V including overshoot. 3. An influence may be had upon device reliability if the device is installed or removed while VPP = 12.5 V. 4. Do not alter VPP either V IL to 12.5 V or 12.5 V to VIL when CE = low. 5. VIL min = -0.6 V for pulse width 20 ns. 6. If V IH is over the specified maximum value, programming opration cannot be guaranteed. 16 HN27C4096ACP Series AC Characteristics (VCC = 6.25 V 0.25 V, VPP = 12.5 V 0.3 V, Ta = 25C 5C) Test Conditions * Input pulse levels: 0.45 to 2.4 V * Input rise and fall time: 20 ns * Reference levels for measuring timing: Inputs: 0.8 V, 2.0 V, Outputs: 0.8 V, 2.0 V Parameter Symbol Min Typ Max Unit Address setup time t AS 2 - - s OE setup time t OES 2 - - s Data setup time t DS 2 - - s Addres hold time t AH 0 - - s Data hold time t DH 2 - - s 0 - 130 ns *1 OE high to output float delay t DF VPP setup time t VPS 2 - - s VCC setup time t VCS 2 - - s CE programming pulse width t PW 47.5 50.0 52.5 s CE setup time t CES 2 - - s Data valid from OE t OE 0 - 150 ns CE pulse width during data latch t LW 1 - - s OE = VH setup time t OHS 2 - - s t OHH 2 - - s t VLW 1 - - s t VRS 1 - - s OE = VH hold time Page programming reset time *2 VPP hold time *2 Test Conditions Notes: 1. t DF is defined as the time at which the output achieves the open circuit condition and data is no longer driven. 2. Page program mode will be reset when VPP is set to VCC or less. 17 HN27C4096ACP Series Optional Page Programming Timing Waveform Word program mode Page program mode Program data latch Page program Program verify Program A2 - A17 t AH t AS t AH t AS t AH A0, A1 t DH t DS t DS Data out valid Data in stable Data Data in stable t VPS t OE t DF t VPS VPP t DH VPP VCC t VRS t VCS t VLW VCC+ 1.25 VCC VCC t OHH t CES t CES t OHS CE t OES t LW t PW OE t PW VH VIH VIL Mode Description Device Identifier Mode The device identifier mode allows the reading out of binary codes that identify manufacturer and type of device, from outputs of OTPROM. By this mode, the device will be automatically matched its own corresponding programming algorithm, using programming equipment. 18 HN27C4096ACP Series HN27C4096ACP Identifier Code Identifier A0 (24) I/O8 - I/O15 (11) - (4) I/O7 (14) I/O6 (15) I/O5 (16) I/O4 (17) I/O3 (18) I/O2 (19) I/O1 (20) I/O0 (21) Hex Data Manufacturer code VIL X 0 0 0 0 0 1 1 1 07 Device code VIH X 1 0 1 0 0 0 1 0 A2 Notes: 1. 2, 3. 4. VCC = 5.0 V 10%. A9 = 12.0 V 0.5 V. A1 - A8, A10 - A17, CE, OE = VIL. X: Don't care. Recommended Screening Conditions Before mounting, please make the screening (baking without bias) shown in the right. Program and verify by programmer Baking at 125 to 150C for 24 to 48 hrs Ensuring read-out Mounting Recommended Screening Conditions 19 HN27C4096ACP Series Package Dimensions HN27C4096ACP Series (CP-44) Unit: mm 17.53 0.12 16.58 39 29 28 18 6 17 7 0.74 0.43 0.10 1.27 15.50 0.50 20 2.55 0.15 44 1 4.40 0.20 17.53 0.12 40 15.50 0.50 0.10