Multiple Output, High Precision,
Dual-Tracking Reference
Data Sheet
AD588
Rev. M Document Feedback
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FEATURES
Low drift: 1.5 ppm/°C
Low initial error: 1 mV
Pin programmable output
+10 V, +5 V, ±5 V tracking, −5 V, −10 V
Flexible output force and sense terminals
High impedance ground sense
16-lead SOIC package and 16-lead CERDIP
MIL-STD-883-compliant versions available
GENERAL DESCRIPTION
The AD588 represents a major advance in state-of-the-art
monolithic voltage references. Low initial error and low
temperature drift give the AD588 absolute accuracy performance
previously not available in monolithic form. The AD588 uses a
proprietary ion-implanted, buried Zener diode and laser-wafer
drift trimming of high stability thin film resistors to provide
outstanding performance.
The AD588 includes the basic reference cell and three additional
amplifiers that provide pin programmable output ranges. The
amplifiers are laser trimmed for low offset and low drift to maintain
the accuracy of the reference. The amplifiers are configured to
allow Kelvin connections to the load and/or boosters for driving
long lines or high current loads, delivering the full accuracy of
the AD588 where it is required in the application circuit.
The low initial error allows the AD588 to be used as a system
reference in precision measurement applications requiring
12-bit absolute accuracy. In such systems, the AD588 can provide a
known voltage for system calibration in software. The low drift
also allows compensation for the drift of other components in a
system. Manual system calibration and the cost of periodic
recalibration can, therefore, be eliminated. Furthermore, the
mechanical instability of a trimming potentiometer and the
potential for improper calibration can be eliminated by using
the AD588 in conjunction with auto calibration software.
The AD588 is available in seven versions. The AD588JQ and
AD588KQ are packaged in a 16-lead CERDIP and are specified
for 0°C to +70°C operation. The AD588AQ and AD588BQ are
packaged in a 16-lead CERDIP, and the AD588ARWZ is packaged
in a 16-lead SOIC, and they are specified for the −25°C to +85°C
industrial temperature range. The ceramic AD588TE and
AD588TQ grades are specified for the full military/aerospace
temperature range.
FUNCTIONAL BLOCK DIAGRAM
R3
R
B
R1
R2
R4
R5
R6
GAIN
ADJ GND
SENSE
+IN
GND
SENSE
–IN
V
LOW
BAL
ADJ V
CT
A4 IN
–V
S
+V
S
A4 OUT
FORCE
A4 OUT
SENSE
A3 OUT
FORCE
A3 OUT
SENSE
A3 IN
V
HIGH
NOISE
REDUCTION
A1
A4
AD588
00531-001
A3
13
11
12
8
10
95
1
14
15
2
16
34
6
7
A2
Figure 1.
PRODUCT HIGHLIGHTS
1. The AD588 offers 12-bit absolute accuracy without any
user adjustments. Optional fine-trim connections are
provided for applications requiring higher precision. The
fine trimming does not alter the operating conditions of
the Zener or the buffer amplifiers, and so does not increase
the temperature drift.
2. Output noise of the AD588 is very low, typically 6 µV p-p.
A pin is provided for additional noise filtering using an
external capacitor.
3. A precision ±5 V tracking mode with Kelvin output
connections is available with no external components.
Tracking error is less than 1 mV, and a fine trim is available
for applications requiring exact symmetry between the
+5 V and −5 V outputs.
4. Pin strapping capability allows configuration of a wide
variety of outputs: ±5 V, +5 V, +10 V, −5 V, and −10 V dual
outputs or +5 V, −5 V, +10 V, and −10 V single outputs.
AD588* PRODUCT PAGE QUICK LINKS
Last Content Update: 12/18/2017
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DOCUMENTATION
Application Notes
•AN-713: The Effect of Long-Term Drift on Voltage
References
Data Sheet
•AD588: Military Data Sheet
•AD588: Multiple Output, High Precision, Dual-Tracking
Reference Data Sheet
TOOLS AND SIMULATIONS
•AD588 SPICE Macro Models
DESIGN RESOURCES
•AD588 Material Declaration
•PCN-PDN Information
•Quality And Reliability
•Symbols and Footprints
DISCUSSIONS
View all AD588 EngineerZone Discussions.
SAMPLE AND BUY
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TECHNICAL SUPPORT
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number.
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AD588 Data Sheet
Rev. M | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Theory of Operation ........................................................................ 6
Applications Information ................................................................ 7
Calibration ..................................................................................... 7
Noise Performance and Reduction ............................................ 9
Turn-On Time ............................................................................ 10
Temperature Performance......................................................... 10
Kelvin Connections .................................................................... 11
Dynamic Performance ............................................................... 13
Using the AD588 with Converters ............................................... 15
AD7535 14-Bit Digital-to-Analog Converter ......................... 15
AD569 16-Bit Digital-to-Analog Converter ........................... 15
Substituting for Internal References ........................................ 16
AD574A 12-Bit Analog-to-Digital Converter ........................ 16
Resistance Temperature Detector (RTD) Excitation ............. 16
Boosted Precision Current Source ........................................... 17
Bridge Driver Circuits ............................................................... 17
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 19
REVISION HISTORY
11/15—Rev. L to Rev. M
Changes to Figure 13 ...................................................................... 11
10/10—Rev. K to Rev. L
Changes to Amplifier A2 Plus and Minus Input Labels
in Figures ........................................................................ Throughout
9/10—Rev. J to Rev. K
Changes to Product Title ................................................................. 1
4/10—Rev. I to Rev. J
Changes to Calibration Section ...................................................... 8
11/09—Rev. H to Rev. I
Changes to Figure 40 and Figure 41 ............................................. 18
10/09—Rev. G to Rev. H
Changes to General Description Section ...................................... 1
6/06—Rev. F to Rev. G
Changes to Table 5 ............................................................................ 7
Updated Outline Dimensions ....................................................... 19
3/06—Rev. E to Rev. F
Replaced Figure 5 ............................................................................. 8
Updated Outline Dimensions ....................................................... 19
11/05—Rev. D to Rev. E
Updated Format .................................................................. Universal
Added SOIC Version .......................................................... Universal
Changes to Pin 14 in Figures ............................................ Universal
Changes to Pin 9 and Pin 10 in Figures ........................... Universal
Changes to Specifications Section ................................................... 3
Added Table 3 .................................................................................... 4
Added Pin Configuration and Function Descriptions Section ... 5
Added Table 4 .................................................................................... 5
Changes to Grade in Reference and in Figure 12 ....................... 11
Updated Outline Dimensions ....................................................... 19
Changes to Ordering Guide .......................................................... 19
2/03—Rev. C to Rev. D
Added KQ Model and Deleted SQ and TQ Models ...... Universal
Changes to General Description ..................................................... 1
Change to Product Highlights ......................................................... 1
Changes to Specifications ................................................................. 2
Changes to Ordering Guide ............................................................. 3
Updated Outline Dimensions ....................................................... 15
10/02—Rev. B to Rev. C
Changes to General Description ..................................................... 1
Changes to Specifications ................................................................. 2
Changes to Ordering Guide ............................................................. 3
Changes to Table 1 ............................................................................. 5
Deleted Figure 10c ............................................................................. 7
Updated Outline Dimensions ....................................................... 15
Data Sheet AD588
Rev. M | Page 3 of 20
SPECIFICATIONS
Typical at 25°C, 10 V output, VS = ±15 V, unless otherwise noted.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate
outgoing quality levels. All minimum and maximum specifications are guaranteed, although only those shown in boldface are tested on
all production units.
Table 1.
AD588JQ/AD588AQ AD588BQ/AD588KQ AD588ARWZ
Parameter1 Min Typ Max Min Typ Max Min Typ Max Unit
OUTPUT VOLTAGE ERROR
+10 V, −10 V Outputs
−1
+1
−5
mV
+5 V, −5 V Outputs ±3 −1 +1 −5 +5 mV
±5 V TRACKING MODE
Symmetry Error ±1.5 ±0.75 ±1.5 mV
OUTPUT VOLTAGE DRIFT
0°C to 70°C (J, K, B) ±2 ±3 ±1.5 ±2 ±3 ppm/°C
−25°C to +85°C (A, B) ±3 ±3 ±3 ppm/°C
GAIN ADJ AND BAL ADJ2
Trim Range
±4
±4
±4
mV
Input Resistance 150 150 150 kΩ
LINE REGULATION
TMIN to TMAX3 ±200 ±200 ±200 µV/V
LOAD REGULATION
TMIN to TMAX
+10 V Output, 0 mA < I
OUT
< 10 mA
±50
µV/mA
−10 V Output, −10 mA < IOUT < 0 mA ±50 ±50 ±50 µV/mA
SUPPLY CURRENT
TMIN to TMAX 6 10 6 10 6 10 mA
Power Dissipation 180 300 180 300 180 300 mW
OUTPUT NOISE (Any Output)
0.1 Hz to 10 Hz 6 6 6 µV p-p
Spectral Density, 100 Hz 100 100 100 nV/√Hz
LONG-TERM STABILITY (at 25°C) 15 15 15 ppm/1000 hr
BUFFER AMPLIFIERS
Offset Voltage 100 10 100 µV
Offset Voltage Drift 1 1 1 µV/°C
Bias Current 20 20 20 nA
Open-Loop Gain
110
110
110
dB
Output Current (A3, A4) −10 +10 −10 +10 −10 +10 mA
Common-Mode Rejection (A3, A4)
VCM = 1 V p-p 100 100 100 dB
Short Circuit Current 50 50 50 mA
TEMPERATURE RANGE
Specified Performance
J, K Grades 0 70 0 70 °C
A, B Grades −25 +85 −25 +85 −25 +85 °C
1Specifications tested using ±5 V configuration, unless otherwise indicated. See Figure 4 through Figure 6 for output configurations at +10 V, −10 V, +5 V, −5 V
and ±5 V.
2Gain and balance adjustments guaranteed capable of trimming output voltage error and symmetry error to zero.
3For ±10 V output, ±VS can be as low as ±12 V. See Table 3 for test conditions at various voltages.
AD588 Data Sheet
Rev. M | Page 4 of 20
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Rating
+VS to −VS 36 V
Power Dissipation (25°C) 600 mW
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering 10 sec) 300°C
Package Thermal Resistance (θJA/θJC) 90°C/25°C/W
Output Protection All outputs safe if
shorted to ground
Table 3. Test Conditions
Voltage Conditions
+10 V Output −VS = −15 V, +13.5 V ≤ +VS ≤ +18 V
−10 V Output −18 V ≤ −VS ≤ −13.5 V, +VS = +15 V
±5 V Output +VS = +18 V, −VS = −18 V
+VS = +10.8 V, −VS = −10.8 V
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
ESD CAUTION
Data Sheet AD588
Rev. M | Page 5 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
TOP VIEW
(No t t o Scal e)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
A3 OUT FO RCE
+V
S
A3 OUT S E NS E
A3 IN
GAIN ADJ
V
HIGH
NOISE
REDUCTION
V
LOW
–V
S
A4 OUT FO RCE
A4 OUT S E NS E
A4 IN
BALADJ
V
CT
GND SE NS E –IN
GND SENSE +IN
AD588
00531-002
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Description
1 A3 OUT FORCE Output from Buffering Amplifier 3 with Kelvin Force. Connect to Pin 3.
2
+V
S
Positive Power Supply.
3 A3 OUT SENSE Output from Buffering Amplifier 3 with Kelvin Sense. Connect to Pin 1.
4 A3 IN Positive Input to Amplifier 3. Connect to VHIGH, Pin 6.
5 GAIN ADJ Reference Gain Adjustment for Calibration. See the Calibration section.
6 VHIGH Unbuffered Reference High Output.
7 NOISE REDUCTION Noise Filtering Pin. Connect external 1 µF capacitor to ground to reduce the output noise
(see the Noise Performance and Reduction section). Can be left open.
8 VLOW Unbuffered Reference Low Output.
9 GND SENSE +IN Positive Input to the Ground Sense Amplifier.
10 GND SENSE −IN Negative Input to the Ground Sense Amplifier.
11 VCT Center Tap Voltage used for Calibration. See the Calibration section.
12 BAL ADJ Reference Centering Adjustment for Calibration. See the Calibration section.
13 A4 IN Positive Input to Amplifier 4. Connect to VLOW, Pin 8.
14 A4 OUT SENSE Output of Buffering Amplifier 4 with Kelvin Sense. Connect to Pin 15.
15 A4 OUT FORCE Output of Buffering Amplifier 4 with Kelvin Force. Connect to Pin 14.
16 −VS Negative Power Supply.
AD588 Data Sheet
Rev. M | Page 6 of 20
THEORY OF OPERATION
The AD588 consists of a buried Zener diode reference,
amplifiers used to provide pin programmable output ranges,
and associated thin-film resistors, as shown in Figure 3. The
temperature compensation circuitry provides the device with a
temperature coefficient of 1.5 ppm/°C or less.
Amplifier A1 performs several functions. A1 primarily acts to
amplify the Zener voltage from 6.5 V to the required 10 V output.
In addition, A1 provides for external adjustment of the 10 V output
through Pin 5, GAIN ADJ. Using the bias compensation resistor
between the Zener output and the noninverting input to A1, a
capacitor can be added at the NOISE REDUCTION pin (Pin 7)
to form a low-pass filter and reduce the noise contribution of the
Zener to the circuit. Two matched 10 kΩ nominal thin-film
resistors (R4 and R5) divide the 10 V output in half. Pin VCT
(Pin 11) provides access to the center of the voltage span and
BAL ADJ (Pin 12) can be used for fine adjustment of this
division.
Ground sensing for the circuit is provided by Amplifier A2. The
noninverting input (Pin 9) senses the system ground, which is
transferred to the point on the circuit where the inverting input
(Pin 10) is connected. This can be Pin 6, Pin 8, or Pin 11. The
output of A2 drives Pin 8 to the appropriate voltage. Thus, if
Pin 10 is connected to Pin 8, the VLOW pin is the same voltage as
the system ground. Alternatively, if Pin 10 is connected to the
VCT pin, it is a ground; and Pin 6 and Pin 8 are +5 V and −5 V,
respectively.
Amplifier A3 and Amplifier A4 are internally compensated and
are used to buffer the voltages at Pin 6, Pin 8, and Pin 11, as well
as to provide a full Kelvin output. Thus, the AD588 has a full
Kelvin capability by providing the means to sense a system
ground and provide forced and sensed outputs referenced to
that ground.
Note that both positive and negative supplies are required for
operation of the AD588.
R3
RB
R1
R2
R4
R5
R6
GAIN
ADJ GND
SENSE
+IN
GND
SENSE
–IN
VLOW BAL
ADJ VCT A4 IN
–VS
+VS
A4 OUT
FORCE
A4 OUT
SENSE
A3 OUT
FORCE
A3 OUT
SENSE
A3 IN
VHIGH
NOISE
REDUCTION
A1
A4
AD588
A2
00531-003
A3
13111281095
1
14
15
2
16
3467
Figure 3. AD588 Functional Block Diagram
Data Sheet AD588
Rev. M | Page 7 of 20
APPLICATIONS INFORMATION
The AD588 can be configured to provide +10 V and –10 V
reference outputs, as shown in Figure 4 and Figure 6, respectively.
It can also be used to provide +5 V, −5 V, or a 5 V tracking
reference, as shown in Figure 5. Table 5 details the appropriate
pin connections for each output range. In each case, Pin 9 is
connected to system ground, and power is applied to Pin 2
and Pin 16.
The architecture of the AD588 provides ground sense and
uncommitted output buffer amplifiers that offer the user a great
deal of functional flexibility. The AD588 is specified and tested
in the configurations shown in Figure 6. The user can choose to
take advantage of the many other configuration options available
with the AD588. However, performance in these configurations
is not guaranteed to meet the extremely stringent data sheet
specifications.
As indicated in Table 5, a +5 V buffered output can be provided
using Amplifier A4 in the +10 V configuration (Figure 4). A
−5 V buffered output can be provided using Amplifier A3 in the
−10 V configuration (Figure 6). Specifications are not guaranteed
for the +5 V or −5 V outputs in these configurations. Performance
is similar to that specified for the +10 V or −10 V outputs.
As indicated in Table 5, unbuffered outputs are available at
Pin 6, Pin 8, and Pin 11. Loading of these unbuffered outputs
impairs circuit performance.
Amplifier A3 and Amplifier A4 can be used interchangeably.
However, the AD588 is tested (and the specifications are
guaranteed) with the amplifiers connected, as indicated in
Figure 4 and Table 5. When either A3 or A4 is unused, its
output force and sense pins should be connected or the input
tied to ground.
Two outputs of the same voltage can be obtained by connecting
both A3 and A4 to the appropriate unbuffered output on Pin 6,
Pin 8, or Pin 11. Performance in these dual-output configurations
typically meets data sheet specifications.
CALIBRATION
Generally, the AD588 meets the requirements of a precision
system without additional adjustment. Initial output voltage
error of 1 mV and output noise specs of 10 µV p-p allow for
accuracies of 12 bits to 16 bits. However, in applications where
an even greater level of accuracy is required, additional calibra-
tion may be called for. Provision for trimming has been made
through the use of the GAIN ADJ and BAL ADJ pins (Pin 5 and
Pin 12, respectively).
The AD588 provides a precision 10 V span with a center tap
(VCT) that is used with the buffer and ground sense amplifiers to
achieve the voltage output configurations in Table 5. GAIN ADJ
and BAL ADJ can be used in any of these configurations to trim
the magnitude of the span voltage and the position of the center
tap within the span. The gain adjust should be performed first.
Although the trims are not interactive within the device, the
gain trim moves the balance trim point as it changes the
magnitude of the span.
Table 5. Pin Connections
Connect Unbuffered1 Output on Pins Buffered Output Buffered Output on Pins
Range Pin 10 to Pin −10 V −5 V 0 V +5 V +10 V Connections −10 V −5 V 0 V +5 V +10 V
+10 V 8 8 11 6 11 to 13, 14 to 15, 15
6 to 4, and 3 to 1 1
−5 V or +5 V 11 8 11 6 8 to 13, 14 to 15, 15
6 to 4, and 3 to 1 1
−10 V 6 8 11 6 8 to 13, 14 to 15, 15
11 to 4, and 3 to 1 1
+5 V 11 6 6 to 4 and 3 to 1 1
−5 V
11
8
8 to 13 and 14 to 15
15
1 Unbuffered outputs should not be loaded.
AD588 Data Sheet
Rev. M | Page 8 of 20
Figure 5 shows gain and balance trims in a +5 V and −5 V
tracking configuration. A 100 kΩ, 20-turn potentiometer
is used for each trim. The potentiometer for gain trim is
connected between Pin 6 (VHIGH) and Pin 8 (VLOW) with the
wiper connected to Pin 5 (GAIN ADJ). The potentiometer is
adjusted to produce exactly 10 V between Pin 1 and Pin 15, the
amplifier outputs. The balance potentiometer, also connected
between Pin 6 and Pin 8 with the wiper to Pin 12 (BAL ADJ), is
then adjusted to center the span from +5 V to −5 V.
Trimming in other configurations works in exactly the same
manner. When producing +10 V and +5 V, GAIN ADJ is used
to trim +10 V and BAL ADJ is used to trim +5 V. In the −10 V
and −5 V conguration, GAIN ADJ is again used to trim the
magnitude of the span, −10 V, while BAL ADJ is used to trim
the center tap, −5 V.
Trimming the AD588 introduces no additional errors over
temperature, so precision potentiometers are not required. For
single-output voltage ranges, or in cases when balance adjust is
not required, Pin 12 should be connected to Pin 11. If gain
adjust is not required, Pin 5 should be left floating.
In single output configurations, GAIN ADJ is used to trim
outputs utilizing the full span (+10 V or −10 V), while BAL ADJ
is used to trim outputs using half the span (+5 V or −5 V).
Input impedance on both the GAIN ADJ and BAL ADJ pins is
approximately 150 kΩ. The GAIN ADJ trim network effectively
attenuates the 10 V across the trim potentiometer by a factor of
about 1500 to provide a trim range of −3.5 mV to +7.5 mV with
a resolution of approximately 550 V/turn (20-turn potentiome-
ter). The BAL ADJ trim network attenuates the trim voltage by
a factor of about 1400, providing a trim range of ±4.5 mV with
resolution of 450 µV/turn.
R3
RB
R1
R2
R4
R5
R6
–VS
+VS
A1
A4
AD588
A3
SYSTEM
GROUND
+10V
+15V
+5V
–15V
SYSTEM
GROUND
0.1µF
0.1µF
00531-004
1
14
15
2
16
13111281095
346
7
A2
Figure 4. +10 V Output
R3
R
B
R1
R2
R4
R5
R6
–V
S
+V
S
A1
A4
AD588
A3
A2 SYSTEM
GROUND
+5V
+15V
–5V
–15V
SYSTEM
GROUND
0.1µF
0.1µF
100kΩ
20T
BALANCE
ADJUST
100kΩ
20T
GAIN ADJUST
+15V
NOISE
REDUCTION
1µF
00531-005
39kΩ
Figure 5. +5 V and −5 V Outputs
R3
R
B
R1
R2
R4
R5
R6
–V
S
+V
S
A1
A4
AD588
A3
SYSTEM
GROUND
+15V
–10V
–15V
SYSTEM
GROUND
0.1µF
0.1µF
NOISE
REDUCTION
–5V
0.1µF
0.1µF
00531-006
1
14
15
2
16
3467
13111281095
A2
Figure 6. −10 V Output
Data Sheet AD588
Rev. M | Page 9 of 20
NOISE PERFORMANCE AND REDUCTION
The noise generated by the AD588 is typically less than 6 µV p-p
over the 0.1 Hz to 10 Hz band. Noise in a 1 MHz bandwidth is
approximately 600 µV p-p. The dominant source of this noise is
the buried Zener, which contributes approximately 100 nV/√Hz. In
comparison, the op amp’s contribution is negligible. Figure 7
shows the 0.1 Hz to 10 Hz noise of a typical AD588.
If further noise reduction is desired, an optional capacitor, CN,
can be added between the NOISE REDUCTION pin and
ground, as shown in Figure 5.
This forms a low-pass filter with the 4 kΩ RB on the output of
the Zener cell. A 1 µF capacitor has a 3 dB point at 40 Hz and
reduces the high frequency noise (to 1 MHz) to about
200 µV p-p. Figure 8 shows the 1 MHz noise of a typical AD588
both with and without a 1 µF capacitor.
Note that a second capacitor is needed in order to implement
the noise reduction feature when using the AD588 in the −10 V
mode (Figure 6). The noise reduction capacitor is limited to
0.1 µF maximum in this mode.
00531-007
1µV
Figure 7. 0.1 Hz to 10 Hz Noise (0.1 Hz to 10 Hz BPF
with Gain of 1000 Applied)
00531-008
C
N
= 1mF
NO C
N
Figure 8. Effect of 1 µF Noise Reduction Capacitor on Broadband Noise
AD588 Data Sheet
Rev. M | Page 10 of 20
TURN-ON TIME
Upon application of power (cold start), the time required for
the output voltage to reach its final value within a specified
error band is the turn-on settling time. Two components
normally associated with this are the time for active circuits to
settle and the time for thermal gradients on the chip to stabilize.
Figure 9 and Figure 10 show the turn-on characteristics of the
AD588. The settling is about 600 µs. Note the absence of any
thermal tails when the horizontal scale is expanded to 2 ms/cm
in Figure 10.
00531-009
+V
S
V
OUT
Figure 9. Electrical Turn-On
00531-010
+VS
VOUT
Figure 10. Extended Time Scale Turn-On
Output turn-on time is modified when an external noise
reduction capacitor is used. When present, this capacitor
presents an additional load to the internal Zener diode current
source, resulting in a somewhat longer turn-on time. In the case
of a 1 µF capacitor, the initial turn-on time is approximately
60 ms (see Figure 11).
Note that if the noise reduction feature is used in the ±5 V
configuration, a 39 kΩ resistor between Pin 6 and Pin 2 is
required for proper startup.
00531-011
+V
S
–V
S
V
OUT
Figure 11. Turn-On with CN = 1 µF
TEMPERATURE PERFORMANCE
The AD588 is designed for precision reference applications where
temperature performance is critical. Extensive temperature testing
ensures that the device’s high level of performance is maintained
over the operating temperature range.
Figure 12 shows typical output temperature drift for the AD588BQ
and illustrates the test methodology. The box in Figure 12 is
bounded on the sides by the operating temperature extremes
and on top and bottom by the maximum and minimum output
voltages measured over the operating temperature range. The
slope of the diagonal drawn from the lower left corner of the
box determines the performance grade of the device.
10.002
V
MAX
10.001
10.000
V
MIN
OUTPUT (Volts)
–35 –15 525 45 65 85
V
MAX
V
MIN
TEMPERATURE ( °C)
SLOPE = T.C. =
= 0.95pp m/° C
V
MAX
– V
MIN
(T
MAX
– T
MIN
) × 10 × 1
–4
10.0013V – 10.00025V
(85° C – –25°C) × 10 × 10
–4
00531-012
Figure 12. Typical AD588BQ Temperature Drift
Data Sheet AD588
Rev. M | Page 11 of 20
Each AD588 A and B grade unit is tested at −25°C, 0°C, +25°C,
+50°C, +70°C, and +85°C. This approach ensures that the
variations of output voltage that occur as the temperature
changes within the specified range is contained within a box
whose diagonal has a slope equal to the maximum specified
drift. The position of the box on the vertical scale changes from
device to device as initial error and the shape of the curve vary.
Maximum height of the box for the appropriate temperature
range is shown in Figure 13. Duplication of these results requires
a combination of high accuracy and stable temperature control
in a test system. Evaluation of the AD588 produces a curve
similar to that in Figure 12, but output readings may vary,
depending on the test methods and equipment utilized.
AD588J
AD588K
AD588A
AD588B
DEVICE
GRADE MAX IMUM OUT P UT CHANG E ( mV )
0°C TO + 70°C
2.10
1.05
1.40 (TYP )
1.05
3.30
3.30
–25°C TO + 85°C
00531-013
Figure 13. Maximum Output Change—mV
KELVIN CONNECTIONS
Force and sense connections, also referred to as Kelvin
connections, offer a convenient method of eliminating the
effects of voltage drops in circuit wires. As seen in Figure 14,
the load current and wire resistance produce an error
(VERROR = R × IL) at the load.
The Kelvin connection of Figure 14 overcomes the problem by
including the wire resistance within the forcing loop of the
amplifier and sensing the load voltage. The amplifier corrects
for any errors in the load voltage. In the circuit shown, the
output of the amplifier would actually be at 10 V + VERROR, and
the voltage at the load would be the desired 10 V.
The AD588 has three amplifiers that can be used to implement
Kelvin connections. Amplifier A2 is dedicated to the ground
force-sense function, while uncommitted Amplifier A3 and
Amplifier A4 are free for other force-sense chores.
–
+
10V
R
RLOAD
R
R
V = 10V
I = 0
I = 0
IL
V = 10V – RIL
V = 10V – RIL
ILRLOAD
00531-014
Figure 14. Advantage of Kelvin Connection
In some single-output applications, one amplifier can be
unused. In such cases, the unused amplifier should be
connected as a unity-gain follower (force and sense pin tied
together), and the input should be connected to ground.
An unused amplifier section can be used for other circuit
functions, as well. Figure 15 through Figure 19 show the typical
performance of A3 and A4.
FREQUENCY (Hz)
100
–2010 10M100
OPEN-LOOP GAIN ( dB)
1k 10k 100k 1M
80
60
40
20
0
0
–180
–30
–60
–90
–120
–150
PHASE ( Degrees)
GAIN
PHASE
00531-015
Figure 15. Open-Loop Frequency Response (A3, A4)
AD588 Data Sheet
Rev. M | Page 12 of 20
FREQUENCY (Hz)
110
1010 10M100
POWER SUPPLY REJECTI ON (d B)
1k 10k 100k 1M
100
80
60
40
20
00531-016
+SUPPLY
–SUPPLY
V
S
= ±15V WI TH
1V p-p SINE WAVE
Figure 16. Power Supply Rejection vs. Frequency (A3, A4)
00531-017
Figure 17. Unity-Gain Follower Pulse Response (Large Signal)
00531-018
Figure 18. Unity-Gain Follower Pulse Response (Small Signal)
FREQUENCY (Hz)
110
010 10M
100
CMRR (dB)
1k 10k 100k 1M
100
80
60
40
20
V
S
= ±15V
V
CM
= 1V p - p +25°C
00531-019
Figure 19. Common-Mode Rejection vs. Frequency (A3, A4)
FREQUENCY (Hz)
110k10
NOISE SPECTRAL DENSITY (nV/√Hz)
100 1k
100
90
0
80
70
60
50
40
30
20
10
00531-020
Figure 20. Input Noise Voltage Spectral Density
Data Sheet AD588
Rev. M | Page 13 of 20
DYNAMIC PERFORMANCE
The output buffer amplifiers (A3 and A4) are designed to
provide the AD588 with static and dynamic load regulation
superior to less complete references. Many analog-to-digital and
digital-to-analog converters present transient current loads to
the reference, and poor reference response can degrade converter
performance. Figure 21 and Figure 22 display the characteristics
of the AD588 output amplifier driving a 0 mA to 10 mA load.
A3 OR A4
V
OUT
I
L
1kΩ
10V
0V
V
L
00531-021
10V
Figure 21. Transient Load Test Circuit
00531-022
V
OUT
V
L
Figure 22. Large-Scale Transient Response
Figure 23 and Figure 24 display the output amplifier
characteristics driving a 5 mA to 10 mA load, a common
situation found when the reference is shared among multiple
converters or is used to provide a bipolar offset current.
0
0531-023
A3 OR A4
V
OUT
+
–
2kΩ
I
L
10V
0V
V
L
2kΩ
10V
Figure 23. Transient and Constant Load Test Circuit
00531-024
V
OUT
1mV/CM
V
OUT
200mV/CM
V
L
Figure 24. Transient Response 5 mA to10 mA Load
In some applications, a varying load can be both resistive and
capacitive in nature or can be connected to the AD588 by a long
capacitive cable. Figure 25 and Figure 26 display the output
amplifier characteristics driving a 1000 pF, 0 mA to 10 mA load.
00531-025
A3 OR A4
V
OUT
C
L
1000pF
10V
0V
V
L
1kΩ
10V
Figure 25. Capacitive Load Transient Response Test Circuit
00531-026
C
L
= 0
C
L
= 1000pF
V
L
Figure 26. Output Response with Capacitive Load
Figure 27 and Figure 28 display the crosstalk between output
amplifiers. The top trace shows the output of A4, dc-coupled
and offset by 10 V, while the output of A3 is subjected to a 0 mA
to 10 mA load current step. The transient at A4 settles in about
1 μs, and the load-induced offset is about 100 μV.
V
OUT
A4 A3
++
00531-027
10V
0V
V
L
1kΩ
10V
–
10V
–
Figure 27. Load Crosstalk Test Circuit
00531-028
V
OUT
V
L
Figure 28. Load Crosstalk
AD588 Data Sheet
Rev. M | Page 14 of 20
Attempts to drive a large capacitive load (in excess of 1000 pF)
can result in ringing or oscillation, as shown in the step response
photo (Figure 29). This is due to the additional pole formed by
the load capacitance and the output impedance of the amplifier,
which consumes phase margin.
The recommended method of driving capacitive loads of this
magnitude is shown in Figure 30. The 150 Ω resistor isolates the
capacitive load from the output stage, while the 10 kΩ resistor
provides a dc feedback path and preserves the output accuracy.
The 1 µF capacitor provides a high frequency feedback loop.
The performance of this circuit is shown in Figure 31.
00531-029
VIN
VOUT
Figure 29. Output Amplifier Step Response, CL = 1 µF
00531-030
V
OUT
10kΩ
1µF
C
L
1µF
150Ω
+
–
V
IN
Figure 30. Compensation for Capacitive Loads
00531-031
VIN
VOUT
Figure 31. Output Amplifier Step Response Using Figure 30 Compensation
Data Sheet AD588
Rev. M | Page 15 of 20
USING THE AD588 WITH CONVERTERS
The AD588 is an ideal reference for a wide variety of analog-to-
digital and digital-to-analog converters. Several representative
examples follow.
AD7535 14-BIT DIGITAL-TO-ANALOG CONVERTER
High resolution CMOS digital-to-analog converters require a
reference voltage of high precision to maintain rated accuracy.
The combination of the AD588 and AD7535 takes advantage of
the initial accuracy, drift, and full Kelvin output capability of the
AD588, as well as the resolution, monotonicity, and accuracy of the
AD7535 to produce a subsystem with outstanding characteristics
(see Figure 32).
AD569 16-BIT DIGITAL-TO-ANALOG CONVERTER
Another application that fully utilizes the capabilities of the AD588
is supplying a reference for the AD569, as shown in Figure 33.
Amplifier A2 senses system common and forces VCT to assume this
value, producing +5 V and −5 V at Pin 6 and Pin 8, respectively.
Amplifier A3 and Amplifier A4 buffer these voltages out to the
appropriate reference force-sense pins of the AD569. The full
Kelvin scheme eliminates the effect of the circuit traces or wires and
the wire bonds of the AD588 and AD569 themselves, which would
otherwise degrade system performance.
00531-032
R3
RB
R1
R2
R4
R5
R6
–VS
+VS
A1
A4
AD588
A3
14-BI T DAC
LS
INPUT
REGISTER
MS
INPUT
REGISTER
DAC REGISTER
V
REFS
V
REF
AGNDS
AGNDF
+10V
N.C. V
DD
R
FS
I
OUT
LDAC
CSLSB
CSMSB
WR
V
SS
DGNDDB0DB13
14
AD7535
1
14
15
2
16
1
2
5
6
131112
8
1095
3
46
7
28 26
3
4
23
24
22
25
821 727
A2
Figure 32. AD588/AD7535 Connections
00531-033
A1
A3
A2
A4
AD588
A
3
+ IN
10kΩ
V
L
–5V
V
CT
+5V
V
H
10kΩ
+V
REF
FORCE
T
A
P
S
E
L
E
C
T
O
R
8 MSBs 8 L S Bs
GND
DB15 DB0
HBE LBE
V
OUT
–5V TO
+5V
+12V
–12V
+V
S
–V
S
S
E
G
M
E
N
T
S
E
L
E
C
T
O
R
LATCHES
AD569
+V
REF
SENSE
–V
REF
FORCE
–V
REF
SENSE
LDAC
CS
A
3
– IN
A
3
OUT
A
2
+ IN
A
2
– IN
A
4
+ IN
A
4
– IN
A
4
OUT
813
216 64
1
3
12
11
10
9
14
15
3
2
16
15
128
17
13 14 12 9 7 4 19 22 24 27 823
18
Figure 33. High Accuracy ±5 V Tracking Reference for AD569
AD588 Data Sheet
Rev. M | Page 16 of 20
SUBSTITUTING FOR INTERNAL REFERENCES
Many converters include built-in references. Unfortunately,
such references are the major source of drift in these converters.
By using a more stable external reference like the AD588, drift
performance can be improved dramatically.
AD574A 12-BIT ANALOG-TO-DIGITAL CONVERTER
The AD574A is specified for gain drift from 10 ppm/°C to
50 ppm/°C (depending on grade), using its on-chip reference.
The reference contributes typically 75% of this drift. Using an
AD588 as a reference source can improve the total drift by a
factor of 3 to 4.
Using this combination can result in apparent increases in
full-scale error due to the difference between the on-board
reference, by which the device is laser-trimmed, and the
external reference, with which the device is actually applied.
The on-board reference is specified to be 10 V ± 100 mV, while
the external reference is specified to be 10 V ± 1 mV. This may
result in up to 101 mV of apparent full-scale error beyond the
±25 mV specified AD574A gain error. External Resistor R2 and
Resistor R3 allow this error to be nulled. Their contribution to
full-scale drift is negligible.
The high output drive capability allows the AD588 to drive up
to six converters in a multiconverter system. All converters have
gain errors that track to better than ±5 ppm/°C.
RESISTANCE TEMPERATURE DETECTOR (RTD)
EXCITATION
The RTD is a circuit element whose resistance is characterized
by a positive temperature coefficient. A measurement of
resistance indicates the measured temperature. Unfortunately, the
resistance of the wires leading to the RTD often adds error to this
measurement. The 4-wire ohms measurement overcomes this
problem. This method uses two wires to bring an excitation
current to the RTD and two additional wires to tap off the resulting
RTD voltage. If these additional two wires go to a high input
impedance measurement circuit, the effect of their resistance is
negligible. They therefore transmit the true RTD voltage.
I
EXC
R
RI = 0
RTD V
OUT
α R
RTD
+
–
I = 0
R
R
00531-034
Figure 34. 4-Wire Ohms Measurement
12√8STS
00531-035
R3
RB
R1
R2
R4
R5
R6
A1
A4
AD588
A3
AO
CE
REF IN
REF OUT
BIPP OFF
10VIN
20VIN
ANA COM
HIGH
BITS
MIDDLE
BITS
LOW
BITS
+5V
+15V
–15V
DIG
COM
AD574A
–VS
+VS
R2
61.9Ω
R1
50Ω
R3
500Ω
20 TURN
VIN
10V
CS
R/C
15
11
7
1
16
19
20
23
24
27
9
14
13
12
8
10
6
5
4
3
16
2
15
14
1
13111281095
7643
28
2
A2
Figure 35. AD588/AD574A Connections
Data Sheet AD588
Rev. M | Page 17 of 20
A practical consideration when using the 4-wire ohms technique
with an RTD is the self-heating effect that the excitation current
has on the temperature of the RTD. The designer must choose
the smallest practical excitation current that still gives the desired
resolution. RTD manufacturers usually specify the self-heating
effect of each of their models or types of RTDs.
Figure 36 shows an AD588 providing the precision excitation
current for a 100 Ω RTD. The small excitation current of 1 mA
dissipates a mere 0.1 mW of power in the RTD.
BOOSTED PRECISION CURRENT SOURCE
In the RTD current-source application, the load current is limited
to ±10 mA by the output drive capability of Amplifier A3. In the
event that more drive current is needed, a series-pass transistor
can be inserted inside the feedback loop to provide higher
current. Accuracy and drift performance are unaffected by the
pass transistor.
BRIDGE DRIVER CIRCUITS
The Wheatstone bridge is a common transducer. In its simplest
form, a bridge consists of four two-terminal elements connected
to form a quadrilateral, a source of excitation connected along
one of the diagonals and a detector comprising the other diagonal.
Figure 38 shows a simple bridge driven from a unipolar excitation
supply. EO, a differential voltage, is proportional to the deviation
of the element from the initial bridge values. Unfortunately, this
bridge output voltage is riding on a common-mode voltage
equal to approximately VIN/2. Further processing of this signal
may necessarily be limited to high common-mode rejection
techniques, such as instrumentation or isolation amplifiers.
Figure 39 shows the same bridge transducer, this time driven
from a pair of bipolar supplies. This configuration ideally
eliminates the common-mode voltage and relaxes the
restrictions on any processing elements that follow.
00531-036
R3
R
B
R1
R2
R4
R5
R6
–V
S
+V
S
A1
AD588
A3
100Ω
1.0mA
0.01% +
–
V
OUT
R
C
= 10kΩ
R
C
VISHAY S102C
OR SIMILAR
RTD = Ω K4515
0.24°C/mW SELF-HEATING
–15V
OR
GROUND
A4
59108
12 11 13
7643
16
2
15
14
1
A2
Figure 36. Precision Current Source for RTD
00531-037
R3
R
B
R1
R2
R4
R5
R6
–V
S
+V
S
A1
A4
AD588
A3
LOAD
V
CC
Q
1
I
L
=
220Ω
LIMITED BY
Q
1
AND R
C
POWER
DISSIPATION
10V
R
C
13
11
12
81095
3467
1
14
15
2
16
A2
Figure 37. Boosted Precision Current Source
00531-038
VIN –
+R4 R3
R2
R1
EO
+–
Figure 38. Bridge Transducer Excitation—Unipolar Drive
V1R4 R3
R2
R1
EO
+–
V2–
+
–
+
00531-039
Figure 39. Bridge Transducer Excitation—Bipolar Drive
AD588 Data Sheet
Rev. M | Page 18 of 20
As shown in Figure 40, the AD588 is an excellent choice for the
control element in a bipolar bridge driver scheme. Transistor Q1
and Transistor Q2 serve as series-pass elements to boost the
current drive capability to the 28 mA required by a typical
350 Ω bridge. A differential gain stage can still be required if the
bridge balance is not perfect. Such gain stages can be expensive.
Additional common-mode voltage reduction is realized by
using the circuit illustrated in Figure 41. A1, the ground sense
amplifier, serves the supplies on the bridge to maintain a virtual
ground at one center tap. The voltage that appears on the opposite
center tap is now single-ended (referenced to ground) and can
be amplified by a less expensive circuit.
00531-040
R3
R
B
R1
R2
R4
R5
R6
–V
S
+V
S
A1
A4
AD588
A3
Q
1
=
2N3904
220Ω
+15V
–15V
220Ω
Q
2
=
2N3906
E
O
+–
13
11
12
810
9
5
1
14
15
2
16
3
46
7
A2
Figure 40. Bipolar Bridge Drive
00531-041
R3
R
B
R1
R2
R4
R5
R6
–V
S
+V
S
A1
A4
AD588
A3
R1
R2
AD OP- 07
V
OUT
+
–
220Ω
+15V
–15V
220Ω
Q1 =
2N3904
Q2 =
2N3906
13
11
12
8109
5
1
14
15
2
16
3
4
6
7
A2
Figure 41. Floating Bipolar Bridge Drive with Minimum CMV
Data Sheet AD588
Rev. M | Page 19 of 20
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONSARE IN MIL LI M E TERS ; INCH DI M E NS IO NS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFE RE NCE ON LY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JE DE C S TANDARDS MS-013-AA
032707-B
10.50 ( 0. 4134)
10.10 ( 0. 3976)
0.30 ( 0. 0118)
0.10 ( 0. 0039)
2.65 ( 0. 1043)
2.35 ( 0. 0925)
10.65 ( 0. 4193)
10.00 ( 0. 3937)
7.60 ( 0. 2992)
7.40 ( 0. 2913)
0.75 ( 0. 0295)
0.25 ( 0. 0098)
45°
1.27 ( 0. 0500)
0.40 ( 0. 0157)
COPLANARITY
0.10 0. 33 ( 0.0130)
0.20 ( 0. 0079)
0.51 ( 0. 0201)
0.31 ( 0. 0122)
SEATING
PLANE
8°
0°
16 9
8
1
1.27 ( 0. 0500)
BSC
Figure 42. 16-Lead Standard Small Outline Package [SOIC_W]
Wide Body
(RW-16)
Dimensions shown in millimeters and (inches)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
0.840 (21.34) MAX
15°
0°
0.320 (8.13)
0.290 (7.37)
0.015 (0.38)
0.008 (0.20)
0.200 (5.08)
MAX
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.310 (7.87)
0.220 (5.59)
0.005 (0.13) MIN 0.098 (2.49) MAX
0.100 (2.54) BSC
PIN 1
18
9
16
SEATING
PLANE
0.150
(3.81)
MIN
0.070 (1.78)
0.030 (0.76)
0.060 (1.52)
0.015 (0.38)
Figure 43. 16-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-16)
Dimensions shown in inches and (millimeters)
ORDERING GUIDE
Model1, 2 Initial Error (mV)
Temperature
Coefficient3
Temperature
Range (°C) Package Description
Package
Option
AD588ARWZ 5 3 ppm/°C −25 to +85 16-Lead Standard Small Outline Package [SOIC-W] RW-16
AD588AQ 3 3 ppm/°C −25 to +85 16-Lead Ceramic Dual In-Line Package [CERDIP] Q-16
AD588BQ 1 1.5 ppm/°C −25 to +85 16-Lead Ceramic Dual In-Line Package [CERDIP] Q-16
AD588JQ 3 3 ppm/°C 0 to 70 16-Lead Ceramic Dual In-Line Package [CERDIP] Q-16
AD588KQ 1 1.5 ppm/°C 0 to 70 16-Lead Ceramic Dual In-Line Package [CERDIP] Q-16
1 For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the Analog Devices Military Products Databook or current AD588/883B
data sheet.
2 Z = RoHS Compliant Part.
3 Temperature coefficient specified from 0°C to 70°C.
AD588 Data Sheet
Rev. M | Page 20 of 20
NOTES
©1986–2015 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00531-0-11/15(M)