PHOTOCOUPLER GaAlAs IRED & PHOTO-IC TENTATIVE DATA ISOLATED LINE RECEIVER SIMPLEX/MULTIPLEX DATA TRANSMISSION COMPUTER-PERIPHERAL INTERFACE MICROPROCESSOR SYSTEM INTERFACE DIGITAL ISOLATION FOR A/D, D/A CONVERSION The TOSHIBA MINI FLAT COUPLER TLP113 is a snall outline coupler, suitable for surface mount assembly. TLP113 consists of a GaAfAs light emitting diode, optically coupled to an integrated high gain, high speed photodetector whose output is an open collector, schottky clamped transistor. . Input Current Thresholds : Ip=10mA(Max.) . Switching. Speed : LOMBd(Typ.) . TTL/LSTTL Compatible : Vec=5V . Guaranteed Performance Over Temp. : 0~70C - Isolation Voltage : 2500Vrms(Min.)} TRUTH TABLE (Positive Logic) INPUT OUTPUT H L L H Note. | TLP113 Unit in mm 4.4 3.6+0.2 1 0.4 0.5MIN 2.540 0.15 f= 127 7.0+04 2.5 J EDEC - EIAJ - TOSHIBA 11-4C2 PIN CONFIGURATION (TOP VIEW) 1 Vec D6 ==[Do-ps 3C GNnDp4 1. ANODE 3. CATHODE 4&. GND 5. OUTPUT (OPEN COLLECTOR) 6. Vcc SCHEMATIC 1 Ip + Vr _ 3 A 0.1uF bypass capacitor must be connected between pins 4 and 6.TLP113 MAXIMUM RATINGS (Ta=25C) CHARACTERISTIC SYMBOL RATING UNIT Forward Current Ip 20 mA A Pulse Forward Current (Note 1) Trp 40 mA 4 |Peak Transient Forward Current (Note 2) IppT 1 A Reverse Voltage VR 5 Vv Output Current Io 25 mA Output Voltage Vo 7 Vv S Supply Voltage (1 Minute Maximum) Vee 7 V a Output Power Dissipation Po 40 mW Operating Temperature Range Topr -40~85 C Storage Temperature Range Tstg ~55~125 C Lead Solder Temperature (10 sec.) Tsold 260 C Isolation Voltage (AC, 1 min., RH=60%, Note 4) BVS 2500 Vrms Note 1 : 50% duty cycle, lms pulse width. Note 2: Pulse width 16mA _ 60 | 120 | ns (H>1L) CL=15pF, Rp=3500 Propagation Delay Time toLH l Tp=16 ~ OmA _ 60 120 ns (L>#) P CL=15pF, RL=3502 ise- ; RL=3500, Cl=15pF Output Rise-Fall Time tr te 9 L L=4 2p _ 30 _ ns (10-902) Lp=0 2 16mA Common Mode Transient Imunity| ,, 2 Ip=OmA, Vcy=200Vp-p _ 200 - |v/us at High Output Level MH Vo(MIn)=2V, RL=3502 : . Ip=lomA, Vcm=Z00Vp-p Common Mode Transient Imunity| Cu 2 ? ' _ -500 _ V/us at Low Output Level Vo(Max)=0.8V, Rz=3500 17TLPI13 Note 4 : Device considered a two-terminal device : Pins 1 and 3 shorted together and Pin 4,5 and 6 shorted together. Note 5 : The Vec supply voltage to each TLP113 isolator must be bypassed by 0.1uF capacitor, This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as - possible to package Vcc and GND pins of each device. Note 6 : Maximum electrostatic discharge voltage for any pins : 180V (C=200pF, R=0) ae TEST CERCUIT 1 : Switching Time Test Circuit Vec= 5V Ip. - ec Fey Ip PULSE INPUT \ ala} fi PW= 10048 1 ec| 6 ms OF od DUTY RATIO=1/10 o] 8 rs | Ld Vv O.3 OUTPUT : wal J MOMLTOR Ip MONITOR 3 GND| 4 t pHL g Lad ~