SM8580AM
NIPPON PRECISION CIRCUITS—1
NIPPON PRECISION CIRCUITS INC.
Real-time Clock IC with 4-bit Interface
and Built-in Temperature Sensor
OVERVIEW
The SM8580AM is a real-time clock IC based on a 32.768 kHz crystal oscillator, which features a 4-bit paral-
lel interface for communication with an external microcontroller.
It comprises second-counter to year-counter clock and calendar circuits that feature automatic leap-year adjust-
ment up to year 2099, alarm and timer interrupt functions, clock counter change detect functions, ±30-second
correction function, time error correction function, and built-in temperature sensor.
The 4-bit parallel interface is compatible with general-purpose SRAM over a high-speed bus.
FEATURES
■
High-speed bus 4-bit parallel interface
■
Date, day, hour, minute, and second-counter pre-
settable alarm interrupt
■
1/4096 seconds to 255 minutes presettable interval
timer interrupt function
■
2 software-maskable alarm and timer interrupt
outputs
■
Clock counter change detect functions
■
4-digit western calendar display
■
Automatic leap year correction up to year 2099
■
±30-second adjust function
■
−
195 to +192ppm time error correction range
■
Built-in temperature sensor (analog voltage out-
put)
■
2.4 to 5.5V interface voltage range
■
1.6 to 5.5V clock voltage range
■
0.6µA/3V (typ) current consumption
ORDERING INFORMATION
PINOUT
(Top view)
Device Package
SM8580AM 24-pin SSOP
1
13
24
12
CE0N
FCON
FOUT
VTEMP
AIRQN
TIRQN
A0
VDD
XT
XTN
N.C.
N.C.
N.C.
CE1
A1
A2
A3
RDN
VSS
D0
D1
D2
D3
WRN
SM8580AM
SM8580AM
NIPPON PRECISION CIRCUITS—2
PACKAGE DIMENSIONS
(Unit: mm)
24-pin SSOP
BLOCK DIAGRAM
0.36 0.10
10.20 0.30
0.10 0.10 1.80 7.80 0.30
5.40 0.20
0.15
+ 0.1
− 0.05
0.50 0.20
10.05 0.20
0.8 0.12 M
0.10
1.90 0.10
0.20
0 to 10
XTN
XT
AIRQN
TIRQN
FOUT
OSC Divider
A0 to A3
Digital Trimming
Controller
Clock and Calendar
Counter
Alarm Register
Timer Register
FOUT Register
Control Register
Interrupt
Control
FOUT
Control
BUS
Interface
FCON
WRN
RDN
D0 to D3
CE0N
CE1
Control line
VDD VSS
Temperature
Sensor
VTEMP
CG
CD
SM8580AM
NIPPON PRECISION CIRCUITS—3
PIN DESCRIPTION
Number Name I/O Function
1
1. Connect a 0.1µF capacitor between VDD and VSS.
1 CE0N I Chip enable 0 input with built-in pull-up resistor.
The SM8580AM can be accessed when CE0N is LOW and CE1 is HIGH.
2 FCON I
FOUT output frequency select control input (when CE1 is HIGH).
32.768kHz fixed frequency output when FCON is LOW.
Output frequency determined by bit FD when FCON is HIGH (when FE bit is 1).
Note that a HIGH-level voltage should be applied to FCON to avoid unwanted 32.768kHz output during
backup.
3 FOUT O Frequency set register, frequency output (CMOS output)
4 VTEMP O Temperature voltage output (analog output)
5 AIRQN O Alarm interrupt output (N-channel open-drain output)
6 TIRQN O Timer interrupt output (N-channel open-drain output)
7A0I
Address inputs.
Connect to the microcontroller address bus.
The selected register address is input on this bus when accessing the SM8580AM (positive logic).
8A1I
9A2I
10 A3 I
11 RDN I Read strobe input. Data can be read from SM8580AM when RDN is LOW and WRN is HIGH.
An error will occur if both RDN and WRN are simultaneously LOW.
12 VSS – Ground
13 WRN I Write strobe input. Data can be written to SM8580AM when RDN is HIGH and WRN is LOW .
An error will occur if both RDN and WRN are simultaneously LOW.
14 D3 I/O
Data bus input/outputs.
Connect to the microcontroller data bus.
15 D2 I/O
16 D1 I/O
17 D0 I/O
18 CE1 I
Chip enable 1 input with built-in pull-down resistor.
The SM8580AM can be accessed when CE0N is LOW and CE1 is HIGH.
FOUT is in output mode when CE1 is HIGH, regardless of the state of CE0N. FOUT is high impedance
when CE1 is LOW.
19 N C – No connection
20 N C – No connection
21 N C – No connection
2 2 XTN O Oscillator output, with built-in oscillator capacitance C
D
2 3 XT I Oscillator output, with built-in oscillator capacitance C
G
24 VDD – Supply
SM8580AM
NIPPON PRECISION CIRCUITS—4
FOUT Output and SM8580AM Access Relationship
SPECIFICATIONS
Absolute Maximum Ratings
V
SS
= 0 V
Recommended Operating Conditions
V
SS
= 0 V
CE0N CE1 FCON FE bit FOUT output SM8580AM accessible
HIGH LOW
××
High impedance No
LOW LOW
××
High impedance No
HIGH HIGH
L OW 0 32.768kHz output No
L OW 1 32.768kHz output No
HIGH 0 High impedance No
HIGH 1 FD bit select frequency output N o
LOW HIGH
L OW 0 32.768kHz output Yes
L OW 1 32.768kHz output Yes
HIGH 0 High impedance Yes
HIGH 1 FD bit select frequency output Yes
Parameter Symbol Condition Rating Unit
Supply voltage range V
DD
−
0.3 to 7.0 V
Input voltage range V
IN
All inputs, D0 to D3 V
SS
−
0.3 to V
DD
+ 0.3 V
Output voltage range V
OUT1
TIRQN, AIRQN V
SS
−
0.3 to 8.0 V
V
OUT2
FOUT, D0 to D3, VTEMP V
SS
−
0.3 to V
DD
+ 0.3 V
Storage temperature range T
stg
−
55 to 125
°
C
Parameter Symbol Condition Rating Unit
Supply voltage range V
DD
2.4 to 5.5 V
Clock supply voltage range V
CLK
1.6 to 5.5 V
Operating temperature range T
opr
−
40 to 85
°
C
SM8580AM
NIPPON PRECISION CIRCUITS—5
DC Electrical Characteristics
V
SS
= 0V, V
DD
= 1.6 to 5.5V, T
a
=
−
40 to 85
°
C unless otherwise noted
Parameter Symbol Condition Rating Unit
min typ max
Current consumption 1 I
DD1
V
DD
= 5V CE0N = RDN = WRN = V
DD
,
A0 to A3 = D0 to D3 = V
DD
or V
SS
,
CE1 = FCON = V
SS
,
AIRQN = TIRQN = FOUT = V
DD
,
VTEMP output OFF (TEMP bit = 0)
– 1.0 2.0 µA
Current consumption 2 I
DD2
V
DD
= 3V – 0.6 1.0 µ A
Current consumption 3 I
DD3
V
DD
= 5V Ta = 25
°
C,
CE0N = RDN = WRN = V
DD
,
A0 to A3 = D0 to D3 = V
DD
or V
SS
,
CE1 = FCON = V
SS
,
AIRQN = TIRQN = FOUT = V
DD
,
VTEMP output ON (TEMP bit = 1)
–5075µA
Current consumption 4 I
DD4
V
DD
= 3V – 40 60 µ A
Current consumption 5 I
DD5
V
DD
= 5V CE0N = CE1 = RDN = WRN = V
DD
,
A0 to A3 = D0 to D3 = V
SS
,
FCON = V
SS
,
AIRQN = TIRQN = FOUT = VTEMP = Hi-Z,
VTEMP output OFF (TEMP bit = 0),
FOUT = 32kHz output, C
L
= 0pF
– 3.0 7.5 µA
Current consumption 6 I
DD6
V
DD
= 3V – 1.7 4.5 µ A
Current consumption 7 I
DD7
V
DD
= 5V CE0N = CE1 = RDN = WRN = V
DD
,
A0 to A3 = D0 to D3 = V
SS
,
FCON = V
SS
,
AIRQN = TIRQN = FOUT = VTEMP = Hi-Z,
VTEMP output OFF (TEMP bit = 0),
FOUT = 32kHz output, C
L
= 30pF
– 8.0 20 µA
Current consumption 8 I
DD8
V
DD
= 3V – 5.0 12 µ A
HIGH-level input voltage 1 V
IH1
V
DD
= 4.5 to 5.5V,
CE0N, FCON, RDN, WRN, A0 to A3, D0 to D3 2.2 – V
DD
+ 0.3 V
LO W-lev el input voltage 1 V
IL1
V
SS
−
0.3 – 0 .8 V
HIGH-level input voltage 2 V
IH2
V
DD
= 2.4 to 3.6V,
CE0N, FCON, RDN, WRN, A0 to A3, D0 to D3 0.8V
DD
–V
DD
+ 0.3 V
LO W-lev el input voltage 2 V
IL2
V
SS
−
0.3 – 0.2V
DD
V
HIGH-level input voltage 3 V
IH3
V
DD
= 1.6 to 5.5V,
CE1 0.8V
DD
–V
DD
+ 0.3 V
LO W-lev el input voltage 3 V
IL3
V
SS
−
0.3 – 0.2V
DD
V
Input leakage current I
LEAK
CE0N = V
DD
, CE1 = V
SS
,
FCON = RDN = WRN = A0 to A3 = V
DD
or V
SS
−
0.5 – 0.5 µA
Pull-up resistance 1 R
UP1
V
DD
= 5V CE0N = V
SS
75 150 300 k
Ω
Pull-up resistance 2 R
UP2
V
DD
= 3V 150 300 600 k
Ω
Pull-down resistance 1 R
DWN1
V
DD
= 5V CE1 = V
DD
20 40 80 M
Ω
Pull-down resistance 2 R
DWN2
V
DD
= 3V 42.5 85 170 M
Ω
Pull-down resistance 3 R
DWN3
V
DD
= 5V CE1 = 0.5V 30 60 120 k
Ω
Pull-down resistance 4 R
DWN4
V
DD
= 3V 55 110 220 k
Ω
HIGH-level output voltage 1 V
OH1
V
DD
= 5V I
OH
=
−
1mA, D0 to D3, FOUT 4.5 – 5.0 V
HIGH-level output voltage 2 V
OH2
V
DD
= 3V 2.0 – 3.0 V
HIGH-level output voltage 3 V
OH3
V
DD
= 3V I
OH
=
−
100µA, D0 to D3, FOUT 2.9 – 3.0 V
L O W-level output voltage 1 V
OL1
V
DD
= 5V I
OL
= 1mA, D0 to D3, FOUT 0 – 0.5 V
L O W-level output voltage 2 V
OL2
V
DD
= 3V 0 – 0.8 V
L O W-level output voltage 3 V
OL3
V
DD
= 3V I
OL
= 100µA, D0 to D3, FOUT 0 – 0.1 V
L O W-level output voltage 4 V
OL4
V
DD
= 5V I
OL
= 1mA, AIRQN, TIRQN 0 – 0.25 V
L O W-level output voltage 5 V
OL5
V
DD
= 3V 0 – 0.4 V
Output leakage current I
OZ
D0 to D3, AIRQN, TIRQN, FOUT, V
OUT
= V
DD
or V
SS
−
0.5 – 0.5 µA
SM8580AM
NIPPON PRECISION CIRCUITS—6
Terminal Capacitance Characteristics
Ta = 25°C, f = 1MHz
Oscillator Characteristics
Ta = 25°C, Seiko Epson C-002SH crystal (CI = 30kΩ, CL = 10pF) unless otherwise noted
AC Characteristics (1)
VSS = 0V, Ta = −40 to 85°C unless otherwise noted
Parameter Symbol Condition Rating Unit
min typ max
Address input capacitance C
ADD
A0 to A3 – – 8 pF
Data output capacitance C
DATA
D0 to D3 – – 15 pF
Parameter Symbol Condition Rating Unit
min typ max
Oscillator star t time t
STA
V
DD
= 1.6 V – – 3. 0 s
Oscillator stop voltage V
STO
– – 1.5 V
Frequency voltage characteristic f/V V
DD
= 1.6 to 5.5V
−
2 – +2 ppm/V
Frequency accuracy
ε
IC
V
DD
= 3.0V
−
20 – +20 ppm
Input capacitance C
G
V
DD
= 3.0V – 15 – p F
Output capacitance C
D
V
DD
= 3.0V – 10 – p F
Parameter Symbol Condition Rating Unit
min max min
FOUT duty Duty V
DD
= 5V ± 10% 40 – 60 %
V
DD
= 3V ± 10% 40 – 60 %
Oscillator failure detection time t
OSC
V
DD
= 5V ± 10% 10 – – m s
V
DD
= 3V ± 10% 10 – – m s
SM8580AM
NIPPON PRECISION CIRCUITS—7
AC Characteristics (2)
VDD = 2.4 to 3.6V, VSS = 0V, Ta = −40 to 85°C, inputs VI = 0.5VDD, outputs VO = 0.5VDD
output load capacitance CL = 100pF (tACC, tACS, tARD)
VDD = 4.5 to 5.5V, VSS = 0V, Ta = −40 to 85°C, inputs VI = 0.5VDD, outputs VO = 0.5VDD
output load capacitance CL = 100pF (tACC, tACS, tARD)
Parameter Symbol Rating Unit
min max
Read cycle time t
RC
150 – ns
Address access time t
ACC
– 150 ns
CE access time t
ACS
– 150 ns
RD access time t
ARD
– 100 ns
CE output set time t
CLZ
5–ns
CE output floating t
CHZ
–60ns
RD output set time t
OLZ
5–ns
RD output floating t
OHZ
–60ns
Output hold time t
OH
10 – ns
W rite cycle time t
WC
150 – ns
Chip select time t
CW
140 – ns
Address valid to end-of-write t
AW
140 – ns
Address setup time t
AS
0–ns
Address hold time t
WR
0–ns
W rite pulsewidth t
WP
130 – ns
Input data set time t
DW
80 – ns
Input data hold time t
DH
0–ns
Parameter Symbol Rating Unit
min max
Read cycle time t
RC
85 – ns
Address access time t
ACC
–85ns
CE access time t
ACS
–85ns
RD access time t
ARD
–45ns
CE output set time t
CLZ
3–ns
CE output floating t
CHZ
–30ns
RD output set time t
OLZ
3–ns
RD output floating t
OHZ
–30ns
Output hold time t
OH
5–ns
W rite cycle time t
WC
85 – ns
Chip select time t
CW
70 – ns
Address valid to end-of-write t
AW
70 – ns
Address setup time t
AS
0–ns
Address hold time t
WR
0–ns
W rite pulsewidth t
WP
65 – ns
Input data set time t
DW
35 – ns
Input data hold time t
DH
0–ns
SM8580AM
NIPPON PRECISION CIRCUITS—8
Data read
Data write
CE control
WR control
A0 to A3
t
RC
t
ACC
t
ACS
t
ACS
t
CLZ
t
CLZ
t
OH
t
CHZ
t
CHZ
t
OHZ
t
ARD
t
OLZ
CE0N
CE1
RDN
D0 to D3
A0 to A3
t
WC
CE0N
CE1
WRN
D0 to D3
t
AS
t
AW t
CW
t
WR
t
DH
t
DW
A0 to A3
t
WC
CE0N
CE1
WRN
D0 to D3
t
AW t
WR
t
DH
t
DW
t
AS
t
WP
SM8580AM
NIPPON PRECISION CIRCUITS—9
Temperature Sensor
VSS = 0V, Ta = −40 to 85°C unless otherwise noted
Parameter Symbol Condition Rating Unit
min max min
Temperature sensor output voltage V
OUT
Ta = 25
°
C, VSS reference output voltage,
V
DD
= 2.7 to 5.5V, VTEMP – 1.470 – V
Output accuracy T
ACR
Ta = 25
°
C––±5
°
C
Temperature sensitivity
1
1. Temperature sensitivity V
SE
= (V(85
°
C)
−
V(
−
40
°
C) ) ÷ 125 [mV/
°
C]
V
SE
–40
°
C ≤ Ta ≤ 85
°
C, V
DD
= 2.7 to 5.5V
−
7.3
−
7.8
−
8.3 mV/
°
C
Linearity
2
2. Linearity
∆
NL = a ÷ b
×
100 [%], where
a = maximum deviation between the measured value and the approximated value of VTEMP, and
b = difference between the measured values at temperatures of
−
40 and 85
°
C
∆
NL –40
°
C ≤ Ta ≤ 85
°
C, V
DD
= 2.7 to 5.5V – – ±2.0 %
Temperature detection range T
OPR
∆
NL ≤ ±2.0%, V
DD
= 2.7 to 5.5V
−
40 – 85
°
C
Output resistance
3
3. Output resistance R
O
=
∆
V
1
÷
∆
I
1
[Ω]
R
O
Ta = 25
°
C, V
DD
= 2.7 to 5.5V, VTEMP – 1.0 3.0 kΩ
Output load capacitance C
L
V
DD
= 2.7 to 5.5V – – 1 0 0 p F
Output load resistance R
L
V
DD
= 2.7 to 5.5V 5 00 – – kΩ
Response time t
RSP
V
DD
= 3.0V, R
L
= 500kΩ, C
L
= 100pF – – 200 µs
Ta
a
a
a
0 C−40 C 85 C
V (85 C)
VTEMP(V)
bApproximate value
Measured value
V (−40 C)
SM8580A
V1
I1
OP AMP
VTEMP 1MΩ
SM8580AM
NIPPON PRECISION CIRCUITS—10
Backup Transfer and Return
Parameter
1
1. Before switching the supply, confirm that the chip enable CE1 is LOW and that SM8580AM is deselected.
Symbol Condition Rating Unit
min max min
Supply voltage falling edge CE setup time t
CD
0––µs
Supply voltage fall time t
F
(V
DD
−
V
CLK
) ≤ 2.0V 2 – – µs/V
(V
DD
−
V
CLK
) > 2.0V 50 – – µs/V
Supply voltage rise time t
R
1 – – µs/V
Supply voltage rising edge CE hold time t
CU
0––µs
tCD
VDD
VCLK
CE1
tF
VIL
tCU
VIL
tR
Backup mode
SM8580AM
NIPPON PRECISION CIRCUITS—11
FUNCTIONAL DESCRIPTION
Register T ables
Bank 0 (clock, calendar registers)
Bank 1 (alarm, FOUT registers)
Bank 2 (digital correction, timer registers)
■All bits in register F and bits 2 to 3 in register E
are common to all register banks.
■When alarm interrupts are not used, registers 0 to
8 in bank 1 can be used as RAM (total 36 bits).
■When timer interrupts are not used, registers 4 to 5
in bank 2 can be used as RAM (total 8 bits).
■When digital correction is not used, registers 0 to
1 in bank 2 can be used as RAM, excluding bit 3
(DT_ON) in register 1 (total 7 bits).
■The BUSY/ADJ bit function is BUSY when read-
ing, and ADJ when writing.
■The BUSY flag is set to 1 an interval of 244µs
before clock counter update timing.
■Registers 6 and 7 in bank 2 are read-only re gisters,
and cannot be written to.
■When power is applied, all register bits are unde-
fined, with the exception of bits FOS, TEST and
TEMP. Accordingly, these bits need to be initial-
ized. TEST and TEMP are automatically reset to 0
and FOS is automatically reset to 1 when power is
applied.
■Bits marked # are all read-only bits fixed to 0.
These bits cannot be written to.
■Bits marked * can be used as RAM bits.
Address Register Bit 3 Bit 2 Bit 1 Bit 0
0Second registers 8421
1 FOS 40 20 10
2M in ute registers 8421
3 # 40 20 10
4Hour registers 8421
5##2010
6D ay of week
register #421
7Date registers 8421
8##2010
9Month registers 8421
A ###10
B
Year registers
8421
C 80402010
D 800 400 200 100
E TEST TEMP 2000 1000
F Control register Bank
SEL1 Bank
SEL0 STOP BUSY/
ADJ
Address Register Bit 3 Bit 2 Bit 1 Bit 0
0Second registers 8421
1 AE402010
2M in ute registers 8421
3 AE402010
4Hour registers 8421
5 AE * 20 10
6D ay of week
register AE421
7Date registers 8421
8 AE * 20 10
9 – ****
A – ****
B CE1 control CTEMP CDT_ON * *
CFOUT divider set
register # FD2 FD1 FD0
DFOUT frequency
set register FE # FD4 FD3
E Alarm control TEST TEMP AF AIE
F Control register Bank
SEL1 Bank
SEL0 STOP BUSY/
ADJ
Address Register Bit 3 Bit 2 Bit 1 Bit 0
0Digital correction
registers DT3 DT2 DT1 DT0
1 DT_ON DT6 DT5 DT4
2 – ####
3 – ####
4Timer counter set
registers 8421
5 128 64 32 16
6Timer counter
output registers 8421
7 128 64 32 16
8 Timer setting T E TI/TP TD1 TD0
9 – ####
A – ####
B – ****
C – ****
D – ****
E Timer control TEST TEMP TF TIE
F Control register Bank
SEL1 Bank
SEL0 STOP BUSY/
ADJ
SM8580AM
NIPPON PRECISION CIRCUITS—12
Control Registers (All Banks, Register E (bits 2, 3) and F)
■TEST bit
Factory test bit.
This bit should be set to 0. Take care when writing
to other E register bits not to accidentally write 1
to the TEST bit. Automatically resets to 0 when
power (VDD) is applied.
■TEMP bit
When set to 1, it enables the temperature sensor
voltage output on pin VTEMP. When set to 0,
VTEMP is high impedance. Automatically resets
to 0 when power is applied.
■Bank SEL bits
Bank select bits for read/write operations.
■STOP bit
When set to 1, the clock 32Hz frequency divider
counter stops and is reset. When set to 0, the clock
restarts.
■BUSY/ADJ bit
This bit functions as a BUSY function in read
mode, and as an ADJ function in write mode.
• ADJ function (±30 seconds adjust bit)
Second registers are reset to 00 and minute reg-
isters not incremented when the clock counter is
reset and the second registers are currently 00 to
29.
Second registers are reset to 00 and minute reg-
isters are incremented when the clock counter is
reset and the second registers are currently 30 to
59.
The ADJ bit is automatically reset to 0 a maxi-
mum of 244µs after it is set to 1, and thus the
register should not be written to during this
244µs interval.
• BUSY function (second registers increment or
±30 seconds adjust busy indicator bit)
When BUSY is 1, the counters are being
updated (incremented or reset). To read or write
to clock and calendar registers, the BUSY flag
has to be 0. If reading data when BUSY is set to
1, there is a possibility that incorrect (intermedi-
ate) data will be output.
BUSY is set to 1 under the following two cir-
cumstances.
Bank Address Bit 3 Bit 2 Bit 1 Bit 0
0, 1, 2 E TEST TEMP
F Bank SEL1 Bank SEL0 STOP BUSY/ADJ
Bank SEL1 Bank SEL0 Accessed bank
0 0 Bank 0
0 1 Bank 1
1 0 Bank 2
1 1 Bank 1
Normal seconds digit carry
±30 seconds digit adjust (when ADJ is set to 1)
Carry complete
244µs
Adjust function
complete
max 244µs
Setting ADJ bit to "1"
SM8580AM
NIPPON PRECISION CIRCUITS—13
■Function operation table
Bit Function
STOP ADJ Clock Timer Alarm FOUT
0 0 Operating Operating
3
Operating Operating
6
0 1 Adjust
1
Operating
4
Operating Operating
7
1 0 Stopped Operating/stopped
5
Stopped Operating/stopped
8
1 1 Stopped/adjust
2
Operating/stopped
5
Stopped Operating/stopped
8
1. ±30 seconds adjust function
2. The clock stops, and the ±30 seconds adjust function operates.
3. If the timer source clock frequency is ≤ 1Hz, the timer cycle changes when the digital correction function is used.
If the timer source clock frequency is ≥ 64Hz, the timer cycle is not affected when the digital correction function is used.
4. If the timer source clock frequency is ≤ 1Hz, the timer cycle changes.
If the timer source clock frequency is ≥ 64Hz, the timer cycle does not change.
5. If the timer source clock frequency is ≤ 1Hz, the timer is stopped.
If the timer source clock frequency is ≥ 64Hz, the timer operates.
6. If the FOUT source clock frequency is ≤ 1Hz, the cycle changes when the digital correction function is used.
If the FOUT source clock frequency is ≥ 32Hz, the cycle is not affected when the digital correction function is used.
7. If the FOUT source clock frequency is ≤ 1Hz, the cycle changes.
If the FOUT source clock frequency is ≥ 32Hz, the cycle does not change.
8. If the FOUT source clock frequency is ≤ 1Hz, the timer is stopped.
If the FOUT source clock frequency is ≥ 32Hz, the timer operates.
SM8580AM
NIPPON PRECISION CIRCUITS—14
Clock and Calendar Registers (Bank 0, Registers 0 to E)
Clock counters (registers 0 to 5)
■Data in these registers is interpreted in BCD for-
mat. For example, if the seconds registers 1 and 0
contain 0101 1001, then the contents are inter-
preted as the value 59 seconds.
■Hour register contents are values expressed in 24-
hour mode.
FOS (oscillator failed detect bit (register 1, bit 3) )
■The FOS bit is the oscillator failure flag. It indi-
cates that the oscillator has stopped due to supply
voltage reduction during operation. It is set to 1
when the oscillator stops, and remains 1 until reset
by writing 0 to FOS. It is not affected by the func-
tion of other bits. A 1 is written to FOS when
power is applied.
Day-of-week counter (register 6)
■The day-of-week register contains values repre-
senting the day of the week as shown in the fol-
lowing table.
Calendar registers (registers 7 to E)
■Registers B to E are 4 digits forming the western
calendar year. ■Leap-year adjustment is automatic for years 1901
to 2099.
Bank Address Register Bit 3 Bit 2 Bit 1 Bit 0
0
0Second registers 8421
1 FOS 40 20 10
2M in ute registers 8421
340 20 10
4Hour registers 8421
520 10
Bank Address Register Bit 3 Bit 2 Bit 1 Bit 0
0 6 D a y of week register 4 2 1
Bit 2 Bit 1 Bit 0 Weekday
0 0 0 Sunday
0 0 1 Monday
0 1 0 Tuesday
0 1 1 Wednesday
1 0 0 Thursday
101 Friday
1 1 0 Saturday
Bank Address Register Bit 3 Bit 2 Bit 1 Bit 0
0
7Date registers 8421
820 10
9Month registers 8421
A10
B
Year registers
8421
C 80402010
D 800 400 200 100
E TEST TEMP 2000 1000
SM8580AM
NIPPON PRECISION CIRCUITS—15
Alarm Registers (Bank 1, Registers 0 to 8, E)
Alarm control register (register E)
■AF bit (alarm flag)
The AF bit is set to 1 when an alarm event is
occurred, when the settings in the alarm set regis-
ters (bank 1, registers 0 to 8) match the settings in
the day, clock and calendar registers (bank 0, reg-
isters 0 to 8). The AF bit remains 1 until reset by
writing 0 to AF. A logic 1 cannot be written to AF.
■AIE bit (alarm interrupt enable)
This bit enables the output on AIRQN when an
alarm interrupt is occurred. If the AIE is not set to
1, then no output occurs even if the AF bit is set to
1. The AIRQN output is high impedance when
AIE is set to 0.
Alarm set registers (registers 0 to 8)
■These registers set the alarm time and date.
■When the corresponding bank 0 registers match
these bank 1 registers, an alarm event occurs and
AIRQN goes LOW if AIE is set to 1.
■An alarm can be set for date, day-of-week, hour,
minute, and second. Each of these have a corre-
sponding AE (alarm enable) bit which allows easy
combination to create alarm events every second,
every minute, hourly, daily, and weekly alarms.
■Note that alarms cannot be set for multiple days
within the same week (such as an alarm on Mon-
days and Fridays only).
■When an AE bit is set to 0, the relevant register
and corresponding bank 0 register are compared.
When an AE bit is set to 1, the data is disregarded
and all bits considered as “don’t care” bits.
Day-of-week alarm bits (register 6)
■The day-of-week register contains values repre-
senting the day of the week as shown in the fol-
lowing table.
Bank Address Register Bit 3 Bit 2 Bit 1 Bit 0
1 E Alarm control AF AI E
Bank Address Register Bit 3 Bit 2 Bit 1 Bit 0
1
0Second registers 8421
1 AE402010
2M in ute registers 8421
3 AE402010
4Hour registers 8421
5 AE * 20 10
6 D a y of week register A E 4 2 1
7Date registers 8421
8 AE * 20 10
Bit 2 Bit 1 Bit 0 Weekday
0 0 0 Sunday
0 0 1 Monday
0 1 0 Tuesday
0 1 1 Wednesday
1 0 0 Thursday
101 Friday
1 1 0 Saturday
SM8580AM
NIPPON PRECISION CIRCUITS—16
Timer Registers (Bank 2, Registers 4 to 8, E)
Timer control registers (registers 8, E)
■TE bit (timer enable)
Timer countdown stop/start control bit.
When set to 1, the timer starts counting down.
When set to 0 during countdown, the timer stops.
■TF bit (timer flag)
The timer flag is set to 1 when the timer counter
counts down to zero, occurring a timer event. It is
held at 1 until 0 is written to this bit. A 1 cannot be
written to TF.
■TIE bit (timer interrupt enable)
This bit enables the timer interrupt output on
TIRQN when a timer event is occurred. If the TIE
is not set to 1, then no output occurs even if the TF
bit is set to 1. The TIRQN output is high imped-
ance when TIE is set to 0.
■TI/TP bit (level/periodic interrupt mode select bit)
Sets the timer interrupt signal output mode.
The SM8580AM supports two timer function
modes.
• TI/TP = 0 (level interrupt mode)
When a timer interrupt is occurred, TIRQN
goes LOW (if TIE = 1) and TF is set to 1.
TIRQN remains LOW and TF is held at 1 until
a 0 is written to the TF bit.
The timer operates by counting down until the
data is zero, then the TE bit is cleared and the
count stops automatically. However, if the timer
is started when the TF bit is 1, then the TE bit is
not cleared. The timer count register contents
remain zero after the count down stops.
• TI/TP = 1 (periodic interrupt mode)
When a timer interrupt is occurred, TIRQN
goes LOW (if TIE = 1) and TF is set to 1.
TIRQN subsequently goes high impedance
after a fixed interval, b ut TF is held at 1 until a 0
is written to the TF bit.
The timer operates by counting down until the
data is zero, then the timer register data is
reloaded automatically after a fixed interval,
and the countdown restarts. This mode can be
used as a repetitive interval timer.
Timer source clock set register (register 8)
■The register 8 bits 0 and 1 set the timer source
clock to one of four frequencies listed in the fol-
lowing table.
Bank Address Register Bit 3 Bit 2 Bit 1 Bit 0
28 Timer setting TE TI/TP
E Timer control T F TI E
Bank Address Register Bit 3 Bit 2 Bit 1 Bit 0
2 8 Timer setting T D 1 T D 0
TD1 TD0 Timer source clock
0 0 4096Hz
0 1 64Hz
1 0 1Hz
1 1 1/60Hz (1 minute)
SM8580AM
NIPPON PRECISION CIRCUITS—17
Timer counter set registers (registers 4 to 7)
■Registers 4 and 5 set an 8-bit presettable binary
down-counter value for the timer interrupt func-
tion.
■The value of the count can be determined by read-
ing the values of registers 6 and 7 during the
count.
■The presettable binary down-counter is updated
when the data is written to registers 4 and 5.
■The data written to registers 4 and 5 are stored and
are not changed until replacement data is written.
This allo ws these bits to function as RAM bits if the
timer interrupt mode is not used (when TIE = 0).
■When TE is set to 1, periodic interrupts are not
output on TIRQN, even if registers 4 and 5 are set
to zero.
■The timer error once a timer operation is started is
a maximum of one cycle of the source clock.
Timer operations started and stopped in less than
one cycle of the source clock are not counted.
Timer interrupt function example
Example of an hourly periodic timer interrupt
The timer start timing is set up in write mode when
the WRN rising edge corresponding to the TE bit
occurs, as shown in the following timing diagram.
Bank Address Register Bit 3 Bit 2 Bit 1 Bit 0
2
4Timer counter set registers 8421
5 128 64 32 16
6Timer counter output registers 8421
7 128 64 32 16
Bank Address Register Bit 3 Bit 2 Bit 1 Bit 0
2
4Timer counter set registers 1100
5 0011
8 Timer set register T E 1 1 1
E Timer control TEST TEMP TF 1
TIRQN pin
Address 8
TE
Count down start
Timer
D3 pin
WRN pin
Finish
SM8580AM
NIPPON PRECISION CIRCUITS—18
CE1 Control Register (Bank 1, Register B)
■This register determines whether the temperature
sensor function and digital correction function in
combination with the CE1 input pin. CTEMP
determines the temperature sensor operation, and
CDT_ON determines the digital correction func-
tion operation.
■CTEMP bit
When CTEMP is set to 0, the temperature sensor
operates only when the CE1 pin is HIGH.
When CTEMP is set to 1, the temperature sensor
operates without any relationship to the CE1 input
state.
Note that the temperature sensor operation also
depends on the bank 2 TEMP bit to be active.
■CDT_ON bit
When CDT_ON is set to 0, the digital correction
function operates only when the CE1 pin is HIGH.
When CDT_ON is set to 1, the digital correction
function operates without any relationship to the
CE1 input state.
Note that the digital correction function also
depends on the bank 2 DT_ON bit to be active.
■Function operation tables
Frequency Set Registers (Bank 1, Registers C, D)
■FD3, FD4 bit
FOUT source clock frequency set bits.
■FD0 to FD2 bits
Frequency divider set bits for the FOUT source
clock set by FD3 and FD4.
■FE bit
FOUT frequency signal set by FD0 to FD4 output
enable bit.
When FCON is HIGH and FE is set to 1, then the
frequency signal set by FD0 to FD4 is output on
FOUT. When FE is set to 0, the FOUT output is
high impedance.
When FCON is LOW, a standard 32.768kHz sig-
nal is output on FOUT without reference to the
settings in the C and D registers.
Bank Address Register Bit 3 Bit 2 Bit 1 Bit 0
1 B CE1 control CTEMP CDT_ON
CE1 pin CTEMP bit TEMP bit Temperature
sensor
××
0 Not operating
L OW 0 1 Not operating
HIGH 0 1 Operating
LOW 1 1 Operating
HIGH 1 1 Operating
CE1 pin CDT_ON bit DT_ON bit Digital
correction
××
0 Not operating
L OW 0 1 Not operating
HIGH 0 1 Operating
LOW 1 1 Operating
HIGH 1 1 Operating
Bank Address Register Bit 3 Bit 2 Bit 1 Bit 0
1C FOUT divider set register F D 2 F D 1 F D 0
D FOUT frequency set register F E F D4 F D3
FD4 FD3 Source clock
0 0 32768Hz
0 1 1024Hz
1 0 32Hz
1 1 1Hz
FD2 FD1 FD0 Frequency divider
ratio FOUT output duty
0 0 0 1/1 1/2
0 0 1 1/2 1/2
0 1 0 1/3 1/3
0 1 1 1/6 1/2
1 0 0 1/5 1/5
1 0 1 1/10 1/2
1 1 0 1/15 1/3
1 1 1 1/30 1/2
FD2 FD1 FD0 Frequency divider
ratio FOUT output duty
SM8580AM
NIPPON PRECISION CIRCUITS—19
Digital Correction Registers (Bank 2, Registers 0, 1)
■These registers enable and set the level of digital
correction applied to oscillator clock. DT_ON
enables the correction function, and bits DT0 to
DT6 set the level of correction to be applied. This
function adjusts the number of 1 second cycles
which occur every 10 seconds.
■When digital correction is not used, a 0 should be
written to DT_ON to disable correction.
■Correction range and resolution (correction range
depends on the frequency)
■DT bits and digital correction (correction value
depends on the frequency)
■Correction value calculation
• Positive correction (leading time)
[DT6:0] = correction ÷ 3.05 (with decimal
round-off)
Example: for correction of 192.15ppm
[DT6:0] = 192.15 ÷ 3.05 = 6310 = 01111112
• Negative correction (lagging time)
[DT6:0] = 128 + correction ÷ 3.05 (with deci-
mal round-off)
Example: for correction of −158.6ppm
[DT6:0] = 128 + (−158.6 ÷ 3.05) = 7610 =
10011002
Bank Address Register Bit 3 Bit 2 Bit 1 Bit 0
20Digital correction registers DT3 DT2 DT1 DT0
1 DT_ON DT6 DT5 DT4
Correction range Correction resolution Correction cycle
−
195.20 to +192.15ppm 3.05ppm 10 seconds
Digital correction bits Correction
(ppm)
DT6 DT5 DT4 DT3 DT2 DT1 DT0
0111111+192.15
0111110+189.10
↓↓
0000010 +6.10
0000001 +3.05
0000000 ±0.00
1111111
−
3.05
1111110
−
6.10
↓↓
1000001
−
192.15
1000000
−
195.20
SM8580AM
NIPPON PRECISION CIRCUITS—20
INTERRUPT OPERATION
Alarm Interrupt
When AIE is 1 and an alarm event occurs (AF bit is set to 1), AIRQN output goes LOW. If AIE is 0, however,
AIRQN is in a high-impedance state. The alarm interrupt is output when a carry from the seconds register to
the minute register occurs.
Timer Interrupt
The timer interrupt mode (level interrupt or periodic interrupt) is selected by the setting of TI/TP.
Level interrupt mode (TI/TP = 0)
When TIE is 1 and a timer interrupt event occurs (TF bit is set to 1), TIRQN goes LOW. When TIE is 0, how-
ever, TIRQN is in a high-impedance state.
"1"
AIE bit
AIRQN pin
AF bit
"0" Hi-Z
*No output while AIE bit is "0".
"1"
"0"
Interrupt is active.
"L" level
Setting AF bit to "0".
"1" "1"
"0"
TIE bit
TIRQN pin
TF bit
"0"
"1"
Setting TF bit to "0".
Interrupt is active.
Hi-Z
"L" level
"0"
"1"
*No output while TIE bit is "0".
"1" "1"
"0"
SM8580AM
NIPPON PRECISION CIRCUITS—21
Periodic interrupt mode (TI/TP = 1)
When TIE is 1 and a timer interrupt event occurs (TF bit is set to 1), TIRQN goes LOW. If TIE is 0, however,
TIRQN is in a high-impedance state, and the TF bit remains set to 1.
The auto-return time (tRTN), shown in the following figure and table, is determined by the source clock fre-
quency set by register D in bank 1 bits FD3 and FD4.
Source clock Auto-return time (t
RTN
)
4096Hz 0.122ms
64Hz 7.81ms
1Hz 7.81ms
1/60Hz 7.81ms
TIE bit
TIRQN pin
TF bit "0"
"1"
"0"
"1"
Auto-return
tRTN
Setting TF bit to "0". Interrupt is active.
Hi-Z
"L" level
Source CLK
Auto return time (tRTN)
TIRQN pin
Interrupt cycle
"0"
Hi-Z
SM8580AM
NIPPON PRECISION CIRCUITS—22
APPLICATION NOTES
Setting the Alarm
Alarms can be set for day, weekday, hour, minute,
and second. However, it is not possible to set an
alarm for more than one weekday.
Note that it is recommended that AF and AIE be set
to 0 at the same time to avoid accidental hardware
interrupts while setting the alarm. After the alarm
data is entered, initialization occurs when AF is
again set to 0.
If the interrupt output is not used by setting AIE set
to 0, an alarm can still be controlled by software
monitoring of the AF bit.
Example 1
To set an alarm for 6pm of the following day:
• Set bits AIE and AF to 0.
• Set the day register AE bit to 1.
• Acquire the current weekday setting from bank
0 register 6, add 1 to the current v alue (e xcept in
the case of Saturday), and write the updated
data. Note that the day following 6H (Saturday)
is 0H (Sunday).
• Write 18H to the hour alarm register.
• Write 00H to the minute alarm register.
• Write 00H to the seconds alarm register.
• Set bit AF to 0.
• Set bit AIE to 1.
Example 2
To set an alarm for 6am on every for Sunday:
• Set bits AIE and AF to 0.
• Set the day alarm register AE bit to 1.
• Write 0H to the weekday alarm register.
• Write 06H to the hour alarm register.
• Write 00H to the minute alarm register.
• Write 00H to the seconds alarm register.
• Set bit AF to 0.
• Set bit AIE to 1.
Using the Temperature Sensor
The SM8580AM temperature sensor can be used to
monitor the surrounding temperature. The tempera-
ture sensor information can then be used to adjust the
clock for any temperature variations in the oscillator
frequency which affect the accuracy of the clock.
One method of utilizing the temperature sensor to
adjust timing errors is by using the clock error cor-
rection function (digital correction), as described
below.
1. Based on the known temperature characteristics
of the oscillator crystal, store temperature cor-
rection values for various temperatures in an
external non-volatile EEPROM.
2. Use an A/D converter, such as in a general-pur-
pose CPU, to convert the VTEMP temperature
sensor output voltage into a digital value.
3. Use the digital value of the current temperature
to access the temperature correction data stored
in the EEPROM, and then write the correspond-
ing data into the digital correction registers.
This procedure is useful in implementing a high-
accuracy clock function.
Monitoring Digital Correction
Using the test mode allows the 64Hz digital correc-
tion clock to be output on pin FOUT. The test mode
works as follows.
1. Apply a HIGH-level on FCON.
2. Set the FOUT frequency set register FE bit to 1.
3. Set the CE1 control register CDT_ON bit to 1.
4. Set correction data in the digital correction regis-
ter DT0 to DT6 bits, and then set DT_ON to 1.
5. Set the bank 2 register C, bit 1 to 1.
6. When CE0N is LOW and CE1 is HIGH and the
test mode set register TEST bit is set to 1, the
digital correction cycle changes from 10 seconds
to 1/64 seconds, and the clock output on FOUT
is the 64Hz clock after timing correction. The
output is the corrected timing for the set digital
correction value corresponding to a 64Hz clock
× 64[ppm]. Measuring this output provides a
quick method for monitoring the digital correc-
tion function.
7. When CE0N goes HIGH, the TEST bit is reset to
1 and test mode is released.
SM8580AM
NIPPON PRECISION CIRCUITS—23
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to
improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for
the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits
are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision
Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without fur ther testing or modification.
The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or
malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter,
including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or
indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies.
NIPPON PRECISION CIRCUITS INC.
4-3, Fukuzumi 2-chome
Koto-ku, Tokyo 135-8430, Japan
Telephone: 03-3642-6661
Facsimile: 03-3642-6698
NC9915AE 2000.05
NIPPON PRECISION CIRCUITS INC.
