IS31AP2010B
Integrated Silicon Solution, Inc. – www.issi.com
Rev.B, 04/10/2013
1
3W@5.0V MONO FILTER-LESS CLASS-D AUDIO POWER AMPLIFIER
April 2013
GENERAL DESCRIPTION
The IS31AP2010B is a high efficiency, 3W@5.0V
mono filter-less Class-D audio power amplifier. A low
noise, filter-less PWM architecture eliminates the
output filter, reduces external component count,
system cost, and simplifying design.
Operating in a single 5.0V supply, IS31AP2010B is
capable of driving 4Ω speaker load at a continuous
average output of 3W@10% THD+N. The
IS31AP2010B has high efficiency with speaker load
compared to a typical class- AB amplifier.
In cellular handsets, the earpiece, speaker phone, and
melody ringer speaker can each be driven by the
IS31AP2010B. The gain of IS31AP2010B is externally
configurable which allows independent gain control
from multiple sources by summing signals from each
function.
IS31AP2010B is available in UTQFN-9 packages. It
operates from 2.7V to 5.5V over the temperature range
of -40°C to +85°C.
FEATURES
5.0V supply at THD+N = 10%
―3W into 4Ω (Typ.)
―1.68W into 8Ω (Typ.)
Efficiency at 5.0V
―85% at 400mW with a 4Ω speaker
―88% at 400mW with an 8Ω speaker
Less than 1μA shutdown current
Optimized PWM output stage eliminates LC output
filter
Fully differential design reduces RF rectification
and eliminates bypass capacitor
Improved CMRR eliminates two input coupling
capacitors
Integrated click-and-pop suppression circuitry
UTQFN-9 package
RoHS compliant and 100% lead(Pb)-free
APPLICATIONS
Wireless or cellular handsets and PDAs
Portable DVD player
Notebook PC
Portable radio
Educational toys
Portable gaming
TYPICAL APPLICATION CIRCUIT
OUT+
GND
IS31AP2010B
B1,B2
A3
C3
VCC
OUT-
CS
1 F
VBattery
C1 IN-
IN+
A1
0.1 F
A2,B3
SDB
C2
100k
CIN+
0.1 F
CIN-
0.1 F
RIN+
150k
RIN-
150k
Differential
Input
Shutdown
Control
Figure 1 Typical Application Circuit
IS31AP2010B
Integrated Silicon Solution, Inc. – www.issi.com
Rev.B, 04/10/2013
2
PIN CONFIGURATION
Package Pin Configuration (Top View)
UTQFN-9
PIN DESCRIPTIO N
No. Pin Description
A1 IN+ Positive audio input.
A2, B3 GND Connect to ground.
A3 OUT- Negative audio output.
B1, B2 VCC Power supply.
C1 IN- Negative audio input.
C2 SDB Enter in shutdown mode when active low.
C3 OUT+ Positive audio output.
Copyright©2013IntegratedSiliconSolution,Inc.Allrightsreserved.ISSIreservestherighttomakechangestothisspecificationanditsproductsatany
timewithoutnotice.ISSIassumesnoliabilityarisingoutoftheapplicationoruseofanyinformation,productsorservicesdescribedherein.Customersare
advisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonanypublishedinformationandbeforeplacingordersforproducts.
IntegratedSiliconSolution,Inc.doesnotrecommendtheuseofanyofitsproductsinlifesupportapplicationswherethefailureormalfunctionofthe
productcanreasonablybeexpectedtocausefailureofthelifesupportsystemortosignificantlyaffectitssafetyoreffectiveness.Productsarenot
authorizedforuseinsuchapplicationsunlessIntegratedSiliconSolution,Inc.receiveswrittenassurancetoitssatisfaction,that:
a.)theriskofinjuryordamagehasbeenminimized;
b.)theuserassumeallsuchrisks;and
c.)potentialliabilityofIntegratedSiliconSolution,Incisadequatelyprotectedunderthecircumstances
IS31AP2010B
Integrated Silicon Solution, Inc. – www.issi.com
Rev.B, 04/10/2013
3
ORDERING INFORMATION
Industrial Range: -40°C to +85°C
Order Part No. Package QTY/Reel
IS31AP2010B-UTLS2-TR UTQFN-9, Lead-free 3000
IS31AP2010B
Integrated Silicon Solution, Inc. – www.issi.com
Rev.B, 04/10/2013
4
ABSOLUTE MAXIMUM RATINGS
Supply voltage, VCC -0.3V ~ +6.0V
Voltage at any input pin -0.3V ~ VCC+0.3V
Junction temperature, TJMAX 150°C
Storage temperature range, TSTG -65°C ~ +150°C
Operating temperature range, TA −40°C ~ +85°C
Note:
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only
and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
VCC = 2.7V ~ 5.5V, TA = 25°C, unless otherwise noted. (Note 1)
Symbol Parameter Condition Min. Typ. Max. Unit
VCC Supply voltage 2.7 5.5 V
|VOS| Output offset voltage
(measured differentially) VSDB = 0V, AV = 2V/V 10 mV
ICC Quiescent current VCC = 5.5V, no load 2.6 mA
VCC = 2.7V, no load 1.2
ISDB Shutdown current VSDB = 0.4V 1 μA
fSW Switching frequency 250 kHz
RIN Input resistor Gain ≤ 20V/V 15 kΩ
Gain RIN = 150kΩ 2 V/V
VIH High-level input voltage 1.4 V
VIL Low-level input voltage 0.4 V
IS31AP2010B
Integrated Silicon Solution, Inc. – www.issi.com
Rev.B, 04/10/2013
5
ELECTRICAL CHARACTERISTICS
TA = 25°C, Gain = 2V/V, CIN = 2μF, unless otherwise noted. (Note 2)
Symbol Parameter Condition Min. Typ. Max. Unit
PO Output power
THD+N = 10%
f = 1kHz, RL = 8Ω
VCC = 5.0V 1.68
W
VCC = 4.2V 1.2
VCC = 3.6V 0.88
THD+N = 10%
f = 1kHz, RL = 4Ω
VCC = 5.0V 3.0
W
VCC = 4.2V 2.0
VCC = 3.6V 1.5
THD+N = 1%
f = 1kHz, RL = 8Ω
VCC = 5.0V 1.4
W
VCC = 4.2V 1.0
VCC = 3.6V 0.7
THD+N = 1%
f = 1kHz, RL = 4Ω
VCC = 5.0V 2.4
W
VCC = 4.2V 1.68
VCC = 3.6V 1.2
THD+N Total harmonic
distortion plus noise
VCC = 4.2V, PO = 0.6W, RL = 8Ω, f = 1kHz 0.18 %
VCC = 4.2V, PO = 1.1W, RL = 4Ω, f = 1kHz 0.22
VNO Output voltage noise VCC = 4.2V, f = 20Hz ~ 20kHz
Inputs AC-grounded 80 μVrms
TWU Wake-up time from
shutdown VCC = 3.6V 32 ms
SNR Signal-to-noise ratio PO = 1.0W, RL = 8Ω, VCC = 4.2V 91 dB
PSRR Power supply rejection
ratio
f = 217Hz，RL = 8Ω
Input grounded
VCC = 5.0V -75
dB
VCC = 4.2V -70
VCC = 3.6V -66
Note 1: All parts are production tested at TA = 25°C. Other temperature limits are guaranteed by design.
Note 2: Guaranteed by design.
IS31AP2010B
Integrated Silicon Solution, Inc. – www.issi.com
Rev.B, 04/10/2013
6
TYPICAL PERFORMANCE CHARACTERISTIC
Output Power(W)
THD+N(%)
20
10
5
2
1
0.5
0.2
0.1
10m 20m 50m 100m 500m 123
RL= 8Ω
f = 1kHz
VCC = 3.6V
VCC = 4.2V
VCC = 5.0V
Figure 2 THD+N vs. Output Power
Frequency(Hz)
THD+N(%)
0.05
10
5
2
1
0.5
0.2
0.1
20 50 100 200 500 1k 2k 5k 20k
0.02
0.01
R
L
= 8Ω
V
CC
=3.6V
Po = 0.45W
V
CC
= 5.0V
Po = 0.9W
V
CC
= 4.2V
Po = 0.6W
Figure 4 THD+N vs. Frequency
Frequency(Hz)
PSRR(dB)
20 50 100 200 500 1k 2k 5k 20k
+0
-10 0
-80
-60
-40
-20
R
L
= 8Ω
Input Grouded
V
CC
= 3.6V
V
CC
= 4.2V
V
CC
= 5.0V
Figure 6 PSRR vs. Frequency
Output Power(W)
THD+N(%)
20
10
5
2
1
0.5
0.2
0.1
10m 20m 50m 100m 500m 12
3
R
L
= 4Ω
f = 1kHz
4
V
CC
= 3.6V
V
CC
= 4.2V
V
CC
= 5.0V
Figure 3 THD+N vs. Output Power
Frequency(Hz)
THD+N(%)
0.05
10
5
2
1
0.5
0.2
0.1
20 50 100 200 500 1k 2k 5k 20k
0.02
0.01
R
L
= 4Ω
V
CC
=3.6V
Po = 0.8W
V
CC
= 4.2V
Po = 1.1W
V
CC
= 5.0V
Po = 1.5W
Figure 5 THD+N vs. Frequency
Frequency(Hz)
PSRR(dB)
20 50 100 200 500 1k 2k 5k 20k
-120
+0
-100
-80
-60
-40
-20
R
L
= 4Ω
Input Grouded
V
CC
= 4.2V
V
CC
= 5.0V
V
CC
= 3.6V
Figure 7 PSRR vs. Frequency
IS31AP2010B
Integrated Silicon Solution, Inc. – www.issi.com
Rev.B, 04/10/2013
7
Frequency(Hz)
Output
V
oltage(uV)
20 50 100 200 500 1k 2k 5k 20k
10
200
20
30
50
70
100
V
CC
= 3.6V~5.0V
R
L
= 4Ω, 8Ω
Figure 8 Noise
Output Power(W)
Efficiency(%)
100
80
60
40
20
0
0 0.3 0.6 0.9 1.2 1.5
V
CC
= 5.0V
R
L
=8ΩR
L
=4Ω
Figure 9 Efficiency
IS31AP2010B
Integrated Silicon Solution, Inc. – www.issi.com
Rev.B, 04/10/2013
8
FUNCTIONAL BLOCK DIAGRAM
IS31AP2010B
Integrated Silicon Solution, Inc. – www.issi.com
Rev.B, 04/10/2013
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APPLICATION INFORMATION
FULLY DIFFERENTIAL AMPLIFIER
The IS31AP2010B is a fully differential amplifier with
differential inputs and outputs. The fully differential
amplifier consists of a differential amplifier and a
common mode amplifier. The differential amplifier
ensures that the amplifier outputs a differential voltage
on the output that is equal to the differential input times
the gain. The common-mode feedback ensures that
the common-mode voltage at the output is biased
around VCC/2 regardless of the common-mode
voltage at the input. The fully differential IS31AP2010B
can still be used with a single-ended input; however,
the IS31AP2010B should be used with differential
inputs when in a noisy environment, like a wireless
handset, to ensure maximum noise rejection.
ADVANTAGES OF FULLY DIFFERENTIAL
AMPLIFIERS
The fully differential amplifier does not require a
bypass capacitor. This is because any shift in the
mid-supply affects both positive and negative channels
equally and cancels at the differential output.
GSM handsets save power by turning on and shutting
off the RF transmitter at a rate of 217Hz. The
transmitted signal is picked-up on input and output
traces. The fully differential amplifier cancels the signal
much better than the typical audio amplifier.
COMPONENT SELECTION
Figure 10 shows the IS31AP2010B with differential
inputs and input capacitors, and Figure 11 shows the
IS31AP2010B with single-ended inputs. Differential
inputs should be used whenever possible because the
single-ended inputs are much more susceptible to
noise.
OUT+
GND
IS31AP2010B
B1,B2
A3
C3
VCC
OUT-
CS
1 F
VBattery
C1 IN-
IN+
A1
0.1 F
A2,B3
SDB
C2
100k
CIN+
0.1 F
CIN-
0.1 F
RIN+
150k
RIN-
150k
Differential
Input
Shutdown
Control
Figure 10 Differential Input
Figure 11 Single-Ended Input
INPUT RESISTORS (RIN)
The input resistors (RIN) set the gain of the amplifier
according to Equation (1).
IN
F
RR
ain
2
G
V
V (1)
Resistor matching is very important in fully differential
amplifiers. The balance of the output on the reference
voltage depends on matched ratios of the resistors.
CMRR, PSRR, and cancellation of the second
harmonic distortion diminish if resistor mismatch
occurs. Therefore, it is recommended to use 1%
tolerance resistors or better to keep the performance
optimized. Matching is more important than overall
tolerance. Resistor arrays with 1% matching can be
used with a tolerance greater than 1%.
Place the input resistors very close to the
IS31AP2010B to limit noise injection on the
high-impedance nodes.
For optimal performance the gain should be set to
2V/V or lower. Lower gain allows the IS31AP2010B to
operate at its best, and keeps a high voltage at the
input making the inputs less susceptible to noise.
DECOUPLING CAPACITOR (CS)
The IS31AP2010B is a high performance Class-D
audio amplifier that requires adequate power supply
decoupling to ensure the efficiency is high and total
harmonic distortion (THD) is low. For higher frequency
transients, spikes, or digital hash on the line, a good
low equivalent-series-resistance (ESR) ceramic
capacitor, typically 1μF, placed as close as possible to
the device VCC lead works best. Placing this
decoupling capacitor close to the IS31AP2010B is very
important for the efficiency of the Class-D amplifier,
because any resistance or inductance in the trace
between the device and the capacitor can cause a loss
in efficiency. For filtering lower frequency noise signals,
a 10μF or greater capacitor placed near the audio
power amplifier would also help, but it is not required in
most applications because of the high PSRR of this
device.
IS31AP2010B
Integrated Silicon Solution, Inc. – www.issi.com
Rev.B, 04/10/2013
10
INPUT CAPACITORS (CIN)
The input capacitors and input resistors form a high
pass filter with the corner frequency, fC, determined in
Equation (2).
ININ CR
c
f
2
1
(2)
The value of the input capacitor is important to
consider as it directly affects the bass (low frequency)
performance of the circuit. Speakers in wireless
phones cannot usually respond well to low frequencies,
so the corner frequency can be set to block low
frequencies in this application.
Equation (3) is reconfigured to solve for the input
coupling capacitance.
CIN
IN fR
C
2
1
(3)
If the corner frequency is within the audio band, the
capacitors should have a tolerance of ±10% or better,
because any mismatch in capacitance causes an
impedance mismatch at the corner frequency and
below.
For a flat low frequency response, use large input
coupling capacitors (1μF). However, in a GSM phone
the ground signal is fluctuating at 217Hz, but the signal
from the codec does not have the same 217Hz
fluctuation. The difference between the two signals is
amplified, sent to the speaker, and heard as a 217Hz
hum.
SUMMING INPUT SIGNALS
Most wireless phones or PDAs need to sum signals at
the audio power amplifier or just have two signal
sources that need separate gain. The IS31AP2010B
makes it easy to sum signals or use separate signal
sources with different gains. Many phones now use the
same speaker for the earpiece and ringer, where the
wireless phone would require a much lower gain for
the phone earpiece than for the ringer. PDAs and
phones that have stereo headphones require summing
of the right and left channels to output the stereo signal
to the mono speaker.
SUMMING TWO DI FFERENTIAL INPUT SIGNALS
Two extra resistors are needed for summing
differential signals (a total of 5 components). The gain
for each input source can be set independently (see
Equations (4) and (5) and Figure 12).
1
1
1502
1
IN
I
ORk
Gain V
V
V
V (4)
2
2
1502
2
IN
I
ORk
Gain V
V
V
V (5)
If summing left and right inputs with a gain of 1V/V, use
RIN1 = RIN2 = 300kΩ.
If summing a ring tone and a phone signal, set the
ring-tone gain to Gain1 = 2V/V, and the phone gain to
Gain2 = 0.1V/V. The resistor values would be
RIN1 = 150kΩ, RIN2 = 3MΩ.
Figure 12 Summing Two Differential Inputs
SUMMING A DIFFERENTIAL INPUT SIGNAL AND A
SINGLE-ENDED INPUT SIGNAL
Figure 13 shows how to sum a differential input signal
and a single-ended input signal. Ground noise may
couple in through IN- with this method. It is better to
use differential inputs. The gain for each input source
can be set independently by Equations (4) and (5). The
corner frequency of the single-ended input is set by
CIN2, shown in Equation (6).
CIN
IN fR
C
2
22
1
(6)
To assure that each input is balanced, the
single-ended input must be driven by a low-impedance
source even if the input is not in use. If summing a ring
tone and a phone signal, the phone signal should use
a differential input signal while the ring tone might be
limited to a single-ended signal. Ring-tone gain is set
to Gain1 = 2V/V, and phone gain is set to Gain2 =
0.1V/V, the resistor values would be RIN1 = 150kΩ, RIN2
= 3MΩ.
The high pass corner frequency of the single-ended
input is set by CIN2. If the desired corner frequency is
less than 20Hz.
So, Hzk
IN
C201502
1
2
and pFCIN 53
2
IS31AP2010B
Integrated Silicon Solution, Inc. – www.issi.com
Rev.B, 04/10/2013
11
Figure 13 Summing Differential Input and Single-Ended Input
Signals
SUMMING TWO SINGLE-ENDED INPUT SIGNALS
The gain and corner frequencies (fC1 and fC2) for each
input source can be set independently by Equations (4)
and (5). Resistor, RP, and capacitor, CP, are needed on
the IN+ terminal to match the impedance on the IN-
terminal. The single-ended inputs must be driven by
low impedance sources even if one of the inputs is not
outputting an ac signal.
CIN
IN fR
C
1
12
1
(7)
CIN
IN fR
C
2
22
1
(8)
21 ININp CCC (9)
21
21
ININ
ININ
PRR RR
R
(10)
Figure 14 Summing Two Single-Ended Inputs
EMI EVALUATION RESULT
30 100 10001000 MHz
0
10
20
30
40
50
60
70
80 dBuV/m
RE_B
Figure 15 EMI Evaluation Result
IS31AP2010B
Integrated Silicon Solution, Inc. – www.issi.com
Rev.B, 04/10/2013
12
CLASSIFICATION REFLOW PROFI LES
Profile Feature Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp) 3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)* Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc) Max 30 seconds
Average ramp-down rate (Tp to Tsmax) 6°C/second max.
Time 25°C to peak temperature 8 minutes max.
Figure 16 Classification Profile
IS31AP2010B
Integrated Silicon Solution, Inc. – www.issi.com
Rev.B, 04/10/2013
13
PACKAGING I NFORMATION
UTQFN-9
Note: All dimensions in millimeters unless otherwise stated.
