10/2011
AWU6601
HELP3TM Band 1 / WCDMA / TD-SCDMA
3.4 V / 28.25 dBm Linear PA Module
Data Sheet - Rev 2.4
M45 Package
10 Pin 3 mm x 3 mm x 1 mm
Surface Mount Module
Figure 1: Block Diagram
FEATURES
HSPA Compliant
InGaP HBT Technology
Simpler Calibration with only 2 Bias Modes
Low Quiescent Current: 9 mA
Low Leakage Current in Shutdown Mode: <1 µA
Internal Voltage Regulator
Integrated “daisy chainable” directional couplers
with CPLIN and CPLOUT Ports
Optimized for a 50 System
Low Miniature Surface Mount Package
RoHS Compliant Package, 260 oC MSL-3
WCDMA/HSPA Mode
High (R99 waveform)
40 % @ POUT = +28.25 dBm
25 % @ POUT = +17 dBm
Low Quiescent Current: 9 mA
TD-SCDMA Mode
36 % @ POUT = +27 dBm
20 % @ POUT = +16 dBm
APPLICATIONS
Wireless Handsets and Data Devices for
WCDMA/HSPA IMT-Band
TD-SCDMA 1.8/2.0 GHz Band
PRODUCT DESCRIPTION
The AWU6601 HELP3TM PA is a 3rd generation
WCDMA product for UMTS handsets. This PA
incorporates ANADIGICS’ HELP3TM technology to
provide low power consumption without the need
for an external voltage regulator. A “daisy chainable”
directional coupler is integrated in the module thus
eliminating the need of external couplers. The
device is manufactured on an advanced InGaP HBT
MMIC technology offering state-of-the-art reliability,
temperature stability, and ruggedness. There are two
selectable bias modes that optimize for
different output power levels, and a shutdown mode
with low leakage current, which increases handset talk
and standby time. The self-contained 3 mm x 3 mm x
1 mm surface mount package incorporates matching
networks optimized for output power, and
linearity in a 50 system.
AWU6601
1
2
3
4
5
10
9
8
7
6
V
BATT
RF
IN
V
MODE2
(N/C)
V
MODE1
V
EN
CPL
OU
T
GND
CPL
IN
RF
OUT
V
CC
Bias Control
Voltage Regulation
CPL
GND at Slug (pad)
2Data Sheet - Rev 2.4
10/2011
AWU6601
Figure 2: Pinout (X-ray Top View)
Table 1: Pin Description
V
BATT
RF
IN
V
MODE2
(N/C)
V
MODE1
V
EN
1
2
3
4
56
7
8
9
10
CPL
OUT
GND
CPL
IN
RF
OUT
V
CC
1
2
3
4
56
7
8
9
10
PIN NAME DESCRIPTION
1 V
BATT
Battery Voltage
2RF
IN
RF Input
3 V
MODE2
(N/C) No Connection
4 V
MODE1
Mode Control Voltage 1
5 V
EN
PA Enable Voltage
6CPL
OUT
Coupler Output
7GND Ground
8CPL
IN
Coupler Input
9RF
OUT
RF Output
10 V
CC
Supply Voltage
3Data Sheet - Rev 2.4
10/2011
AWU6601
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Minimum and Maximum Ratings
Stresses in excess of the absolute ratings may cause permanent damage.
Functional operation is not implied under these conditions. Exposure
to absolute ratings for extended periods of time may adversely affect
reliability.
Table 3: Operating Ranges
The device may be operated safely over these conditions; however, parametric performance is guaranteed only
over the conditions dened in the electrical specications.
Notes:
(1) For operation at Vcc = +3.2 V, Pout is derated by 0.5 dB.
PARAMETER MIN MAX UNIT
SupplyVoltage(V
CC
)0+5 V
BatteryVoltage(V
BATT
)0+6 V
ControlVoltages(V
MODE1
, V
ENABLE
)0+3.5 V
RFInputPower(P
IN
)-+10 dBm
StorageTemperature(T
STG
)-40 +150 °C
PARAMETERMINTYPMAXUNITCOMMENTS
Operating Frequency (f)
1920
1880
2010
-
-
-
1980
1920
2025
MHz
UMTS Band 1
TD-SCDMA Band
TD-SCDMA Band
Supply Voltage (V
CC
)+3.2+3.4+4.2VP
OUT
< +28.25 dBm
Enable Voltage (V
ENABLE
)+2.15
0
+2.4
0
+3.1
+0.5 VPA "on"
PA "shut down"
Mode Control Voltage (V
MODE1
)+1.6
0
+2.4
0
+3.1
+0.5 VLow Bias Mode
High Bias Mode
RF Output Power (P
OUT
)
R99 WCDMA, HPM
HSPA (MPR=0), HPM
R99 WCDMA, LPM
HSPA (MPR=0), LPM
27.75
(1)
26.75
(1)
16.5
(1)
15.5
(1)
28.25
27.25
17
16
28.25
27.25
17
16
dBm3GPP TS 34.121-1, Rel 8
Ta ble C.11.1.3, Subtest 1
RF Output Power (P
OUT
), TD-SCDMA
TD-SCDMA (HPM)
TD-SCDMA (LPM)
26.5
15.5
27
16.0
27
16.0 dBm3GPP TS 25.62
Section 6.2.1
Case Te mperature (T
C
)-30 -+90 °C
4Data Sheet - Rev 2.4
10/2011
AWU6601
Table 4: Electrical Specications - UMTS/WCDMA Mode
(TC = +25 °C, VCC = +3.4 V, VBATT = +3.4 V, VENABLE = +2.4 V, 50 system, R99 waveform)
Notes:
(1) ACLR and Efciency measured at 1950 MHz.
(2) Noise measured at 2110 MHz to 2170 MHz.
PARAMETERMINTYPMAXUNIT
COMMENTS
P
OUT
V
MODE1
Gain 25
11.5
27.5
13.5
29.5
16 dB +28.25 dBm
+17 dBm
0 V
2.4 V
ACLR1 at 5 MHz offset
(1)
-
-
-41
-44
-37
-38dBc+28.25 dBm
+17 dBm
0 V
2.4 V
ACLR2 at 10 MHz offset -
-
-55
-55
-48
-48dBc+28.25 dBm
+17 dBm
0 V
2.4 V
Power-Added Efficiency
(1)
36
21
40
24
-
-%+28.25 dBm
+17 dBm
0 V
2.4 V
Quiescent Current (Icq)
Low Bias Mode -913 mA V
MODE1
= +2.4 V
Mode Control Current -0.3 0.5mAthrough V
MODE
pin, V
MODE1
= +2.4 V
Enable Current -0.3 0.5mAthrough VENABLE pin
BATT Current -2.5 5mAthrough VBATT pin, V
MODE1
= +2.4 V
Leakage Current -<15 µA V
BATT
= +4.2 V, V
CC
= +4.2 V, V
ENABLE
= 0 V, V
MODE1
= 0 V
Noise in Receive Band
(2)
-
-
-137
-143
-135
-138 dBm/Hz P
OUT
< +28.25 dBm, V
MODE1
= 0V
P
OUT
< 17 dBm, V
MODE1
= +2.4 V
Harmonics
2fo
3fo, 4fo
-
-
-42
-50
-35
-35dBcP
OUT
< +28.25 dBm
Input Impedance --2:1VSWR
Coupling Factor -19- dB
Directivity -19- dB
Coupler IN-OUT
Daisy Chain Insertion Loss -<0.25 -dB
698 MHz to 2620 MHz
Pin 8 to 6
Shutdown Mode
Spurious Output Level
(all spurious outputs) ---70dBc
P
OUT
< +28.25 dBm
In-band load VSWR < 5:1
Out-of-band load VSWR < 10:1
Applies over all operating conditions
Load mismatch stress with no
permanent degradation or failure8:1- -VSWRApplies over full operating range
Phase Delta (HPM-LPM)-10 -Deg
5Data Sheet - Rev 2.4
10/2011
AWU6601
Table 5: Electrical Specications - TD-SCDMA Mode
(TC = +25 °C, VCC = +3.4 V, VBATT = +3.4 V, VENABLE = +2.4 V, 50 system)
PARAMETERMINTYPMAXUNIT
COMMENTS
P
OUT
V
MODE1
Gain 25
11.5
27.5
13.5
-
-dB +27 dBm
+16 dBm
0 V
2.4 V
ACLR1 at 1.6 MHz offset -
-
-42
-42
-38
-38dBc+27 dBm
+16 dBm
0 V
2.4 V
ACLR2 at 3.2 MHz offset -
-
-55
-55
-48
-48dBc+27 dBm
+16 dBm
0 V
2.4 V
Power-Added Efficiency
(without DC/DC Converter)
33
18
36
20
-
-%+27 dBm
+16 dBm
0 V
2.4 V
Quiescent Current (Icq)
Low Bias Mode -912 mA V
MODE1
= +2.4 V
Mode Control Current -0.3 0.5mAthrough V
MODE
pin, V
MODE1
= +2.4 V
Enable Current -0.3 0.5mAthrough V
ENABLE
pin, V
EN
= +2.4 V
BATT Current -2.5 5mAthrough V
BATT
pin, V
MODE1
= +2.4 V
Leakage Current -<15 µA V
BATT
= +4.3 V, V
CC
= +4.3 V,
V
ENABLE
= 0 V, V
MODE1
= 0 V
Harmonics
2fo
3fo, 4fo
-
-
-
-
-35
-35dBcP
OUT
< +27 dBm
Input Impedance--2:1 VSWR
Load mismatch stress with no
permanent degradation or failure8:1- -VSWRApplies over full operating range
6Data Sheet - Rev 2.4
10/2011
AWU6601
APPLICATION INFORMATION
To ensure proper performance, refer to all related
Application Notes on the ANADIGICS web site:
http://www.anadigics.com
Shutdown Mode
The power amplier may be placed in a shutdown
mode by applying logic low levels (see Operating
Rangestable)totheVENABLE and VMODE1voltages.
Bias Modes
ThepowerampliermaybeplacedineitheraLowBias
mode or a High Bias mode by applying the appropriate
logic level (see Operating Ranges table) to VMODE1.
The Bias Control table lists the recommended modes
of operation for various applications. VMODE2 is not
necessary for this PA.
Two operating modes are available to optimize
current consumption. High Bias/High Power operating
mode is for POUTlevels> 16 dBm. At around 17 dBm
output power, the PA should be “Mode Switched” to
Medium/Low power mode for lowest quiescent current
consumption.
Table 6: Bias Control (WCDMA/UMTS)
Table 7: Bias Control (TD-SCDMA)
APPLICAT IONP
OUT
LEVELS BIAS MODE V
ENABLE
V
MODE1
V
CC
V
BATT
UMTS - high power
(High Bias Mode) > +16 dBmHigh+2.4 V0 V3.2 - 4.2 V> 3.2 V
UMTS - med/low power
(Low Bias Mode)< +17 dBmLow +2.4 V+2.4 V3.2 - 4.2 V> 3.2 V
Optional lower V
CC
in low
power mode < +7 dBmLow +2.4 V+2.4 V1.5 V> 3.2 V
Shutdown-Shutdown0 V0 V3.2 - 4.2 V> 3.2 V
APPLICAT IONP
OUT
LEVELSBIAS MODE V
ENABLE
V
MODE1
V
CC
V
BATT
TD-SCDMA - high power
(High Bias Mode) > +15 dBmHigh+2.4 V0 V3.2 - 4.2 V> 3.2 V
TD-SCDMA - med/low
power (Low Bias Mode)< +16 dBmLow +2.4 V+2.4 V3.2 - 4.2 V> 3.2 V
Shutdown-Shutdown0 V0 V3.2 - 4.2 V> 3.2 V
7Data Sheet - Rev 2.4
10/2011
AWU6601
CHARACTERIZATION DATA
(WCDMA Rel 99, VCC = 3.4 V, VEN = 2.4 V, T = 25 8C)
0
5
10
15
20
25
30
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
Gain (dB)
1920MHz
1950MHz
1980MHz
0
50
100
150
200
250
300
350
400
450
500
550
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
Current (mA)
1920MHz
1950MHz
1980MHz
-70
-65
-60
-55
-50
-45
-40
-35
-30
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
ACLR1 (dBc)
1920MHz
1950MHz
1980MHz
-80
-75
-70
-65
-60
-55
-50
-45
-40
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
ACLR2 (dBc)
1920MHz
1950MHz
1980MHz
0
5
10
15
20
25
30
35
40
45
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
PAE (%)
1920MHz
1950MHz
1980MHz
Figure 3: Gain vs Output Power Figure 4: Current vs Output Power
Figure 5: ACLR1 (5 MHz offset) vs Output Power Figure 6: ACLR2 (10 MHz offset) vs Output
Power
Figure 7: Efciency vs Output Power
8Data Sheet - Rev 2.4
10/2011
AWU6601
CHARACTERIZATION DATA
(HSPA, Rel 8, VCC = 3.4 V, VEN = 2.4 V, T = 25 8C)
Figure 8: Gain vs Output Power Figure 9: Current vs Output Power
Figure 10: ACLR1 (5MHz offset) vs Output Power Figure 11: ACLR2 (10MHz offset) vs Output
Power
Figure 12: Efciency vs Output Power
0
5
10
15
20
25
30
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
Gain (dB)
1920MHz
1950MHz
1980MHz
0
50
100
150
200
250
300
350
400
450
500
550
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
Current (mA)
1920MHz
1950MHz
1980MHz
-65
-60
-55
-50
-45
-40
-35
-30
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
ACLR1 (dBc)
1920MHz
1950MHz
1980MHz
-80
-75
-70
-65
-60
-55
-50
-45
-40
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
ACLR2 (dBc)
1920MHz
1950MHz
1980MHz
0
5
10
15
20
25
30
35
40
-10 -5 0 5 10 15 20 25 30
Pout (dBm)
PAE (%)
1920MHz
1950MHz
1980MHz
9Data Sheet - Rev 2.4
10/2011
AWU6601
Figure 13: Evaluation Board Schematic
Figure 14: Evaluation Board Layout
C3
2.2 µFceramic
RFIN
1
6
7
10
8
5
4
3
VBATT
VMODE1
RFOUTRFIN
GND
VCC
VEN CPLOUT
VCC
C1
33 pF
VBATT
VMODE1
VEN
CPLIN
29
VMODE2 (N/C)
C6
2.2 µF
C2
0.1 µF
GND at slug
CPLIN
C4
68 pF
CPLOUT
RFOUT
C5
0.01 µF
10 Data Sheet - Rev 2.4
10/2011
AWU6601
HELP3
TheAWU6601 power amplier module is based on
ANADIGICS proprietary HELP3™ technology. The
PA is designed to operate up to 17 dBm in the low
power mode, thus eliminating the need for three gain
state, while still maintaining low quiescent current
andhighefciencyinlowandmediumpowerlevels.
ThePAcanstillbe operatedas3gainstate device
if the customer chooses to. The directional “daisy
chainable” coupler is integrated within the PA module,
therefore there is no need for external couplers.
TheAWU6601 has an integrated voltage regulator,
which eliminates the need for an external constant
voltage source. The PA is turn on/off is controlled
by VEN pin. A single VMODE control logic (VMODE1) is
neededtooperatethisdevice.
The DG09 power distribution (g 15) highlights the
needtoimprovethecurrentconsumptioninlowand
medium power level. TheAWU6601 is designed to
operate up to 17 dBm in the low power mode with
verylowquiescentcurrent.Currentconsumptionfor
AWU6601isalsoplottedinthegure5.
31.5 mA Average Current over DG09 Profile
0.000
0.010
0.020
0.030
0.040
0.050
0.060
0.070
0.080
0.090
0.100
0.110
0.120
0.130
0.140
0.150
-60-50 -40-30 -20-10 0102030
Antenna Power (dBm)
DG09 PDF
0
50
100
150
200
250
300
350
400
450
500
AWU6601 Current (mA)
DG09 PDF
AWU6601 (mA)
Figure 15: PDF and Current
Figure 16: Typical Application Circuit
AWU6601 requires only two calibration sweeps for
systemcalibration,thussavingcalibrationtime.
Figure 16 shows one application example on mobile
board. C1 and C2 are RF bypass caps and should
be placed nearby pin 1 and pin 10. Bypass caps
C9andC5maynotbeneeded.Alsoa“T”matching
topology is recommended at PA RFIN and RFOUT
portstoprovidematchingbetweeninputTXFilterand
Duplexer / Isolator.
VBATT
RFIN
VMODE2 (N/C)
VMODE1
VEN
RFOUT
CPLIN
CPLOUT
GND
VCC
C1 C2
C6
VBATT
C4 C10RFOUT
C7 C8
TX filter
PA_R1
PA_R0
PA_0N
C9
C5
BB
GND
at slug
L2
(N/C)
L1
RFIN
50Ω
GND
GND
GND
GND
GND
GND
GND
GND
To
Detector
Duplexer
11 Data Sheet - Rev 2.4
10/2011
AWU6601
Figure 17: M45 Package Outline - 10 Pin 3 mm x 3 mm x 1 mm Surface Mount Module
Figure 18: Branding Specication - M45 Package
PACKAGE OUTLINE
6601R
LLLLNN
YYWWCC
Pin 1 Identifier
Part Number
Date Code
YY=Year; WW=Work week Country Code (CC)
Lot Number
12 Data Sheet - Rev 2.4
10/2011
AWU6601
Figure 19: Recommended PCB Layout Information
PCB AND STENCIL DESIGN GUIDELINE
13 Data Sheet - Rev 2.4
10/2011
AWU6601
COMPONENT PACKAGING
Figure 20: Tape & Reel Packaging
Table 8: Tape & Reel Dimensions
Pin 1
PACKAGE TYPE TAPE WIDTH POCKET PITCH REEL CAPACITY MAX REEL DIA
3 mm x 3 mm x 1 mm 12 mm 4 mm 2500 7"
WARNING
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS product
in any such application without written consent is prohibited.
IMPORTANT NOTICE
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without notice.
The product specications contained in Advanced Product Information sheets and Preliminary Data Sheets are subject to
change prior to a product’s formal introduction. Information in Data Sheets have been carefully checked and are assumed
to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges customers
to verify that the information they are using is current before placing orders.
Data Sheet - Rev 2.4
10/2011
14
AWU6601
ORDERING INFORMATION
ORDER NUMBER TEMPERATURE
RANGE
PACKAGE
DESCRIPTION COMPONENT PACKAGING
AWU6601RM45Q7 -30
o
Cto+90
o
C
RoHS Compliant 10 Pin
3 mm x 3 mm x 1 mm
Surface Mount Module
Tape and Reel, 2500 pieces per Reel
AWU6601RM45P9 -30
o
Cto+90
o
C
RoHS Compliant 10 Pin
3 mm x 3 mm x 1 mm
Surface Mount Module
Partial Tape and Reel