G@ HARRIS HI-546/883 HI-547/883 Single 16/Differential 8 Channel CMOS Analog January 1989 Multiplexers With Active Overvoltage Protection Features This Circuit is Processed in Accordance to Mil-Std- 883 and Is Fully Conformant Under the Provisions of Paragraph 1.2.1. # No Channel Interaction During Overvoltage * Guaranteed Ron Matching @ 44V Maximum Power Supply Break-Before-Make Switching Description The HI-546/883 and HI-547/883 are analog multiplexers with Active Overvoltage Protection and guaranteed RON matching. Analog input levels may greatly exceed either power supply without damaging the device or disturbing the signal path of other channels. Active protection circui- try assures that signal fidelity is maintained even under fault conditions that would destroy other multiplexers. Analog inputs can withstand constant 70 volt peak-to- peak leveis with 15V supplies and digital inputs will sus- Analog Signal Range..........scsccscscsscesesersssersecseens +15V tain continuous faults up to 4 volts greater than either supply. In addition, signal sources are protected from Access Time (M&X.) ......-cecsssersssrsensssssenees sectecseneess 1.0us short circuiting should multiplexer supply loss occur: * Power Dissipation (Max.) .....:ccscsssesssssssssseesenes 45mW each input presents 1k of resistance under this condi- tion. These features make the Hi-546/883 and HI-547/883 . . ideal for use in systems where the analog inputs originate Applications from external equipment or separately powered circuitry. Data Acquisition Systems * Control Systems Both devices are fabricated with 44 volt dielectrically isolated CMOS technology. The HI-546/883 is a 16 chan- nel device and the HI-547/883 is an 8 channel differential Telemetry version. if input overvoltage protection is not needed, the H1-506/883 and HI-507/883 multiplexers are recom- mended. For further information see Application Notes on 520 and 521. a8 5 23 Pinouts ae HI1-546/883 (CERAMIC DIP) HI1-547/883 (CERAMIC DIP) fa} 5 TOP VIEW TOP VIEW =2 os +VsuppLy (1? +SUPPLY NC OUTB nc 3 nc 3 in16 14 IN 3B INiS 5 IN?7B 5 wid O16 IN &B in13 O17 IN SB in1z2 O18 IN 4B IN 11 IN 3B iN 10 (710 IN 2B ws 11 IN 1B GNO GND VREF VAREF ADDRESS Ag AC H14-546/883 (CERAMIC LCC) TOP VIEW 28 | 17 24] 1N6 #3] Ns 2] wa Zi] 1N 3 (NZ T 33 ae ; 53 = 23 5 4 a 43 7 15 a ' u ind ENABLE HI4-547/883 (CERAMIC LCC) TOP VIEW tw 7e{ 5 esa me IN TA INeb[ i nt oh St INGA ws? esa ini me IW5A ina naa ww 3B. 9 INIA red om ww 2a [it 20 | IN 2A wwialit ie] IN1A 5-59HI-546/883 HI-547/883 Functional Diagrams TRUTH TABLES HI-546/883 Tk Int Of} -W9 of O out t 1k ' IN20-+ AW 94-07 ' L..-| it DECODER ; i! DRIVER ut 1k i (N16 O--AWA-O toad t.~-~-4 Ll Lad. = JOVERVOLTAGE CLAMP & ie | S LEVEL SIGNAL SHIFT ISOLATION pe] Pe *DIGITAL INPUT PROTECTION VREF Ap Ay A2 Az EN H1-547/883 Tk IN 1A OJ ? -o71 OUT A e ' ' ' ' e 1k ! (NBA Ot AA p Ot tk By ioe IN 18 Owe ft OUTB es ie . rye DECODER hota \ DRIVER 1N 88 O-- WW 01 bitg ba---4 i on a OVERVOLTAGE CLAMP & a | 5 LEVEL SIGNAL SHIFT ISOLATION *DIGITA|. INPUT PROTECTION HEE E466 4 VREF Ag Aq A2 EN HI-546/883 ON Az | A2 | A1 | Ao | EN | CHANNEL x X xX X L None L L L L H 1 u L L H H 2 L L H L H 3 L L H H H 4 L H L L H 5 L H L H H 6 L H H L H 7 L H H H H 8 H L L L H 9 H L L H H 10 H L H L H 11 H L H H H 12 H H L L H 13 H H L H H 14 H H H L H 15 H H H H H 16 HI-547/883 ON CHANNEL Az | Ay | Ao | EN PAIR x x xX L None L u L H 1 L u H H 2 L H L H 3 L H H H 4 H L L H 5 H L H H 6 H H L H 7 H H H H 8Specifications HI-546/883 H1l-547/883 Absolute Maximum Ratings Voltage Between Supply Pins 44 *VsUPPLY to Ground.. .22V -VsuPPLY to Ground .. .25V Analog Input Voltage *VSUPPLY *20V VG cee eeneerereereeenes -VSUPPLY -20V Digital Input Voltage PVE TVA cece reenter etnene ceeennae escent ceeenes *VSUPPLY *4V SVEN G OVA cccseeeeesee ceeeree ce nitenenccnrreeresecersseeteneseseneaaeecencaaees -VSUPPLY ~4V or 20mA, whichever occurs first. Continuaus Current, S or D. Peak Current, S or D (Pulsed at 1ms, 10% Duty Cycle Max. Storage Temperature Range Lead Temperature (Soldering 10 Seconds) 65C to +1500C 227506 Junction Temperature : #1759 Thermal Resistance, Junction-to-Case (c} Ceramic DIP Package... cee cece eesesiaeeserteese eaenieeceaes 18C/W Ceramic LCC Package oc ccc ceeenenc erence esecieseersreenteteteee 40C/W Therma! Resistance, Junction-to-Ambient (a) Ceramic DIP Package Ceramic LCC Package Power Dissipation Ceramic DIP Package.... Ceramic LCC Package Power Dissipation Derating Factor (Above +759C) Ceramic DIP Package.... Ceramic LCC Package .. . ESD Classification 0.0... cece cee cee ce sees ceeeeeseeatenscrssuanenenenscanene S2000V Recommended Operating Conditions Operating Temperature Range ...... 55C to +1259C Operating Supply Voltage (VSUPPLY) wesc crete Analog Input Voltage (Vg) Logic Low Level (Vaz). OV to 0.8V Logic High Level (Vay) Max RMS Current, Sor D. TABLE 1. D.C. ELECTRICAL PERFORMANCE CHARACTERISTICS Devices Tested at *VgyppLy = *15V, -VSUPPLY =-15V. VEN = 4.0V, Vref (Pin 13) = OPEN, Unless Otherwise Specified. GROUP A LIMITS 0.C, PARAMETERS SYMBOL CONDITIONS SUBGROUPS TEMPERATURE MIN MAX | UNITS Input Leakage Current ly Measure Inputs Sequentially, 4,2,3 +259C, +1259C, -559C -1.0 1.0 LA Ne Connect All Unused Inputs to GND 1,2,3 +250C, +1250C, -559C | -1.0 1.0 HA Leakage Current Into *IS(OFF) Vg =+10V, Vp =-10V, Ven = 0.8V 1 +259C -10 +10 nA the Source Terminal of Ali Unused Inputs = -10V 2,3 +125C, -55C -50 +50 nA an"OFF" Switch IS(OFF) | Vg =-10V, Vp = *10V, Ven = 0.8V 1 +250C -10 +10 | nA All Unused Inputs = +10V 2,3 +4259C, -559C -50 +50 nA Leakage Current Into *ID(OFF) Vp = t10V, Vey = 0.8V 1 +259C -10 +10 nA the Drain Terminal of All Unused Inputs = -10V HI-546/883 2,3 +1259C, -559G -300 +300 nA an OFF Switch HI-547/883 2,3 +250, -559C ~200 +200 nA -Ip(orF) | Yo =-10V, Ven = 0.8V 1 +250C -10 +10 [nA All Unused Inputs = +10V Hi-546/883 2,3 +259C, -55C -300 +300 nA HI-547/883 2,3 +1250C, -550C -200 +200 nA Leakage Current From *ID(ON) Vin (Selected Chan.) = Vp = +10V 1 +259C 710 +10 nA an ON Driver Into Vg = Unused Inputs = -10V Hi-546/883 2,3 +1259C, -550C -300 +300 nA the Switch (Drain) HI-547/883 2.3 +1250C, -55C -200 +200 nA ID(ON) Vin (Selected Chan) = Vp = -10V 1 +2506 10 10 nA Vg = Unused Inputs = +10 HI-546/883 2,3 +1259C, -559C -300 +300 nA HI-547/883 2,3 +1259C, -55C -200 +200 nA Overvattage Protected, ID(OFF) | Vg =33V, Vp = OV. Ven = 0.8 1,2,3 +259C, +125C, -559C [| -2.0 +20] yA Leakage Current Into Overvoltage | Vg applied at = 25% duty cycie the Drain Terminal of Vg = -33V. Vp = OV, Ven = 0.8V 1,2,3 +259C, +1250C, -55C -2.0 +2.0 LA an OFF Switch Vg applied at = 25% duty cycle Positive Supply Current I+) Va = OV, Ven = 4.0V 1,2,3 +259C, +1250C, -559C 2.0 mA Negative Supply Current H-} Va = OV, Ven = 4.0V 1,2,3 +259C, +1259C, -559C -1.0 mA Standby Positive *Ispy Va = OV, Ven = OV 12,3 +250C, +1259C, -55C 2.0 mA Supply Current Standby Negative -ISBY Va = OV, Ven = OV 1,2,3 +250C, +1259C, -55C -1.0 mA Supply Current Switch ON *Rosi Vg = 10V 1 +250C 1500} 9 Resistance 1p = 100pA 2,3 +1259C, -55C 1800 a -Rps1 Vg = -10V 1 +2506 1500] 0 Ip = -100pA 2.3 *1259C, -559C 1800 a Logic Levet Voltage VALI Notes 1, 2 1,2,3 +259C, +1259C, -559C 0.8 Vv VaAHi Notes 1, 2 1,2,3 +259C, +125C, -55C | 4.0 Vv VAL2 Note 3 1,2,3 +250C, +125C, -559C 08 Vv VaH2 Note 3 1,2,3 +250C, +1259C, -559C 6.0 v Difference in switch +ARDS1 (*ROsg1MAX) - (*Rps1MIN) x 100 1 +259C 7 % ON" Resistance *RDS1 AVE Between Channels -ARps1 (-RogiMAX) - (-Rosg1MIN) x 100 1 +250C 7 % orsave 5-61 CAUTION: These devices are sensitive to electrostatic discharge. Proper IC handling procedures should be followed CMOS ANALOG MULTIPLEXERSHI-546/883 HI-47/883 TABLE 2. A.C. ELECTRICAL PERFORMANCE CHARACTERISTICS Devices Tested at *VSUPPLY = +15V, -VSUPPLY = -15V, VEN = 4.0V, Var (Pin 13) = OPEN, Unless Otherwise Specified. Characterized at *VguPPLy = *15V, -VSUPPLY =-15V, VEN =4.0V, VRer (Pin 13) = OPEN, Unless Otherwise Specified. LIMITS A.C. PARAMETER: SYMBOL CONDITIONS SUBGROUP TEMP MIN MAX | UNITS Break-Before-Make tp RL = 1kQ, Cy = 12.5pF 9 +259C 25 ns Time Delay Propagation Delay ta Ry = 10MQ, CL = 14pF 9 +259C $00 ns Times: 59C, -559C 1000 Address Inputs 10.11 12596 ns to 1/O Channel Times Enable to I/O tON(EN) Ry = 1k, CL = 12.5pF 9 +259C 500 ns 10, 11 +1259C, -559C 1000 ns 1OFF(EN) RL = 1kQ, CL = 12.5pF 9 +259C 500 ns 10, 11 +1259C, -559C 1000 ns TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER SYMBOL CONDITIONS NOTE TEMP MIN MAX | UNITS Capacitance: Ca Vt=V-=0V 4 +259C 12 pF Address Input f = 1MHz Capacitance: Cos Vt=V-=0V HI-546/883 4 +2506 85 pF Output Switch f = 1MHz HI-547/883 4 +250 50 pF Capacitance Cis Vt=V-+0V 4 +259C 15 pF Input Switch f = 1MHz Charge Transfer VCTE Vs = GND 4 +259C 10 mV Error VGEN = OV to SV Off Isolation Viso VEN = 0.8V, RL = 1k0 4,5 +250C -50 dB CL = 15pF, Vg = 7VRMS f = 100kHz NOTES Used for forcing conditions for all DC Tests, unless otherwise specified. To drive from DTL/TTL circuits, 1k1 pull-up resistors to +5.0V supply are recommended 1 2 3. VREF = 710V 4 . The parameters listed in this table are controlied via design or process parameters and are not directly tested. These parameters are characterizec upon initial design release and upon design changes which would affect these characteristics. 5. Worst case isolation occurs on channel 8B due to proximity of the output pins. TABLE 4. ELECTRICAL TEST REQUIREMENTS MIL-STO-883 TEST REQUIREMENTS SUBGAOUPS (SEE TABLES 1, 2 & 3) Interim Electrical Parameters (Pre Burn-in) 1 Final Electrical Test Parameters 1, 2,3, 9, 10, 11 Group A Test Requirements 1, 2,3, 9, 10, 11 Groups C & D Endpoints 1 PDA applies to Subgroup 1 only. No other subgroups are included in PDA. 5-62HI-546/883 HI-547/883 Test Circuits INPUT LEAKAGE CURRENT Ip(OFF) Ig(OFF) ve GND v- GNO . Ip{OF F) Is(OFF) Vat = 0.8V: Van = 4.0 UNUSED INPUTS TO GROUND VA = VEN = 0.8V TRUTH TABLE Vat = 0.8V Van = 4.0V Ip(ON) Ip(OFF) OVERVOLTAGE Rps 1p(OFF) Ov. Ion MULTIPLEXERS CMOS ANALOG TRUTH TABLE Vat + 0.8V VaH 4.0V Va= VEN = 8.8 TAUTH TABLE VAL = 2.8V Van = 4.0V SUPPLY CURRENTS CHARGE TRANSFER ERROR OFF CHANNEL ISOLATION Ve GND ve OUT 15pF (1) [I}INCLUDES ALL FACTORS AND SCOPE OR VOLTMETER CAPACITANCEHI-546/883 HI-547/883 Switching Waveforms 4.0V ADORESS av ORIVE (Va! OUTPUT A 50% 50% Vr + je tOPEN agy ADDRESS DRIVE (Va) zw OUTPUT 90% - -10V 90% OUTPUT | OT Ko ' ( *+ TON(EN} Ie | torr ! 1 o*] (EN) I+ BREAK-BEFORE-MAKE DELAY (topEeN) +15V IN1 +5V HR HI-546/ 7 na Ap gggr INAS f 502 IN 16 _ OUT -15V *SIMILAR CONNECTION FOR HI-547/883 ACCESS TIME vs. LOGIC LEVEL (HIGH) +18V { Ve A3 IN 1/-O #10V IN 2 2 THA Va a, UE546/ NS Oo 8i aa Ao IN 16} O710V oh *SIMILAR CONNECTION FOR HI-547/883 50? ENABLE DELAY tON(EN)> tOFF(EN) A3 IN 1}- +10V A 2 H-5A/ IN2 Lh yao = A + va ENenp OUT sor mK *SIMILAR CONNECTION FOR HI-547/883 Vout 12.5pF ------4 12.5pF BREAK-BEFORE-MAKE DELAY (topen) Va INPUT CH1ON CH 16 ON QUTPUT 1, 1D0ns/Div. ACCESS TIME ACCESS TIME Va INPUT CH1 ON QUTPUT ON 200ns/OlV. ENABLE DELAY tON(EN): 'OFF(EN) CHt OFF 100ns/DIV. 5-64HI-546/883 HI-547/883 Burn-in Circuits HI-546/883 = HI-547/883| CERAMIC DIP +15 1 ~~ 28 oO ta 7 wv suTiDUTAL 18V D NC/QUT 6 wv t oO Li we ww san P28 v2 tt of 4 Tv wa8 ww 7/704 125. 4 02, a} og Nin tsize in 66a P24 = Sd iy 14/58 ww 55a P22 4 bo Div sais8 ww ayaa P22 8 iN 12/4B IRIEL p21 4 b 8 Din 38 IN 2/28 > 104 in 18/28 wina bone ev 12 7 L GND Ao > 24, ay He +5 1a | PEF Ts oO ARNG A2 NOTES: R1, R2 = 10k + 5% 1/2 or 1/4W (per socket) C1, C2 = 0.01uF (per socket) or 0.144 (per row) D1, D2 = IN4002 (or equivalent) (per board) HI-S46/883s- HI-547/883. CERAMIC LCC CMOS ANALOG MULTIPLEXERS +5V O-15v ct T I Gu se 01 = v2 = R2 = 4 z 1 28 27 726 INTER ONC ONC/OUTB +V | OOUTA)) VIN BRA oy in i576 a 5 ww 14/68 woven P24 4 as IN 13/58 iw 5/sa | BY iw az/8 nara [4 p+ ow i138 mana 10) iw 10/28 wa L204 1 none wata PS GNO Vane AGING AZ AY Ag EN 12 af | 15 16 7 18 NOTES: sv R1, R2 = 10kQ + 5% 1/2 or 1/4W (per socket} C1, C2 = 0.014 (per socket) or 0.14 (per row) 01, D2 = IN4002 (or equivalent) (per board) 5-65HI-546/883 HI-547/883 Schematic Diagrams ADDRESS INPUT BUFFER AND LEVER SHIFTER TTL REFERENCE CIRCUIT LEVEL ose SHIFTED ADORE: TO DECODE P P p P rc TO P CHANNEL } DEVICE OF J L, N A THE SWITCH 4 Ag GR Ag ' " 1! TO N CHANNEL = 1 OEVICE OF ALOR AY THE SWITCH w + ______-__f Ag OR Ag 4 A30R Ay ql ! 1 ENABLE 7 Delete Ag or Ag Inputs for HI-547/883 1 Va DVEAVOLTAGE PRUTECTION LEVEL SHIFTED _AQDRESS TO DECODE MULTIPLEX SWITCH FROM ECODE DVERVOLTAGE PROTECTION Lue FROM T OECODEHI-546/883 HI-547/883 Die Characteristics DIE DIMENSIONS: 83.9 x 159 x 19 mils METALLIZATION Type: Al Thickness: 16kA + 2kA GLASSIVATION Type: Nitride Thickness: 7kA + 0.7kA WORST CASE CURRENT DENSITY: 1.4 x 105 A/cm2 Metallization Mask Layout HI-546/883 Ai A2 _A3 VREF GNO WEN Ao if Gl Lin wi (r9] m2 fall in [2a] na [23] ae fia] wa [10] 1n 10 = fo] wnat is] wre =| = __ wT ns [23] ine [24] = =i Ca] nia [8] in 1a ma wy nt [25] ne [26] Sali lid [5] was [4] in 16 | > | | a 287 pesa 0 mms 1 com S842) V auT W NC TRANSISTOR COUNT: HI-546/883 485 HI-547/883 485 PROCESS: CMOS-DI DIE ATTACH Materiat: Gold Silicon Eutectic Alloy Temperature: Ceramic DIP 460C (Max) Ceramic LCC 420C (Max) HI-547/883 EN Ag Ai Az NC VREF GNO 1 he Ae Go el Os a0 isin [ol in as IN 1A : IN 2A 7 waa [23] IN 4A [22] [s] IN 48 ef _, ae = IN5A {23] IN 58 [6] IN se =a IN6A = 5] IN 78 [4| IN BB (Sd 2A =I IN7A [al IN 8A 3 fo! et | L Flu ___ e Y BT] or ++ 28 Figs0 2 cms 1) om 5 2) -V OUT A 4 OUT E 5-67 a CMOS ANALOG MULTIPLEXERSH!I-546/883 HI-547/883 Packagingt 28 PIN CERAMIC DIP - 1.440 i 1470 160 515 1 _ : 005 MIN 4 p- || [- 180 * 335 + | | 150 MIN LP O -098 MAX wel! 008 * iS 100 015 BSC 2950" 065 * INCREASE MAX LIMIT BY .003 INCHES MEASURED AT CENTER OF FLAT FOR SOLDER FINISH LEAD MATERIAL: Type B INTERNAL LEAD WIRE: LEAD FINISH: Type A Material: Aluminum PACKAGE MATERIAL: Ceramic, 90% Alumina Diameter: 1.25 Mil PACKAGE SEAL: Bonding Method: Ultrasonic Material: Glass Frit COMPLIANT OUTLINE: 38510 D-10 Temperature: 450C + 10C Method: Furnace Seal 28 PAD CERAMIC LCC 2003 O75 -015 [ %095 bY | C4 pb] C4 .006 022 | p C4 442 bp ~y 458 2022 = 028 PS .015 MIN = bp] fe4 2048 y | 1 oso 055 | BI 4a ase ft (LE) CLD CLL) i 442 .45B 064 i 076 CL L ull. .0B8 PAD MATERIAL: Type C INTERNAL LEAD WIRE: PAD FINISH: Type A Material: Aluminum FINISH DIMENSION: Type A Diameter: 1.25 Mil PACKAGE MATERIAL: Multilayer Ceramic, 90% Alumina Bonding Method: Ultrasonic PACKAGE SEAL: COMPLIANT OUTLINE: 38510 C-4 Material: Gold/Tin (80/20) Temperature: 3209C + 10C Method: Furnace Braze NOTE: All Dimensions are Mio , Dimensions are in inches. + Mit-M-38510 Compliant Materials, Finishes, and Dimensions. 5-68Ww HARRIS HI-546 HI-547 DESIGN INFORMATION Single 16/Differential 8 Channel CMOS Analog Multiplexers With Active Overvoitage Protection The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design data only. No guarantee is implied. Typical Performance Characteristics Unitess Otherwise Specified: Ta = 25C, VSUPPLy = 15V, VAH = +4V, VaL = 0.8V, VREF = Open ON RESISTANCE vs. ANALOG INPUT VOLTAGE LEAKAGE CURRENT vs. TEMPERATURE an) 10004 13 Tas +1260 12 1.1 Ta * *25er og Tas S600 OW RESISTANCE - KS? 3 OUTPUT GN LEAKAGE IptarF} CURRENT -10 4 4 4 2 0 2 4 6 cs 10 VIN ANALOG INPLT (VOLTS) ma LEAKAGE CURRENT LEAKAGE CURRENT 10098 Ig (OFF 8 @ ANALOG INPUT OVERVOLTAGE CHARACTERISTICS s a <m a o5 so 109 OF ANALOG INPUT 260 500 Tho 199 CURRENT (ly) TEMPERATURE ~ 9 ore CURRENT fp (GFF) (ia) ANALOG INPUT CUARERT (mA) + ote tat 4280 t27) 300 +530 38 VIN #NALOG INPUT GVERVOLTAGE {VOLTS} ON CHANNEL CURRENT vs. VOLTAGE SUPPLY CURRENT vs. TOGGLE FREQUENCY Ea) YSUPPLY = Vsupecy tiv 1 - SWATCH CURRENT mA +2 #4 +6 ta +10 12 214 1K 10K 100K 1M 10 Vin -- VOLTAGE ACA 088 SWITCH TOGGLE FREQUENCY Hz