MAX19757 Dual, SiGe, High-Linearity,
1700MHz to 2700MHz Downconversion Mixer with
Advanced Shutdown Features
www.maximintegrated.com Maxim Integrated
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Bias Settings
Since mixer linearity and power are affected by the
device’s operating points, flexibility was built into the
MAX19757 so that the IF and LO bias levels can be
adjusted using external resistor sets (see the Typical
Application Circuit). Customized tradeoffs can thus be
made to optimize linearity vs. overall power consumption.
The IF quiescent bias is set via the current at pin 35 (the
R1 value to ground), and the internal LO drive amplitude
by the current at pin 29.
IF Amplier Bias Adjustments
Pin 35 of the device, IF_RADJ, must have a resistor to
ground for the IF amp to function. A nominal IF bias of
80mAisobtainedwitha4.87kΩresistorusedforR1.A
smaller resistance increases the IF bias. Conversely, a
larger resistance decreases the IF quiescent bias; the IF
amp bias current through L1/L2 or L4/L5 of the Typical
Application Circuit should not exceed 130mA.
LO Buffer Bias Adjustments
The internal LO target amplitude can be altered by sinking
or sourcing sink current at the LO_VADJ pin. To increase
the static LO drive, remove R3 from VCC and connect it
toground.ThevalueofR3shouldbegreaterthan10KΩ
for this increased drive operation. To reduce overall power
consumption by decreasing the LO drive, connect R3
from pin 29 to VCC. The Typical Application Circuit is con-
figured for this reduced power consumption mode.
Static Bias Operation
As outlined above, external resistor sets can be chosen
to set the bias schemes for the MAX19757’s LO and IF
amplifier circuits. Select R1 and R3 to set the IF and LO
biases per the guidance provided above. See the Typical
Application Circuit for details surrounding the suggested
configurations.
Using the static bias mode will ensure that the mixer deliv-
ers a constant level of linearity performance with a con-
stant level of power dissipation, regardless of the signal
power present on the mixer’s RF ports.
Dynamic Bias Operation
The static biasing schemes outlined above provide a con-
stant level of linearity for a given current draw. However,
in many base station receiver applications, it may not be
necessary to maintain exceptionally high levels of linearity
performance at all times. IIP3 linearity is critical for base
station receivers when the radio is operating in the pres-
ence of interfering blockers. Due to the intermittent nature
of these blocking signals, there exists an opportunity to
relax the mixer’s IIP3 performance when the blockers are
not present. This relaxation of linearity implies that the
mixer’s overall current consumption can be throttled back
by a commensurate amount.
The MAX19757 capitalizes on this opportunity by employ-
ing a novel dynamic biasing scheme which detects the
presence of blockers in the IF domain, and increases
the biases to the IF and LO amplifiers automatically. The
use of the feature is completely optional (see Optional
Dynamic Bias Typical Application Circuit). In this figure, a
few additional components and connections are added or
modified to enable this feature. Omitting these additional
components will force the circuit to revert back to the
static biasing scheme.
The MAX19757 includes a simple log amp detector that
senses the presence of a high-level signal on both of the
IF paths. IF_DET_OUT (pin 11) will yield a signal that
swings above or below the internal 1.2V bandgap refer-
ence and can therefore be used to source or sink current
into the IF and/or LO bias adjust pins. As the IF signal
increases, the IF_DET_OUT output decreases down to
its 0.4V limit. Conversely, as the IF signal decreases, the
IF_DET_OUT output increases to its upper limit of 1.7V.
The nominal bias crossing corresponds to an IF output
level of approximately +10dBm.
The IF_DET CEXT pin (17) is used to set the attack /
decay times of the detector. The effective resistance at
thispinis~30KΩ.SelectaCextvalueappropriateforthe
slowest system data rate.
Typical values for dynamic control of both the IF and
LO are as follows: R1 = 4.64K, R2 = 5K, R3 = 10K,
and Cext = 1µF. Under small-signal conditions, the chip
power will decrease ~25% and increase to about +30%
with an IIP3 increase of ~3dBm.
Note that the attack/decay times will be affected when
the individual paths are subjected to the shutdown states
described in Table 1. Contact the factory for details.
Layout Considerations
A properly designed PCB is an essential part of any RF/
microwave circuit. Keep RF signal lines as short as pos-
sible to reduce losses, radiation, and inductance. For best
performance, route the ground-pin traces directly to the
exposed pad underneath the package. This pad MUST
be connected to the ground plane of the board by using
multiple vias under the device to provide the best RF and
thermal conduction path. Solder the exposed pad on the
bottom of the device package to a PCB.
Power-Supply Bypassing