INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: * The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT03 Quad 2-input NAND gate Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 FEATURES The 74HC/HCT03 provide the 2-input NAND function. * Level shift capability The 74HC/HCT03 have open-drain N-transistor outputs, which are not clamped by a diode connected to VCC. In the OFF-state, i.e. when one input is LOW, the output may be pulled to any voltage between GND and VOmax. This allows the device to be used as a LOW-to-HIGH or HIGH-to-LOW level shifter. For digital operation and OR-tied output applications, these devices must have a pull-up resistor to establish a logic HIGH level. * Output capability: standard (open drain) * ICC category: SSI GENERAL DESCRIPTION The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6 ns TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC tPZL/ tPLZ propagation delay CI input capacitance CPD power dissipation capacitance per gate CL = 15 pF; RL = 1 k; VCC = 5 V notes 1, 2 and 3 Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2x fi + (CL x VCC2 x fo) + (VO2/RL) x duty factor LOW, where: fi = input frequency in MHz fo = output frequency in MHz VO = output voltage in V CL = output load capacitance in pF VCC = supply voltage in V RL = pull-up resistor in M (CL x VCC2 x fo) = sum of outputs (VO2/RL) = sum of outputs 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V 3. The given value of CPD is obtained with: CL = 0 pF and RL = ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information". December 1990 2 HCT 8 10 ns 3.5 3.5 pF 4.0 4.0 pF Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1, 4, 9, 12 1A to 4A data inputs 2, 5, 10, 13 1B to 4B data inputs 3, 6, 8, 11 1Y to 4Y data outputs 7 GND ground (0 V) 14 VCC positive supply voltage Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. FUNCTION TABLE INPUTS OUTPUT nA nB nY L L H H L H L H Z Z Z L Note 1. H = HIGH voltage level L = LOW voltage level Z = high impedance OFF-state Fig.4 Functional diagram. December 1990 Fig.5 Logic diagram (one gate). 3 Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Voltages are referenced to GND (ground = 0 V) SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS VCC DC supply voltage -0.5 +7 V VO DC output voltage -0.5 +7 V IIK DC input diode current 20 mA for VI < -0.5 V or VI > VCC + 0.5 V -IOK DC output diode current 20 mA for VO < -0.5 V -IO DC output sink current 25 mA for - 0.5 V < VO ICC; IGND DC VCC or GND current 50 mA Tstg storage temperature range +150 C Ptot power dissipation per package December 1990 -65 for temperature range; -40 to +125 C 74HC/HCT plastic DIL 750 mW above +70 C: derate linearly with 12 mW/K plastic mini-pack (SO) 500 mW above +70 C: derate linearly with 8 mW/K 4 Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications", except that the VOH values are not valid for open drain. They are replaced by IOZ as given below. Output capability: standard (open drain), excepting VOH ICC category: SSI Voltages are referenced to GND (ground = 0 V) Tamb (C) TEST CONDITIONS 74HC SYMBOL PARAMETER -40 to +85 +25 min. typ. IOZ -40 to +125 UNIT VCC (V) VI 2.0 to 6.0 VO = VO(max)(1) VIL or GND OTHER max. min. max. min. max. HIGH level output leakage current 0.5 5.0 10.0 A Note 1. The maximum operating output voltage (VO(max)) is 6.0 V. AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) TEST CONDITIONS 74HC SYMBOL PARAMETER +25 min. typ. max. -40 to +85 -40 to +125 min. max. min. propagation delay nA, nB to nY 28 10 8 95 19 16 120 24 20 145 29 25 tTHL output transition time 19 7 6 75 15 13 95 19 16 110 22 19 5 VCC WAVEFORMS (V) max. tPZL/ tPLZ December 1990 UNIT ns ns 2.0 4.5 6.0 2.0 4.5 6.0 Fig.6 Fig.6 Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications", except that the VOH values are not valid for open drain. They are replaced by IOZ as given below. Output capability: standard (open drain), excepting VOH ICC category: SSI Voltages are referenced to GND (ground = 0 V) Tamb (C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 min. typ. IOZ max. HIGH level output leakage current -40 to +85 -40 to +125 min. min. max. 0.5 max. 5.0 10.0 UNIT V CC (V) 4.5 to 5.5 A VI OTHER VIL VO = VO(max)(1) or GND Note 1. The maximum operating output voltage (VO(max)) is 6.0 V. Note to HCT types The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT LOAD COEFFICIENT nA, nB 1.0 AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) TEST CONDITIONS 74HCT SYMBOL PARAMETER +25 min. typ. max. -40 to +85 -40 to +125 min. max. min. UNIT VCC WAVEFORMS (V) max. tPZL/ tPLZ propagation delay nA, nB, to nY 12 24 30 36 ns 4.5 Fig.6 tTHL output transition time 7 15 19 22 ns 4.5 Fig.6 December 1990 6 Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 AC WAVEFORMS HC: VM = 50%; VI = GND to VCC HCT: VM = 1.3 V; VI = GND to 3 V. Fig.6 Waveforms showing the input (nA, nB) to output (nY) propagation delays and the output transition times. TEST CIRCUIT AND WAVEFORMS Fig.8 Input pulse definitions. Fig.7 Test circuit (open drain) Definitions for Figs. 7, 8: CL = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS for values). RT = termination resistance should be equal to the output impedance ZO of the pulse generator. tr = tf = 6 ns; when measuring fmax, there is no constraint on tr, tf with 50% duty factor. December 1990 tr; tf FAMILY AMPLITUDE 7 VM fmax; PULSE WIDTH OTHER 74HC VCC 50% < 2 ns 6 ns 74HCT 3.0 V 1.3 V < 2 ns 6 ns Philips Semiconductors Product specification Quad 2-input NAND gate 74HC/HCT03 APPLICATION INFORMATION (1) RON(max) = 0.26 V / 4 mA = 65 (at 25 C) (b) (a) Fig.9 Pull-up configuration. (1) (2) (3) (4) VCC (R) = 2.0 V; VIL = 0.5 V. VCC (R) = 5.0 V; VIL = 0.8 V. VCC (R) = 4.5 V; VIL = 1.35 V. VCC (R) = 6.0 V; VIL = 1.8 V. Fig.10 Minimum resistive load as a function of the pull-up voltage. Notes to Figs 9 and 10 If VP - VCC (R) > 0.5 V a positive current will flow into the receiver (as described in the "USER GUIDE"; input/output protection), this will not affect the receiver provided the current does not exceed 20 mA. At VCC < 4.5 V, RON (max) is not guaranteed; RON(max) can be estimated using Figs 33 and 34 in the "USER GUIDE". Note to Application information All values given are typical unless otherwise specified. PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS Logic Package Outlines". December 1990 8 Philips Semiconductors - PIP - 74HC/HCT03; Quad 2-input NAND gate Submit Query Philips Semiconductors Home ProductBuy MySemiconductors ContactProduct Information catalogonline 74HC/HCT03; Quad 2-input NAND gate Products MultiMarket * Semiconductors * Product Selector Catalog by * Function Catalog by * System * Cross-reference * Packages End of Life * information Distributors Go * Here! * Models * SoC solutions General description Features Block diagram Products & packages Buy online Parametrics Information as of 2003-04-22 My.Semiconductors.COM. Your personal service from Use right mouse button to download datasheet Philips Semiconductors. Please register now ! Download datasheet Stay informed Datasheet Applications Support & tools Similar products Email/translate General description top The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT03 provide the 2-input NAND function. The 74HC/HCT03 have open-drain N-transistor outputs, which are not clamped by a diode connected to VCC. In the OFF-state, i.e. when one input is LOW, the output may be pulled to any voltage between GND and VOmax . This allows the device to be used as a LOW-to-HIGH or HIGH-to-LOW level shifter. For digital operation and OR-tied output applications, these devices must have a pull-up resistor to establish a logic HIGH level. Features top Level shift capability Output capability: standard (open drain) ICC category: SSI Datasheet top Type number Title Publication release Datasheet status date 74HC/HCT03 Quad 212/1/1990 input NAND gate Page count Product specification 8 File size Datasheet (kB) 52 Download Download PDF File Additional datasheet info To complete the device datasheet with package and family information, also download the following PDF files. The "Logic Package Information" document is required to determine in which package(s) this device is available. Document Description 1 Download HCT_FAMILY_SPECIFICATIONS HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family Specifications PDF file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74HCT03N.html (1 of 4) [Apr-30-2003 10:03:54 AM] Philips Semiconductors - PIP - 74HC/HCT03; Quad 2-input NAND gate 2 File HCT_PACKAGE_INFO Download PDF 3 File HCT_PACKAGE_OUTLINES Download PDF File HC/T Package Info, The IC06 74HC/HCT/HCMOS Logic Package Information HC/T Package Outlines, The IC06 74HC/HCT/HCMOS Logic Package Outlines Parametrics top Type number Package Description Propagation Voltage No. Power Logic Output Delay(ns) of Dissipation Switching Drive Pins Considerations Levels Capability SOT108-1 (SO14) Quad 2Input NAND Gate 15 with Level Shift Capability 5 Volts 14 + Low Power or Battery Applications CMOS Low SOT337-1 (SSOP14) Quad 2Input NAND Gate 15 with Level Shift Capability 5 Volts 14 + Low Power or Battery Applications CMOS Low 74HC03N SOT27-1 (DIP14) Quad 2Input NAND Gate 15 with Level Shift Capability 5 Volts 14 + Low Power or Battery Applications CMOS Low 74HC03PW Quad 2Input SOT402-1 NAND Gate 15 (TSSOP14) with Level Shift Capability 5 Volts 14 + Low Power or Battery Applications CMOS Low 74HCT03D SOT108-1 (SO14) Quad 2Input NAND Gate with Level 15 Shift Capability; TTL Enabled 5 Volts 14 + Low Power or Battery Applications TTL Low SOT337-1 (SSOP14) Quad 2Input NAND Gate with Level 15 Shift Capability; TTL Enabled 5 Volts 14 + Low Power or Battery Applications TTL Low 74HC03D 74HC03DB 74HCT03DB file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74HCT03N.html (2 of 4) [Apr-30-2003 10:03:54 AM] Philips Semiconductors - PIP - 74HC/HCT03; Quad 2-input NAND gate Quad 2Input NAND Gate with Level 15 Shift Capability; TTL Enabled 5 Volts 14 + Low Power or Battery Applications TTL Low Quad 2Input NAND Gate SOT402-1 with Level 15 74HCT03PW (TSSOP14) Shift Capability; TTL Enabled 5 Volts 14 + Low Power or Battery Applications TTL Low 74HCT03N SOT27-1 (DIP14) Products, packages, availability and ordering top Type number North Ordering code Marking/Packing Package Device status Buy online Discretes American (12NC) Download packing info type number PDF File Standard Marking SOT108-1 74HC03D 74HC03D 9337 486 60652 * Bulk Pack, Full production order this (SO14) CECC product Standard Marking online SOT108-1 74HC03D-T 9337 486 60653 * Reel Pack, Full production order this (SO14) SMD, 13", CECC product Standard Marking SOT337-1 74HC03DB 74HC03DB 9351 737 70112 Full production online order this (SSOP14) * Bulk Pack product Standard Marking SOT337-1 74HC03DB9351 737 70118 * Reel Pack, Full production online order this (SSOP14) T SMD, 13" product Standard Marking online SOT27-1 74HC03N 74HC03N 9337 486 50652 * Bulk Pack, Full production order this (DIP14) CECC product SOT402-1 online Standard Marking 74HC03PW 74HC03PW 9351 741 80112 (TSSOP14) Full production order this * Bulk Pack product Standard Marking SOT402-1 online 74HC03PW9351 741 80118 * Reel Pack, (TSSOP14) Full production order this T SMD, 13" product Standard Marking online SOT108-1 74HCT03D 74HCT03D 9337 486 40652 * Bulk Pack, Full production order this (SO14) CECC product Standard Marking online SOT108-1 74HCT03D9337 486 40653 * Reel Pack, Full production order this (SO14) T SMD, 13", CECC product Standard Marking SOT337-1 74HCT03DB 74HCT03DB 9351 737 60112 Full production online order this (SSOP14) * Bulk Pack product Standard Marking SOT337-1 74HCT03DB9351 737 60118 * Reel Pack, Full production online order this (SSOP14) T SMD, 13" file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74HCT03N.html (3 of 4) [Apr-30-2003 10:03:54 AM] - - - - - - - Philips Semiconductors - PIP - 74HC/HCT03; Quad 2-input NAND gate product 74HCT03N 74HCT03N Full production online order this product SOT402-1 online Standard Marking 74HCT03PW 74HCT03PW 9351 862 50112 (TSSOP14) Full production order this * Bulk Pack product Standard Marking SOT402-1 online 74HCT03PW9351 862 50118 * Reel Pack, (TSSOP14) Full production order this T SMD, 13" product online Standard Marking SOT27-1 9337 486 30652 * Bulk Pack, (DIP14) CECC - - - Similar products top 74HC/HCT03 links to the similar products page containing an overview of products that are similar in Products function similar or related to the type number(s) as listed on this page. The similar products page includes products from the same catalog tree(s), relevant selection guides and products from the same functional category. to 74HC/HCT03 Support & tools top HC/T Family Specifications, The IC06 74HC/HCT/HCMOS Logic Family Specifications(date 01-Mar-98) Download Download PDF HC/T User Guide(date 01-Nov-97) PDF File File Email/translate this product information top Email this product information. Translate this product information page from English to: French Translate The English language is the official language used at the semiconductors.philips.com website and webpages. All translations on this website are created through the use of Google Language Tools and are provided for convenience purposes only. No rights can be derived from any translation on this website. About this Web Site | Copyright (c) 2003 Koninklijke Philips N.V. All rights reserved. | Privacy Policy | | Koninklijke Philips N.V. | Access to and use of this Web Site is subject to the following Terms of Use. | file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/74HCT03N.html (4 of 4) [Apr-30-2003 10:03:54 AM]