ZXGD3110N8
Document Number DS37336 Rev. 2 - 4
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SYNCHRONOUS MOSFET CONTROLLER IN SO-8
Description
The ZXGD3110N8 is intended to drive a MOSFET configured as an
ideal diode replacement. The device is comprised of a high voltage
detector stage and gate driver. The detector monitors the voltage
between the drain and the source of the MOSFET and if this voltage is
less than the turn on threshold voltage of the controller a positive
voltage is applied to the MOSFET’s Gate Pin. As the load current
decays to zero and the voltage between the drain and source of the
MOSFET increases beyond the turn-off threshold value MOSFET is
rapidly turned off.
Intelligent features of this IC are the Minimum Off-Time (TOFF) and
Minimum On-Time (TON), these features blanket the noise generated
during the turn-on and turn-off instances of the power FET. Also Light
Load Detection (LLD) for improved efficiency at light and no load,
where synchronous rectification is no more beneficial. Other features
include Undervoltage Lockout (UVLO), SYNC feature for CCM
operation and low turn-off threshold voltage for improved efficiency.
Applications
Flyback Converters in:
Power Adaptors
Auxiliary Power Supplies
PoE Power Devices
Resonant Converters in:
High Power Adaptors
85+/90+ Compliant ATX and Server Power Supplies
Features
Frequency of Operation up to 500kHz
Suitable for Discontinuous Conduction Mode (DCM),
Continuous Conduction Mode (CCM) and Critical (CrCM)
Conduction Mode
Minimum On-Time and Off-Time to Reduce Turn-On/Off
Oscillations
Intelligent Light Load Detection and Sleep Mode
Turn-Off Propagation Delay Time 30ns
Drain Voltage Rating of 200V
Recommended Operating Voltage from 4.5V up to 12V
Source and Sink Current of 2A and 4A Respectively
Low Component Count
Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
Halogen and Antimony free. “Green” Device (Note 3)
For automotive applications requiring specific change
control (i.e. parts qualified to AEC-Q100/101/200, PPAP
capable, and manufactured in IATF 16949 certified
facilities), please contact us or your local Diodes
representative.
https://www.diodes.com/quality/product-definitions/
Mechanical Data
Case: SO-8
Case Material: Molded Plastic. “Green” Molding Compound.
UL Flammability Classification Rating 94V-0
Moisture Sensitivity: Level 1 per J-STD-020
Terminals: Finish Matte Tin Plated Leads, Solderable per MIL-
STD-202, Method 208
Weight: 0.074 grams (Approximate)
Ordering Information (Note 4)
Marking
Reel Size (inches)
Tape Width (mm)
Quantity per Reel
ZXGD3110
13
12
2500
Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant.
2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and
Lead-free.
3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and
<1000ppm antimony compounds.
4. For packaging details, go to our website at http://www.diodes.com/products/packages.html.
Top View
Pin-Out
GND
SYNC
VCC
VS
VD
PGATE
TON
GATE
SO-8
Top View
PART OBSOLETE
NO ALTERNATE PART
ZXGD3110N8
Document Number DS37336 Rev. 2 - 4
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Marking Information
Functional Block Diagram
ZXGD = Product Type Marking Code, Line 1
3110 = Product Type Marking Code, Line 2
YY = Year (ex: 15 = 2015)
WW = Week (01 - 53)
ZXGD
3110
YY WW
ZXGD3110N8
Document Number DS37336 Rev. 2 - 4
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Pin Descriptions
Pin Number
Pin Name
Function
1
VCC
Power Supply Pin
VCC supplies all the internal circuitry of the device. A DC supply is required to be connected to this pin. A
10µF or larger capacitor must be connected between this pin and GND Pin as close as possible. The
device will not function until the VCC has risen above the UVLO threshold. The device can safely be turned
off by bringing VCC below the UVLO threshold (minus the UVLO threshold hysteresis). If VCC drops below
the UVLO threshold (minus UVLO threshold hysteresis), the MOSFET is turned off and the TOFF/ON Pin is
internally connected to GND.
2
TON
Minimum On-Time
Minimum on-time setting pin. Connect this pin to Ground via RTON resistor.
3
VS
Source Voltage
Connect this pin to the source of the synchronous MOSFET.
4
VD
Drain Voltage
This pin needs to be connected as closely as possible to the transformer used in the application, to
minimize the effects of parasitic inductance on the performance of the device. The device requires that VD
has a voltage greater than 1.5V and that the TOFF timer has expired before the MOSFET is able to be
activated. Once these conditions are met and the voltage sensed on the VD Pin is 150mV lower than the VS
Pin, the gate output to the sync MOSFET will go high and the TON (minimum on-time) period is started. The
MOSFET will remain on for at least the length of the minimum on-time. After the TON period, the MOSFET
will remain on until the VD to VS voltage has reached to the VTHOFF threshold, at which point the gate output
will go low. If the VTHOFF threshold is reached before the TON period has expired, the device will enter the
Light Load Mode. Under this mode, the MOSFET will not be turned on the next switching cycle. The device
will come out of light load, once the on-time of the synchronous MOSFET exceeds the set minimum on-
time.
5
PGATE
Protection MOSFET Gate
A 100nF capacitor should be connected between this pin and GND.
6
GATE
Gate
Connect GATE to the gate of the controlled MOSFET through a small series resistor using short PC board
tracks to achieve optimal switching performance. The gate output can source >2A peak source current
while turning on the sync MOSFET and can sink >4A peak current while turning on the sync MOSFET.
7
SYNC
Gate Turn-Off Synchronization
If a falling edge is sensed on this pin, the gate output is pulled low, irrespective of the sensed drain to
source voltage or the state of the TON timer. This characteristic allows the device to be easily used in a
Continuous Conduction Mode (CCM) system. The SYNC Pin needs to be connected to a suitable control
signal on the primary side of the convertor, using a high voltage isolation cap, transformer or other suitable
means.
8
GND
Ground
This is the reference potential for all internal comparators and thresholds. A 10µF decoupling capacitor is
required to place as close as possible between VCC and GND Pins.
ZXGD3110N8
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Absolute Maximum Ratings (@TA = +25°C, unless otherwise specified.)
Characteristic
Symbol
Value
Unit
Supply Voltage, Relative to GND
VCC
-0.3 to 15
V
Drain Pin Voltage
VD
-1 to +200
V
Gate Output Voltage
VG
12
V
Minimum Off-Time (TOFF) Pin Voltage
SYNC
-0.3 to 6
V
Minimum On-Time (TON) Pin Voltage
VTON
-0.3 to 6
V
Gate Driver Peak Source Current
ISOURCE
5
A
Gate Driver Peak Sink Current
ISINK
5
A
Input Voltage Range VS
VS
-1 to 1
V
Thermal Characteristics
Characteristic
Symbol
Value
Unit
Power Dissipation
Linear Derating Factor
(Note 5)
PD
490
3.92
mW
mW/°C
(Note 6)
655
5.24
(Note 7)
720
5.76
(Note 8)
785
6.28
Thermal Resistance, Junction to Ambient
(Note 5)
RθJA
255
°C/W
(Note 6)
191
(Note 7)
173
(Note 8)
159
Thermal Resistance, Junction to Lead
(Note 9)
RθJL
55
°C/W
Thermal Resistance, Junction to Case
(Note 10)
RθJC
45
°C/W
Maximum Junction Temperature
TJ
+150
°C
Storage Temperature Range
TSTG
-65 to +150
ESD Ratings (Note 11)
Characteristic
Symbol
Value
Unit
JEDEC Class
Electrostatic Discharge Human Body Model
ESD HBM
2,000
V
1C
Electrostatic Discharge Machine Model
ESD MM
500
V
C
Notes: 5. For a device surface mounted on minimum recommended pad layout FR4 PCB with high coverage of single sided 1oz copper, in still air conditions; the
device is measured when operating in a steady-state condition.
6. Same as Note (5), except Pin 1 (VCC) and Pin 8 (GND) are both connected to separate 5mm x 5mm 1oz copper heatsinks.
7. Same as Note (6), except both heatsinks are 10mm x 10mm.
8. Same as Note (6), except both heatsinks are 15mm x 15mm.
9. Thermal resistance from junction to solder-point at the end of each lead on Pin 1 (VCC) and Pin 8 (GND).
10. Thermal resistance from junction to top of the case.
11. Refer to JEDEC specification JESD22-A114 and JESD22-A115.
ZXGD3110N8
Document Number DS37336 Rev. 2 - 4
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Recommended Operating Conditions (@TA = +25°C, unless otherwise specified.)
Symbol
Parameter
Min
Max
Unit
VCC
Supply Voltage Range
4.5
12
V
VDS
Voltage Cross Drain and Source
-1
200
FSW
Switching Frequency
20
600
kHz
TJ
Operating Junction Temperature Range
-40
+125
°C
RTON
TON Resistor Value
8.25
100
k
CVCC
VCC Bypass Capacitor
10
μF
TWsync
Sync Pulse Width
20
ns
Thermal Derating Curve
020 40 60 80 100 120 140 160
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8 15mm x 15mm
5mm x 5mm
Minimum
Layout
Derating Curve
Junction Temperature (°C)
Max Power Dissipation (W)
10mm x 10mm
C)
ZXGD3110N8
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Electrical Characteristics (@TA = +25°C, unless otherwise specified.)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VAVDD
Internal Regulator Output
VCC = 5.5V
4.5
V
VCC = 12V
4.7
V
ICCSTART
Supply Current (Undervoltage)
VCC = 2.6V
160
220
µA
ICCON
Supply Current (Enabled)
VCC = 5.5V, FSW = 100kHz
CGATE = 0pF
1.5
1.8
mA
VCC = 12V, FSW = 100kHz
CGATE = 0pF
1.8
2.2
VCC = 5.5V, FSW = 100kHz
CGATE = 3,300pF
3.2
4
VCC = 12V, FSW = 100kHz
CGATE = 3,300pF
5
7
Undervoltage Lockout (UVLO)
UVLOTH
VCC Undervoltage Lockout Threshold Rising
2.8
3.0
3.20
V
UVLOHYS
VCC Undervoltage Lockout Threshold
Hysteresis
200
mV
MOSFET Voltage Sensing
VTHARM
Gate Re-Arming Threshold
VD to GND, Rising
-1.3
-1.5
-1.7
V
VTHON
Gate Turn-On Threshold
(VD-VS) Falling, VS = 0V
-220
-150
-80
mV
VTHOFFLV
Gate Turn-Off Threshold
(VD-VS) Rising, VS = 0V, VCC <
4.3V
-30
-20
-10
mV
VTHOFFHV
Gate Turn-Off Threshold
(VD-VS) Rising, VS = 0V, VCC >
4.3V
-10
-4
-1
mV
TD(ON)
Gate Turn-On Propagation Delay
From VTHON to Gate > 1V
30
52
ns
TD(OFF)
Gate Turn-Off Propagation Delay
From VTHOFF to Gate < 4V
30
62
ns
Minimum On-Time
TON-LR
Minimum On-Time Low Resistance
RTON = 8.25k
0.26
0.34
0.42
µs
TON-HR
Minimum On-Time High Resistance
RTON = 100k
2.2
3
3.8
µs
Synchronization
VTHSYNC
SYNC Falling Threshold
Gate Output from High to Low
VAVDD-2.4
VAVDD-2.0
VAVDD-1.6
V
TSDLY
SYNC Propagation Delay (Note 8)
SYNC Falling to Gate Falling
10%, 4.5V < VCC < 5.5V
40
ns
RSYNC
SYNC Pull Up Resistance (Note 8)
Internal Resistance from SYNC
to VCC, 4.5V < VCC < 5.5V
2.0
k
ZXGD3110N8
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Electrical Characteristics (Continued) (@TA = +25°C, unless otherwise specified.)
Gate Driver
RGUP
Gate Pull-Up Resistance Enabled
IGATE = -100mA
2.3
RGDN
Gate Pull-Down Resistance Enabled
IGATE = 100mA
1.1
ISOURCE
Peak Gate Source Current
CGATE = 22nF
3
A
ISINK
Peak Gate Sink Current
CGATE = 22nF
4
VOHG
Gate Output High Voltage
VCC = 5V
4.7
V
VCC = 12V
9
VOLG
Gate Output Low Voltage
VCC = 5V
0.3
TFGATE
Gate Fall Time
4V to 1V, CGATE = 3,300pF, VCC = 5V
14
42
ns
9V to 1V, CGATE = 3,300pF, VCC = 12V
20
42
TRGATE
Gate Rise Time
1V to 4V, CGATE = 3,300pF, VCC = 5V
16
42
1V to 9V, CGATE = 3,300pF, VCC = 12V
20
42
Exception Handling
TOVER
Overtemperature
+150
°C
TRECOVER
Temperature to Recover from
Overtemperature Exception
+125
°C
Typical Application Circuit
+Vout
PWM controller
CCM/CrCM/DCM
- Vout
ZXGD3110
Drain Gate Source RTON
SYNC
Vcc
RTON
G
DS
RSYNC
C3
C1
C2
C4
Snubber
Transformer
Synchronous MOSFET
PGATE
CPGATE
GND
ZXTR2012
IN
GND OUT
C3
Less than 12V rails can be directly connected to the Vcc. For more than 12V operation, a regulator arrangement is
suggested in the figure.
CPGATE of 0.1µF must be connected
C3 of 1µF must be connected
C1 of >10µF must be connected as close as possible to Vcc and ground with minimum
track length
ZXGD3110N8
Document Number DS37336 Rev. 2 - 4
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Typical Performance Characteristics
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
ZXGD3110N8
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Typical Performance Characteristics (Continued)
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
ZXGD3110N8
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Package Outline Dimensions
Please see http://www.diodes.com/package-outlines.html for the latest version.
SO-8
1
b
e
E
A
A1
(All sides)
±
c
Q
h
45°
R 0.1
D
E0
E1
L
Seating Plane
Gauge Plane
SO-8
Dim
Min
Max
Typ
A
1.40
1.50
1.45
A1
0.10
0.20
0.15
b
0.30
0.50
0.40
c
0.15
0.25
0.20
D
4.85
4.95
4.90
E
5.90
6.10
6.00
E1
3.80
3.90
3.85
E0
3.85
3.95
3.90
e
--
--
1.27
h
-
--
0.35
L
0.62
0.82
0.72
Q
0.60
0.70
0.65
All Dimensions in mm
Suggested Pad Layout
Please see http://www.diodes.com/package-outlines.html for the latest version.
SO-8
CX
Y
Y1
X1
Dimensions
Value (in mm)
C
1.27
X
0.802
X1
4.612
Y
1.505
Y1
6.50
ZXGD3110N8
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INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the
final and determinative format released by Diodes Incorporated.
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written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:
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