General Description
The MAX13013/MAX13014/MAX3023 single-/dual-/quad-
level translators provide the level shifting necessary to
allow 100Mbps data transfer in a multivoltage system.
Externally applied voltages, VCC and VL, set the logic
levels on either side of the device. Logic signals present
on the VLside of the device appear as a higher voltage
logic signal on the VCC side of the device, and vice-
versa.
The MAX13013 single-, the MAX13014 dual-, and the
MAX3023 (UCSP™ package) quad-level translators fea-
ture an enable (EN) input. The MAX3023 (TSSOP pack-
age) quad-level translator features EN and EN inputs.
When disabled, each device places all inputs/outputs
on both sides in tri-state and reduces the VCC supply
current to 0.03µA, and the VLsupply current to 0.1µA.
These devices operate at a guaranteed 100Mbps data
rate for VL> 1.8V.
The MAX13013/MAX13014/MAX3023 accept a +1.65V
to +3.6V VCC voltage and a +1.2V to (VCC - 0.4V) VL
voltage, making them ideal for data transfer between
low-voltage ASICs/programmable logic devices (PLDs)
and higher voltage systems. The MAX13013 is avail-
able in 3 x 2 UCSP and 6-pin SC70 packages. The
MAX13014 is available in 3 x 3 UCSP and 8-pin SOT23
packages. The MAX3023 is available in 4 x 3 UCSP
and 14-pin TSSOP packages. All devices operate over
the extended -40°C to +85°C temperature range.
Applications
CMOS Logic-Level Translation
Low-Voltage ASIC Level Translation
Cell Phones
SPI™, MICROWIRE™ Level Translation
Portable POS Systems
Portable Communication Devices
GPS
Telecommunications Equipment
Features
♦100Mbps Guaranteed Data Rate
♦Bidirectional Level Translation
MAX13013 (Single)
MAX13014 (Dual)
MAX3023 (Quad)
♦VLOperation Down to +1.2V
♦Ultra-Low 0.1µA Supply Current When Disabled
♦Low-Quiescent Current (0.1µA)
♦UCSP, SC70, SOT23, and TSSOP Packages
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
________________________________________________________________ Maxim Integrated Products 1
MAX13014
+1.8V +3.3V
I/O V
CC1
I/O VCC2
I/O VL1
I/O VL2
CLK
VLVCC
DATA
CLK
DATA
GND
GND
GND
0.1µF 0.1µF
+1.8V
SYSTEM
CONTROLLER
+3.3V
SYSTEM
Typical Operating Circuit
GND
I/O VL1I/O VCC1
16EN
5V
L
VCC
MAX13013
SC70
2
34
MAX13013
3 x 2 UCSP
TOP VIEW
(BUMPS ON BOTTOM OF DIE)
I/O VCC1VCC GND
I/O VL1VLEN
TOP VIEW
A
123
B
Pin Configurations
19-3266; Rev 2; 12/04
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MICROWIRE is a trademark of National Semiconductor Corp.
SPI is a trademark of Motorola, Inc.
UCSP is a trademark of Maxim Integrated Products, Inc.
Pin Configurations continued at end of data sheet.
Ordering Information/Selector Guide continued at end of
data sheet.
Ordering Information/Selector Guide
PART TEMP RANGE PIN-PACKAGE PACKAGE
CODE
TOP
MARK
NUMBER OF
VL → VCC
TRANSLATORS
Number of
VCC →→
→→ VL
TRANSLATORS
EN EN
MAX13013EXT -40°C to +85°C 6 SC70 — ACD 1 1 ✓—
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VCC = +1.65V to +3.6V, VL= +1.2V to (VCC - 0.4V), EN = VL, EN = open (MAX3023 TSSOP package only), CIOVL ≤15pF, CIOVCC ≤40pF,
TA= TMIN to TMAX. Typical values are at TA= +25°C.) (Notes 1, 2)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
All voltages are referenced to GND.
VCC ...........................................................................-0.3V to +4V
VL...........................................................................................-0.3V to +4V
I/O VCC_......................................................-0.3V to (VCC + 0.3V)
I/O VL_ ...........................................................-0.3V to (VL+ 0.3V)
EN, EN...........................................................-0.3V to (VL+ 0.3V)
Short-Circuit Duration I/O VL_,
I/O VCC_ to GND ....................................................Continuous
Continuous Power Dissipation (TA= +70°C)
6-Pin SC70 (derate 3.1mW/°C above +70°C)..............245mW
6-Bump UCSP (derate 3.9mW/°C above +70°C).........308mW
8-Bump UCSP (derate 4.7mW/°C above +70°C).........379mW
8-Pin SOT23 (derate 9.1mW/°C above +70°C)............727mW
12-Bump UCSP (derate 6.5mW/°C above +70°C) ...518.8mW
14-Pin TSSOP (derate 9.1mW/°C above +70°C) .........727mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER SUPPLY
VL Supply Range VL1.2 VCC - 0.4 V
VCC Supply Range VCC 1.65 3.60 V
Supply Current from VCC IQVCC I/O V
CC_ = 0, I/O V
L_ = 0
or I/O V
CC_ = VCC, I/O V
L_ = VL0.1 1 µA
I/O V
CC_ = 0, I/O V
L_ = 0
or I/O V
CC_ = VCC, I/O V
L_ = VL0.2 2
Supply Current from VLIQVLI/O V
CC_ = 0, I/O V
L_ = 0
or I/O V
CC_ = VCC, I/O V
L_ = VL,
VL < VCC - 0.2V
10 100
µA
VCC Tri-state Output-Mode
Supply Current ITS-VCC TA = +25°C, EN = 0 0.03 1 µA
TA = +25°C, EN = 0 0.1 0.2
VL Tri-state Output-Mode Supply
Current (MAX13013/MAX13014) ITS-VL TA = +25°C, EN = 0, VL = VCC - 0.2V 1 2 µA
TA = +25°C, EN = 0 50 70
VL Tri-state Output-Mode Supply
Current (MAX3023 TSSOP
Package Only)
ITS-VL
TA = +25°C, EN = 0, VL = VCC - 0.2V 55 74
µA
TA = +25°C, EN = 0 0.15
I/O Tri-state Output-Mode
Leakage Current TA = +25°C, EN = 0, VL = VCC - 0.2V 20 µA
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +1.65V to +3.6V, VL= +1.2V to (VCC - 0.4V), EN = VL, EN = open (MAX3023 TSSOP package only), CIOVL ≤15pF, CIOVCC ≤40pF,
TA= TMIN to TMAX. Typical values are at TA= +25°C.) (Notes 1, 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
LOGIC-LEVEL THRESHOLDS
I/O V
L_ Input-Voltage High VIHL 2/3 x VLV
I/O V
L_ Input-Voltage Low VILL 1/3 x VLV
Pullup Resistance on I/O VL_ 120 Ω
Pulldown Resistance on I/O VL_75Ω
I/O V
CC_ Input-Voltage High VIHC 2/3 x VCC V
I/O V
CC_ Input-Voltage Low VILC 1/3 x VCC V
Pullup Resistance on I/O VCC_ 2.5 kΩ
Pulldown Resistance on I/O VCC_ 2.5 kΩ
EN, EN Input-Voltage High VIH 2/3 x VLV
EN, EN Input-Voltage Low VIL 1/3 x VLV
EN Input Current MAX13013/MAX13014 -5 +5 µA
Pullup Resistance on EN MAX3023 46 62 81 kΩ
Pulldown Resistance on EN MAX3023, TSSOP package only 46 62 81 kΩ
I/O V
L_ Output-Voltage High VOHL I/O VL source current = 20µA 2/3 x VLV
I/O V
L_ Output-Voltage Low VOLL I/O VL sink current = 20µA 1/3 x VLV
I/O V
CC_ Output-Voltage High VOHC I/O VCC source current = 20µA 2/3 x VCC V
I/O V
CC_ Output-Voltage Low VOLC I/O VCC sink current = 20µA 1/3 x VCC V
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
4 _______________________________________________________________________________________
Note 1: VLmust be less than or equal to VCC - 0.4V during normal operation. However, VLcan be greater than VCC during startup
and shutdown conditions.
Note 2: All units are 100% production tested at TA= +25°C. Limits over the operating temperature range are guaranteed by design
and not production tested.
Note 3: Not production tested. Guaranteed by design.
TIMING CHARACTERISTICS
(VCC = +1.65V to +3.6V, VL= +1.2V to (VCC - 0.4V), EN = VL, EN = open (MAX3023 TSSOP package only), CIOVL ≤15pF, CIOVCC ≤
40pF, TA= TMIN to TMAX. Typical values are at TA= +25°C.) (Notes 1, 2)
PARAMETER SYM B O L CONDITIONS MIN TYP MAX UNITS
CIOVCC = 15pF, Figure 1 2.5
CIOVCC = 20pF, Figure 1 3
I/O V
CC_ Rise Time tRVCC
CIOVCC = 40pF, Figure 1 4
ns
CIOVCC = 15pF, Figure 1 2.5
CIOVCC = 20pF, Figure 1 3I/O V
CC_ Fall Time tFVCC
CIOVCC = 40pF, Figure 1 4
ns
I/O V
CC_ One- S hot Outp ut Im p ed ance 18.5 Ω
I/O V
L_ Rise Time tRVL CIOVL = 15pF, Figure 2 2.5 ns
I/O V
L_ Fall Time tFVL CIOVL = 15pF, Figure 2 2.5 ns
I/O V
L_ One- S hot Outp ut Im p ed ance 12.5 Ω
Propagation Delay, Driving I/O VL_ I/OVL-VCC CIOVCC = 15pF, Figure 1 6.5 ns
Propagation Delay, Driving I/O V
CC_ I/OVCC-VL CIOVL = 15pF, Figure 2 6 ns
Part-to-Part Skew ( N ote 3) tPPSKEW CIOVCC = 15pF, CIOVL = 15pF,
VCC = 2.5V, VL = 1.8V 4ns
Propagation Delay from
I/O V
L_ to I/O V
CC_ after Enable tEN-VCC CIOVCC = 15pF, Figure 3 1000 ns
Propagation Delay from
I/O V
CC_ to I/O V
L_ after Enable tEN-VL CIOVL = 15pF, Figure 4 1000 ns
C
IOVCC = 15p F, C
IOVL = 15p F, V
L > 1.8V 100
Maximum Data Rate C
IOVCC = 15p F, C
IOVL = 15p F, V
L > 1.2V 80 Mbps
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
_______________________________________________________________________________________ 5
VL SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX13013 toc01
VCC SUPPLY VOLTAGE (V)
VL SUPPLY CURRENT (mA)
3.53.02.5
0.2
0.4
0.6
0.8
1.0
0
2.0 4.0
DRIVING I/O VL_
VL = 1.8V
CIOVCC = 15pF
VL SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX13013 toc02
VCC SUPPLY VOLTAGE (V)
VL SUPPLY CURRENT (mA)
3.53.02.52.0
0.1
0.2
0.3
0.4
0.5
0.6
0
1.5 4.0
DRIVING I/O VL_
VL = 1.2V
CIOVCC = 15pF
VCC SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX13013 toc03
VCC SUPPLY VOLTAGE (V)
VCC SUPPLY CURRENT (mA)
3.53.02.5
5
10
15
20
25
0
2.0 4.0
DRIVING I/O VL_
VL = 1.8V
CIOVCC = 15pF
VCC SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX13013 toc04
VCC SUPPLY VOLTAGE (V)
VCC SUPPLY CURRENT (mA)
3.53.02.52.0
5
10
15
20
25
0
1.5 4.0
DRIVING I/O VL_
VL = 1.2V
CIOVCC = 15pF
VL SUPPLY CURRENT
vs. TEMPERATURE
MAX13013 toc05
TEMPERATURE (°C)
VL SUPPLY CURRENT (mA)
603510-15
2.4
2.8
3.2
3.6
4.0
2.0
-40 85
DRIVING I/O VCC_
CIOVL = 15pF
VCC SUPPLY CURRENT
vs. TEMPERATURE
MAX13013 toc06
TEMPERATURE (°C)
VCC SUPPLY CURRENT (mA)
603510-15
11
12
13
14
15
16
10
-40 85
DRIVING I/O VCC_
CIOVL = 15pF
VL SUPPLY CURRENT
vs. CAPACITIVE LOAD ON I/O VCC_
MAX13013 toc07
CAPACITIVE LOAD (pF)
VL SUPPLY CURRENT (mA)
302010
0.2
0.4
0.6
0.8
1.0
0
040
DRIVING I/O VL_
VCC SUPPLY CURRENT
vs. CAPACITIVE LOAD ON I/O VCC_
MAX13013 toc08
CAPACITIVE LOAD (pF)
VCC SUPPLY CURRENT (mA)
302010
13
16
19
22
25
10
040
DRIVING I/O VL_
RISE/FALL TIME
vs. CAPACITIVE LOAD ON I/O VCC_
MAX13013 toc09
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
302010
0.3
0.6
0.9
1.2
1.5
0
040
DRIVING I/O VL_
tRISE
tFALL
Typical Operating Characteristics
(Data rate = 100Mbps, VCC = 3.3V, VL= 1.8V, TA= +25°C, unless otherwise noted.)
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
6 _______________________________________________________________________________________
Typical Operating Characteristics (continued)
(Data rate = 100Mbps, VCC = 3.3V, VL= 1.8V, TA= +25°C, unless otherwise noted.)
RISE/FALL TIME
vs. CAPACITIVE LOAD ON I/O VL_
MAX13013 toc10
CAPACITIVE LOAD (pF)
RISE/FALL TIME (ns)
15105
0.2
0.4
0.6
0.8
1.0
1.2
0
020
DRIVING I/O VCC_
tRISE
tFALL
PROPAGATION DELAY
vs. CAPACITIVE LOAD ON I/O VCC_
MAX13013 toc11
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
302010
1
2
3
4
5
0
040
DRIVING I/O VL_
tPLH
tPHL
PROPAGATION DELAY
vs. CAPACITIVE LOAD ON I/O VL_
MAX13013 toc12
CAPACITIVE LOAD (pF)
PROPAGATION DELAY (ns)
15105
1
2
3
4
5
0
020
DRIVING I/O VCC_
tPLH
tPHL
tEN-VCC vs. TEMPERATURE
(CIOVCC = 15pF)
MAX13013 toc13
TEMPERATURE (°C)
tEN-VCC (ns)
603510-15
170
190
210
230
250
150
-40 85
tEN-VL vs. TEMPERATURE
(CIOVL = 15pF)
MAX13013 toc14
TEMPERATURE (°C)
tEN-VL (ns)
603510-15
20
40
60
80
100
0
-40 85
TYPICAL I/O VL_ DRIVING
(CIOVCC = 40pF)
MAX13013 toc15
4ns/div
2V/div
2V/div
TYPICAL I/O VCC_ DRIVING
(CIOVL = 15pF)
MAX13013 toc16
4ns/div
2V/div
2V/div
TYPICAL I/O VL_ DRIVING
(VCC = 1.65V, VL = 1.2V, CIOVCC = 40pF)
MAX13013 toc17
4ns/div
1V/div
1V/div
TYPICAL I/O VCC_ DRIVING
(VCC = 1.65V, VL = 1.2V, CIOVL = 15pF)
MAX13013 toc18
4ns/div
1V/div
1V/div
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
_______________________________________________________________________________________ 7
Pin Description—MAX13013/MAX13014/
MAX3023 (Bidirectional Devices)
PIN
MAX3023 MAX13013 MAX13014
TSSOP 4 x 3
UCSP SC70 3 x 2
UCSP SOT23 3 x 3
UCSP
NAME FUNCTION
1 A1 4 B2 7 A2 I/O VL1Input/Output 1, Referenced to VL
2 B2 — — 6 A3 I/O VL2Input/Output 2, Referenced to VL
3 A2 5 B1 8 A1 VLVL Input Voltage, +1.2V ≤ VL ≤ VCC - 0.4V. Bypass VL to GND
with a 0.1µF capacitor.
4 — — — — — N.C. No Connection
5 B3 — — — — I/O VL3Input/Output 3, Referenced to VL
6 A3 — — — — I/O VL4Input/Output 4, Referenced to VL
7 A4 6 B3 5 B1 EN Active-High Enable Input. If EN is pulled low, all inputs/outputs
are in tristate. Drive EN high (VL) for normal operation.
8 — — — — — EN
Active-Low Enable Input. If EN is pulled high (VL), all inputs/
outputs are in tri-state. Drive EN low for normal operation
(MAX3023 TSSOP package only).
9 B4 — — — — I/O VCC4Input/Output 4, Referenced to VCC
10 C4 — — — — I/O VCC3Input/Output 3, Referenced to VCC
11 C3 2 A3 4 B3 GND Ground
12 C2 1 A1 1 C1 VCC VCC Input Voltage, +1.65V ≤ VCC ≤ +3.6V. Bypass VCC to GND
with a 0.1µF capacitor.
13 C1 — — 3 C3 I/O VCC2Input/Output 2, Referenced to VCC
14 B1 3 A2 2 C2 I/O VCC1Input/Output 1, Referenced to VCC
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
8 _______________________________________________________________________________________
Test Circuits/Timing Diagrams
MAX13013
90%
50%
10%
I/O VCC_
I/O VL_
tRISE/FALL ≤ 3ns
I/OVL-VCC
CIOVCC
EN
I/O VL_
SOURCE
VLVCC
I/O VCC_
I/OVL-VCC
tRVCC
tFVCC
90%
50%
10%
MAX13013
90%
50%
10%
SOURCE
I/O VCC_
I/O VCC_
I/O VL_
tRISE/FALL ≤ 3ns
I/OVCC-VL
EN
VLVCC
I/OVCC-VL
tRVL
tFVL
90%
50%
10%
CIOVL_
I/O VL_
Figure 1. Driving I/O VL_ Test Circuit and Timing
Figure 2. Driving I/O VCC_ Test Circuit and Timing
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
_______________________________________________________________________________________ 9
Test Circuits/Timing Diagrams (continued)
MAX13013
SOURCE I/O VCC_
CIOVCC
1MΩ
EN
VL
0
VL
VCC
0
0
I/O VL_
I/O VCC_ VCC / 2
EN
VL
I/O VL_
MAX13013
SOURCE
CIOVCC
I/O VCC_
EN
I/O VL_
1MΩ
VCC
t'EN-VCC
EN
VL
0
VL
VCC
0
0
I/O VL_
tEN-VCC IS WHICH EVER IS LARGER BETWEEN t'EN-VCC AND t"EN-VCC.
I/O VCC_
VCC / 2
t"EN-VCC
MAX13013
SOURCE
VCC
EN
VL
0
VCC
VL
0
0
I/O VCC_
I/O VL_ VL / 2
EN
I/O VL_ I/O VCC_
MAX13013
SOURCE
EN
t'EN-VL
EN
VL
0
VCC
VL
0
0
I/O VCC_
tEN-VCC IS WHICH EVER IS LARGER BETWEEN t'EN-VCC AND t"EN-VCC.
I/O VL_
VL / 2
t"EN-VL
CIOVL
100kΩ
100kΩ
CIOVL
I/O VL_
I/O VCC_
VL
Figure 3. Propagation Delay from I/O VL_ to I/O VCC_ After EN
Figure 4. Propagation Delay from I/O VCC_ to I/O VL_ After EN
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
10 ______________________________________________________________________________________
Detailed Description
The MAX13013/MAX13014/MAX3023 logic-level trans-
lators provide the level shifting necessary to allow
100Mbps data transfer in a multivoltage system.
Externally applied voltages, VCC and VL, set the logic
levels on either side of the device. Logic signals pre-
sent on the VLside of the device appear as a higher-
voltage logic signal on the VCC side of the device, and
vice-versa. The MAX13013/MAX13014/MAX3023 bidi-
rectional level translators allow data translation in either
direction (VL↔VCC) on any single data line. The
MAX13013/MAX13014/MAX3023 accept VLfrom +1.2V
to (VCC - 0.4V) and operate with VCC from +1.65V to
+3.6V, making them ideal for data transfer between
low-voltage ASICs/PLDs and higher voltage systems.
When in tri-state mode, the MAX13013/MAX13014/
MAX3023 reduce the VCC supply current to 0.03µA,
and the VLsupply current to 0.1µA. These devices
operate at a guaranteed data rate of 100Mbps for VL>
1.8V.
Level Translation
For proper operation, ensure that +1.65V ≤VCC ≤+3.6V,
and +1.2V ≤VL≤VCC - 0.4V. During power-up
sequencing, VL≥VCC does not damage the device.
During power-supply sequencing, when VCC is floating
and VLis powering up, up to 40mA current can be
sourced to each load on the VLside, without the device
latching up. The maximum data rate depends heavily on
the load capacitance (see the Typical Operating
Characteristics Rise/Fall Time graph), output impedance
of the driver, and the operating voltage range (Table 1).
Input Driver Requirements
The MAX13013/MAX13014/MAX3023 architecture is
based on a one-shot accelerator output stage (see
Figure 5). Accelerator output stages are in tri-state
mode except when there is a transition on any of the
translators on the input side, either I/O VL_ or I/O VCC_.
A short pulse is then generated during which the accel-
erator output stages become active and charge/dis-
charge the capacitances at the I/Os. Due to the
architecture, both sides become active during the one-
shot pulse. This can lead to some current feeding into
the external source that is driving the translator.
However, this behavior simply helps to speed up the
transition on the driven side.
For proper operation, the driver has to meet the follow-
ing conditions: less than 25Ωoutput impedance and
greater than 20mA peak output current capability.
Table 1. Data Rate
VL (V) GUARANTEED DATA RATE (Mbps)
VL < 1.8 80
VL ≥ 1.8 100
P
ONE-SHOT
VCC
VL
I/O VLI/O VCC
150Ω
4kΩ
I/O VCC_ TO I/O VL_ PATH
I/O VL_ TO I/O VCC_ PATH
N
ONE-SHOT
P
ONE-SHOT
N
ONE-SHOT
Figure 5. Simplified Functional Diagram (One I/O Line)
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
______________________________________________________________________________________ 11
Figure 6 shows a graph of typical input current versus
input voltage.
Output Load Requirements
The MAX13013/MAX13014/MAX3023 I/O are designed to
drive CMOS inputs. Do not load the I/O lines with a resis-
tive load less than 25kΩ. Also, do not place an RC circuit
at the input of these devices to slow down the edges. If a
slower rise/fall time is required, refer to the
MAX3000E/MAX3001E logic-level-translators data sheet.
For I2C level translation, refer to the MAX3372E-
MAX3379E/MAX3390E–MAX3393E data sheet.
Enable Inputs
The MAX13013 single-, the MAX13014 dual- and the
MAX3023 (UCSP package) quad-level translators feature
an EN input. The MAX3023 (TSSOP package) quad-level
translator features both EN and EN inputs (see Table 2
for operating mode). Note that the MAX3023 (TSSOP
package) has internal pullup and pulldown circuitry on
EN and EN, respectively. If left unconnected, EN is pulled
up to VLand EN is pulled down to GND.
Applications Information
Power-Supply Decoupling
To reduce ripple and the chance of introducing data
errors, bypass VLand VCC to ground with a 0.1µF
ceramic capacitor. Place all capacitors as close to the
power-supply inputs as possible.
Unidirectional vs. Bidirectional Level
Translator
The MAX13013/MAX13014/MAX3023 bidirectional
translators can operate as a unidirectional device to
translate signals without inversion. These devices pro-
vide the smallest solution (UCSP package) for unidirec-
tional level translation without inversion.
UCSP Applications Information
For the latest application details on UCSP construction,
dimensions, tape carrier information, PC board tech-
niques, bump-pad layout, and recommended reflow tem-
perature profiles, as well as the latest information on
reliability testing results, go to Maxim’s web site at
www.maxim-ic.com/ucsp to find the Application Note:
UCSP—A Wafer-Level Chip-Scale Package.
Table 2. MAX3023 (TSSOP Package)
Operating Mode
EN
EN
VIN
VTH_IN / RIN*
-(VS - VTH_IN) /
RIN*
IIN
VS
WHERE VS = VCC OR VL
*RIN = 4kΩ WHEN DRIVING VL SIDE; RIN = 150Ω WHEN DRIVING VCC SIDE.
0
VTH_IN
Figure 6. Typical IIN vs. VIN
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
12 ______________________________________________________________________________________
Pin Configurations (continued)
TOP VIEW
MAX13014
UCSP
(BUMPS ON BOTTOM OF DIE)
23
I/O VL2I/O VL1
VL
GND
EN
I/O VCC2I/O VCC1
VCC
1
I/O VL2
ENGND
1
2
8
7
VL
I/O VL1I/O VCC1
I/O VCC2
VCC
SOT23
3
4
6
5
MAX13014
A
B
C
TOP VIEW
UCSP
(BUMPS ON BOTTOM OF DIE)
I/O VL4EN
I/O VL1
1
A
B
C
234
VL
I/O VL3I/O VCC4
I/O VCC1I/O VL2
GND I/O VCC3
I/O VCC2VCC
14
13
12
11
10
9
8
1
2
3
4
5
6
7
I/O VCC1
I/O VCC2
VCC
GNDN.C.
VL
I/O VL2
I/O VL1
MAX3023
MAX3023
I/O VCC3
I/O VCC4
ENEN
I/O VL4
I/O VL3
TSSOP
Ordering Information/Selector Guide (continued)
PART TEMP RANGE PIN-PACKAGE PACKAGE
CODE
TOP
MARK
NUMBER OF
VL → VCC
TRANSLATORS
Number of
VCC →→
→→ VL
TRANSLATORS
EN EN
MAX13013EBT-T -40°C to +85°C 3 x 2 UCSP-6 B6-1 ADF 1 1 ✓—
MAX13014EKA -40°C to +85°C 8 SOT23 — AEKB 2 2 ✓—
MAX13014EBL-T -40°C to +85°C 3 x 3 UCSP-9 B9-2 AEN 2 2 ✓—
MAX3023EUD -40°C to +85°C 14 TSSOP — — 4 4 ✓✓
MAX3023EBC-T -40°C to +85°C 4 x 3 UCSP-12 B12-1 ABW 4 4 ✓—
Chip Information
TRANSISTOR COUNT:
MAX13013: 261
MAX13014: 444
MAX3023: 791
PROCESS: BiCMOS
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
______________________________________________________________________________________ 13
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
SC70, 6L.EPS
PACKAGE OUTLINE, 6L SC70
21-0077 1
1
C
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
14 ______________________________________________________________________________________
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
6L, UCSP.EPS
G
1
1
21-0097
PACKAGE OUTLINE, 3x2 UCSP
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
______________________________________________________________________________________ 15
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
SOT23, 8L .EPS
REV.DOCUMENT CONTROL NO.APPROVAL
PROPRIETARY INFORMATION
TITLE:
3.002.60E
C
E1
E
BETWEEN 0.08mm AND 0.15mm FROM LEAD TIP.
8. MEETS JEDEC MO178.
8∞
0.60
1.75
0.30
L2
0∞
e1
e
L
1.50E1
0.65 BSC.
1.95 REF.
0.25 BSC.
GAUGE PLANE
SEATING PLANE C
C
L
PIN 1
I.D. DOT
(SEE NOTE 6)
L
C
L
C
A2
e1
D
DETAIL "A"
5. COPLANARITY 4 MILS. MAX.
NOTE:
7. SOLDER THICKNESS MEASURED AT FLAT SECTION OF LEAD
6. PIN 1 I.D. DOT IS 0.3 MM ÿ MIN. LOCATED ABOVE PIN 1.
4. PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING.
3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH & METAL BURR.
HEEL OF THE LEAD PARALLEL TO SEATING PLANE C.
2. FOOT LENGTH MEASURED FROM LEAD TIP TO UPPER RADIUS OF
1. ALL DIMENSIONS ARE IN MILLIMETERS.
L2
L
A1
A
0.45
1.30
0.15
1.45
MAX
0.28b
0.90A2
0.00A1
0.90
A
MIN
SYMBOL
3.00
0.20
2.80D
0.09
C
SEE DETAIL "A"
L
C
be
D1
21-0078
1
PACKAGE OUTLINE, SOT-23, 8L BODY
0
0
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
16 ______________________________________________________________________________________
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
9LUCSP, 3x3.EPS
I1
1
21-0093
PACKAGE OUTLINE, 3x3 UCSP
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
______________________________________________________________________________________ 17
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
TSSOP4.40mm.EPS
MAX13013/MAX13014/MAX3023
+1.2V to +3.6V, 0.1µA, 100Mbps,
Single-/Dual-/Quad-Level Translators
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
12L, UCSP 4x3.EPS
F1
1
21-0104
PACKAGE OUTLINE, 4x3 UCSP