A2084A-08TT - Alliance Semiconductor

Alliance Semiconductor



Preliminary Specification

P2082/84A

SEP, 2002 PulseCore – A Division of Alliance Semiconductor

Revision C 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Low Cost Frequency Multiplier

FEATURES

• Generates a 2X, and 4X clocks of the input

clock frequency

• Input clock frequency range from

3 MHz to 78 MHz

• Provides up to:

P2082A: 156 MHz output clock frequency

P2084A: 312 MHz output clock frequency

• External loop filter

• Ultra low cycle-to-cycle jitter

• 3.3V operating voltage range

• 10 mA output drives

• TTL or CMOS compatible outputs

• Ultra-low power CMOS design

• Available in Industrial Temperature Range

(-25C to +85C)

• Available in 8 pin SOIC and TSSOP

PRODUCT DESCRIPTION

The P2082A/84A is a versatile frequency multiplier

that are designed specifically as a cost effective

alternative to the high precision frequency

oscillator.

The P2082A/84A can generate a 2X and 4X

output clock respectively of the input frequency

which allows system cost savings by using an

inexpensive crystal or resonator to achieve high

frequency multiplication.

The P2082A/84A provides up to 156 MHz and 312

MHz output clock frequencies respectively through

the use of the Phase-Lock-Loop (PLL) technique

which delivers low jitter and high precision

synthesized clocks.

APPLICATIONS

The P2082A/84A is targeted towards high

frequency can OSC replacement market. The

application includes xDSL, Router, Networking,

PC peripheral, and embedded system.

Figure 1 - P2082A/84A Pin Diagram

P2082A

P2084A

1 8

2 7

XIN

XOUT

FS1

VDD

FS0

ClkOut

VSS

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Alliance Semiconductor



Preliminary Specification

P2082/84A

SEP, 2002 PulseCore – A Division of Alliance Semiconductor

Revision C 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Figure 2 - P2082A/84A Block Diagram

P2082A/84A Block Diagram

Output

Divider

XIN

VSS

CLKOUT

XOUT

Crystal

Oscillator

Modulation

Phase

Detector

Frequency

Divider

Feedback

Divider

VCO

PLL

FS0 FS1 VDD

PIN DESCRIPTION

PIN # Name Type Description

1 XIN/CLKIN I Connect to crystal or clock input.

2 XOUT I Crystal output

3 FS1 I Digital logic input used to select input frequency range (see Table 1). This

pin has an internal pull-up resistor.

4 LF I External Loop Filter for the PLL. See Table 2 for detail value.

5 VSS P Ground Connection. Connect to system ground.

6 ClkOut O Clock Output.

7 FS0 I Digital logic input used to select input frequency range (see Table 1). This

pin has an internal pull-up resistor.

8 VDD P Connect to +3.3V

Table 1 - Input Frequency Selection

FS1 FS0 Input

(MHz)

Output Frequency Scaling

(MHz)

P2082A P2084A

0 0 3 to 9 6 to 18 12 to 36

0 1 10 to 19 20 to 38 40 to 76

1 0 20 to 38 40 to 76 80 to 152

1 1 39 to 78 78 to 156 156 to 312

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

Preliminary Specification

P2082/84A

SEP, 2002 PulseCore – A Division of Alliance Semiconductor

Revision C 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Table 2 - Loop Filter Selection Table VDD 3.3V

INPUT

(MHz)

FS1 FS0 C1 (pF) C2 (pF) R1

(ohms)

3 0 0 560 330,000 220

4 0 0 560 100,000 270

5 0 0 560 100,000 390

6 0 0 560 100,000 510

7 0 0 560 100,000 620

8 0 0 560 100,000 820

9 0 0 560 100,000 1,000

10 0 1 560 100,000 330

11 0 1 560 100,000 390

12 0 1 560 100,000 510

13 0 1 560 100,000 560

14 0 1 560 100,000 620

15 0 1 560 100,000 750

16 0 1 560 100,000 820

17 0 1 560 100,000 910

18 0 1 560 100,000 1,000

19 0 1 560 100,000 1,200

20 1 0 560 100,000 330

21-22 1 0 560 100,000 390

23-24 1 0 560 100,000 510

25-26 1 0 560 100,000 560

27-28 1 0 560 100,000 620

29-30 1 0 560 100,000 750

31-32 1 0 560 100,000 820

33-34 1 0 560 100,000 910

35-36 1 0 560 100,000 1,000

37-38 1 0 560 100,000 1,200

39-42 1 1 560 100,000 330

43-46 1 1 560 100,000 390

47-50 1 1 560 100,000 510

51-54 1 1 560 100,000 560

55-58 1 1 560 100,000 620

59-62 1 1 560 100,000 750

63-66 1 1 560 100,000 820

67-70 1 1 560 100,000 910

71-74 1 1 560 100,000 1,000

75-78 1 1 560 100,000 1,200

C2 C1

PIN 4 LF

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

Preliminary Specification

P2082/84A

SEP, 2002 PulseCore – A Division of Alliance Semiconductor

Revision C 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

OUTPUT CLOCK SELECTION

Example: The P2084A can generate 4X from the input reference frequency. P2084A’s internal crystal

osillator circuits allow the use of an inexpensive crystal of resonator to replace expensive can osilator that are

used in networking, PC peripheral, xDSL, and consumer applications for high frequency generation. Its input

frequency range is optimized for operation between 3 MHz to 78 MHz and its output frequency can deliver up

to 312 MHz.

Figure 3 - P2082A/84A Application Schematic

+3.3V

1 8

2 7

CLKIN

XOUT

FS1

VDD

ClkOut

FS0

VSS

25MHz

P2084A

Modulated

100MHz

0.1uF

C2 C1

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

Preliminary Specification

P2082/84A

SEP, 2002 PulseCore – A Division of Alliance Semiconductor

Revision C 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Rating Unit

VDD, VIN Voltage on any pin with respect to GND -0.5 to +7.0 V

TSTG Storage Temperature -65 to +125 ºC

TA Operating Temperature 0 to +70 ºC

DC ELECTRICAL CHARACTERISTICS at VDD=3.3V and Temp = +25oC

Symbol Parameter

Min Typ Max Unit

VIL Input Low Voltage GND – 0.3 - 0.8 V

VIH Input High Voltage 2.0 - VDD + 0.3 V

IIL Input Low Current (internal input pull-up

resistor on FS0 and FS1)

- 60 -

µA

IIH Input High Current (internal input pull-up

resistor on FS0 and FS1)

- 0 -

µA

IXOL

XOUT Output Low Current - 10 - mA

IXOH

XOUT Output High Current - 10 - mA

VOL Output Low Voltage (VDD = 3.3V, IOL = 20 mA) - - 0.4 V

VOH Output High Voltage (VDD = 3.3V, IOH = 20 mA) 2.5 - - V

IDD Static Supply Current - 3 - mA

ICC Typical Dynamic Supply Current

(25pF scope probe loading)

5.2

@ 3 MHz

21.2

@ 82 MHz

VDD Operating Voltage 3.0 3.3 3.6 V

tON

Power Up Time (CLOOP=0.1µF, at 16MHz,

first locked clock cycle after power up)

- 7 - mS

ZOUT Clock Output Impedance (at 16MHz) - 28 - Ω

AC ELECTRICAL CHARACTERISTICS –25C to +85C

Symbol Parameter

Min Typ Max Unit

fIN Input Frequency 3 - 78 MHz

fOUT P2082A

P2084A

156

312

MHz

tLH

Note 1

Output Rise Time (measured at 0.8V to 2.0V) TBD ns

tHL

Note 1

Output Fall Time (measured at 2.0V to 0.8V) TBD ns

tJC Jitter (cycle to cycle) - - TBD ps

tD Output Duty Cycle 45 50 55 %

Note 1: tLH and tHL are measured into a capacitive load of 10pF

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

Preliminary Specification

P2082/84A

SEP, 2002 PulseCore – A Division of Alliance Semiconductor

Revision C 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Figure 4 - Mechanical Package Outline (8 Pin SOIC)

X208XA

LOT NUMBER

YYWW

INCHES MILLIMETERS

SYMBOL MIN NOR MAX MIN NO

MAX

A 0.057 0.064 0.071 1.45 1.63 1.80

A1 0.004 0.007 0.010 0.10 0.18 0.25

A2 0.053 0.061 0.069 1.35 1.55 1.75

B 0.012 0.016 0.020 0.51 0.41 0.31

C 0.004 0.006 0.001 0.10 0.15 0.25

D 0.186 0.194 0.202 4.72 4.92 5.12

E 0.148 0.156 0.164 3.75 3.95 4.15

e 0.050 BSC 1.27 BSC

H 0.224 0.236 0.248 5.70 6.00 6.30

L 0.012 0.020 0.028 0.30 0.50 0.70

a 0° 5° 8° 0° 5° 8°

Note: Controlling dimensions are millimeters.

SOIC - 0.074 grams unit weight

Figure 5 - Mechanical Package Outline (8 Pin TSSOP)

INCHES MILLIMETERS

SYMBOL MIN NOR MAX MIN NO

MAX

A - - 0.047 - - 1.10

A1 0.002 - 0.006 0.05 - 0.15

A2 0.031 0.039 0.041 0.80 1.00 1.05

B 0.007 - 0.012 0.19 - 0.30

C 0.004 - 0.008 0.09 - 0.20

D 0.114 0.118 0.122 2.90 3.00 3.10

E 0.169 0.173 0.177 4.30 4.40 4.50

e 0.026 BSC 0.65 BSC

H 0.244 0.252 0.260 6.20 6.40 6.60

L 0.018 0.024 0.030 0.45 0.60 0.75

a 0° - 8° 0° - 8°

Note: Controlling dimensions are millimeters.

TSSOP - 0.034 grams unit weight

208XA

Lot #

YYWW

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

Preliminary Specification

P2082/84A

SEP, 2002 PulseCore – A Division of Alliance Semiconductor

Revision C 3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Ordering Information:

X 208XA- 08 XX

Device Pin Count

Device Number

Flow

P=Commercial Temperature Range (0°C to +70°C)

I =Industrial Temperature Range (-25°C to +85°C)

A=Automotive Temperature Range (-40°C to +125°C)

Package

ST=SOIC in Tube

SR=SOIC in Tape and Reel

TT=TSSOP in Tube

TR=TSSOP in Tape and Reel

Ordering Number Marking Package Type QTY / Reel Temperature

X208XA-08ST P208xA 8 PIN SOIC, TUBE 0°C to 70°C

X208XA-08SR P208xA 8 PIN SOIC, TAPE & REEL 2,500 0°C to 70°C

X208XA-08TT P208xA 8 PIN TSSOP, TUBE 0°C to 70°C

X208XA-08TR P208xA 8 PIN TSSOP, TAPE & REEL 2,500 0°C to 70°C

"Licensed under U.S. Patent Nos. 5,488,627 and 5,631,920"

Preliminary data sheet. Specifications subject to change without notice.

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