(R) Preliminary Specification P2082/84A Alliance Semiconductor Low Cost Frequency Multiplier FEATURES * Generates a 2X, and 4X clocks of the input clock frequency * Input clock frequency range from 3 MHz to 78 MHz * Provides up to: P2082A: 156 MHz output clock frequency P2084A: 312 MHz output clock frequency * External loop filter * Ultra low cycle-to-cycle jitter * 3.3V operating voltage range * 10 mA output drives * TTL or CMOS compatible outputs * Ultra-low power CMOS design * Available in Industrial Temperature Range (-25C to +85C) * Available in 8 pin SOIC and TSSOP PRODUCT DESCRIPTION APPLICATIONS The P2082A/84A is a versatile frequency multiplier that are designed specifically as a cost effective alternative to the high precision frequency oscillator. The P2082A/84A can generate a 2X and 4X output clock respectively of the input frequency which allows system cost savings by using an inexpensive crystal or resonator to achieve high frequency multiplication. The P2082A/84A is targeted towards high frequency can OSC replacement market. The application includes xDSL, Router, Networking, PC peripheral, and embedded system. The P2082A/84A provides up to 156 MHz and 312 MHz output clock frequencies respectively through the use of the Phase-Lock-Loop (PLL) technique which delivers low jitter and high precision synthesized clocks. SEP, 2002 Revision C Figure 1 - P2082A/84A Pin Diagram X IN 1 8 VDD XOUT 2 7 FS0 FS1 3 6 C lk O u t LF 4 5 VSS P2082A P2084A PulseCore - A Division of Alliance Semiconductor 3160 De La Cruz Blvd., Suite 200 * Santa Clara * CA * 95054 Tel (408) 748-6988 * Fax (408) 748-0009 http://www.pulsecore.com 1 of 7 (R) Preliminary Specification P2082/84A Alliance Semiconductor Figure 2 - P2082A/84A Block Diagram FS0 FS1 LF VDD PLL M o d u la tio n X IN C rysta l O s cilla to r F re q u e n cy D ivid e r XO UT F e e d b a ck D ivid e r P h a se D e te cto r VCO O u tp u t D ivid e r CLKO UT P 2 0 8 2 A /8 4 A B lo c k D ia g ra m VSS PIN DESCRIPTION PIN # 1 2 3 Name XIN/CLKIN XOUT FS1 Type I I I 4 5 6 7 LF VSS ClkOut FS0 I P O I 8 VDD P Description Connect to crystal or clock input. Crystal output Digital logic input used to select input frequency range (see Table 1). This pin has an internal pull-up resistor. External Loop Filter for the PLL. See Table 2 for detail value. Ground Connection. Connect to system ground. Clock Output. Digital logic input used to select input frequency range (see Table 1). This pin has an internal pull-up resistor. Connect to +3.3V Table 1 - Input Frequency Selection SEP, 2002 Revision C FS1 FS0 Input (MHz) 0 0 1 1 0 1 0 1 3 to 9 10 to 19 20 to 38 39 to 78 Output Frequency Scaling (MHz) P2082A P2084A 6 to 18 12 to 36 20 to 38 40 to 76 40 to 76 80 to 152 78 to 156 156 to 312 PulseCore - A Division of Alliance Semiconductor 3160 De La Cruz Blvd., Suite 200 * Santa Clara * CA * 95054 Tel (408) 748-6988 * Fax (408) 748-0009 http://www.pulsecore.com 2 of 7 (R) Preliminary Specification Alliance Semiconductor P2082/84A Table 2 - Loop Filter Selection Table VDD 3.3V R1 PIN 4 LF C2 INPUT (MHz) 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21-22 23-24 25-26 27-28 29-30 31-32 33-34 35-36 37-38 39-42 43-46 47-50 51-54 55-58 59-62 63-66 67-70 71-74 75-78 SEP, 2002 Revision C C1 FS1 FS0 C1 (pF) C2 (pF) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 560 330,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 100,000 R1 (ohms) 220 270 390 510 620 820 1,000 330 390 510 560 620 750 820 910 1,000 1,200 330 390 510 560 620 750 820 910 1,000 1,200 330 390 510 560 620 750 820 910 1,000 1,200 PulseCore - A Division of Alliance Semiconductor 3160 De La Cruz Blvd., Suite 200 * Santa Clara * CA * 95054 Tel (408) 748-6988 * Fax (408) 748-0009 http://www.pulsecore.com 3 of 7 (R) Preliminary Specification P2082/84A Alliance Semiconductor OUTPUT CLOCK SELECTION Example: The P2084A can generate 4X from the input reference frequency. P2084A's internal crystal osillator circuits allow the use of an inexpensive crystal of resonator to replace expensive can osilator that are used in networking, PC peripheral, xDSL, and consumer applications for high frequency generation. Its input frequency range is optimized for operation between 3 MHz to 78 MHz and its output frequency can deliver up to 312 MHz. Figure 3 - P2082A/84A Application Schematic 25MHz R1 C2 SEP, 2002 Revision C 1 CLKIN VDD 8 2 XOUT FS0 7 3 FS1 ClkOut 6 4 LF VSS 5 P2084A 0.1uF +3.3V Modulated 100MHz C1 PulseCore - A Division of Alliance Semiconductor 3160 De La Cruz Blvd., Suite 200 * Santa Clara * CA * 95054 Tel (408) 748-6988 * Fax (408) 748-0009 http://www.pulsecore.com 4 of 7 (R) Preliminary Specification P2082/84A Alliance Semiconductor ABSOLUTE MAXIMUM RATINGS Symbol VDD, VIN TSTG TA Parameter Voltage on any pin with respect to GND Storage Temperature Operating Temperature Rating -0.5 to +7.0 -65 to +125 0 to +70 Unit V C C DC ELECTRICAL CHARACTERISTICS at VDD=3.3V and Temp = +25oC Symbol Parameter VIL VIH IIL IXOL Input Low Voltage Input High Voltage Input Low Current (internal input pull-up resistor on FS0 and FS1) Input High Current (internal input pull-up resistor on FS0 and FS1) XOUT Output Low Current IXOH XOUT Output High Current VOL VOH IDD ICC Output Low Voltage (VDD = 3.3V, IOL = 20 mA) Output High Voltage (VDD = 3.3V, IOH = 20 mA) Static Supply Current Typical Dynamic Supply Current (25pF scope probe loading) Operating Voltage IIH VDD tON ZOUT Power Up Time (CLOOP=0.1F, at 16MHz, first locked clock cycle after power up) Clock Output Impedance (at 16MHz) Min Typ Max Unit GND - 0.3 2.0 - 60 0.8 VDD + 0.3 - V V A - 0 - A - 10 - mA - 10 - mA 2.5 5.2 @ 3 MHz 3.0 - 3 V V mA mA 3.3 7 0.4 21.2 @ 82 MHz 3.6 - - 28 - Min Typ Max Unit 3 6 12 - 78 156 312 TBD MHz MHz MHz ns TBD ns V mS AC ELECTRICAL CHARACTERISTICS -25C to +85C Symbol Parameter fIN fOUT Input Frequency P2082A P2084A Output Rise Time (measured at 0.8V to 2.0V) tLH Note 1 tHL Output Fall Time (measured at 2.0V to 0.8V) Note 1 tJC Jitter (cycle to cycle) tD Output Duty Cycle 45 Note 1: tLH and tHL are measured into a capacitive load of 10pF SEP, 2002 Revision C 50 TBD 55 ps % PulseCore - A Division of Alliance Semiconductor 3160 De La Cruz Blvd., Suite 200 * Santa Clara * CA * 95054 Tel (408) 748-6988 * Fax (408) 748-0009 http://www.pulsecore.com 5 of 7 (R) Preliminary Specification P2082/84A Alliance Semiconductor Figure 4 - Mechanical Package Outline (8 Pin SOIC) C MILLIMETERS MIN NO MAX R E H 0.057 0.064 0.071 1.45 1.63 1.80 A 0.004 0.007 0.010 0.10 0.18 0.25 A1 0.053 0.061 0.069 1.35 1.55 1.75 A2 0.012 0.016 0.020 0.51 0.41 0.31 B a 0.004 0.006 0.001 0.10 0.15 0.25 C 0.186 0.194 0.202 4.72 4.92 5.12 D 0.148 0.156 0.164 3.75 3.95 4.15 E 0.050 BSC 1.27 BSC e 0.224 0.236 0.248 5.70 6.00 6.30 H 0.012 0.020 0.028 0.30 0.50 0.70 L 0 5 8 0 5 8 a Note: Controlling dimensions are millimeters. SOIC - 0.074 grams unit weight Figure 5 - Mechanical Package Outline (8 Pin TSSOP) L SYMBOL X208XA LOT NUMBER YYWW D A2 B e A A1 C Lot # YYWW X 208XA H E a D A2 B SEP, 2002 Revision C e A1 A INCHES NOR MAX MILLIMETERS MIN NO MAX R 0.047 1.10 A 0.002 0.006 0.05 0.15 A1 0.031 0.039 0.041 0.80 1.00 1.05 A2 0.007 0.012 0.19 0.30 B 0.004 0.008 0.09 0.20 C 0.114 0.118 0.122 2.90 3.00 3.10 D 0.169 0.173 0.177 4.30 4.40 4.50 E 0.026 BSC 0.65 BSC e 0.244 0.252 0.260 6.20 6.40 6.60 H 0.018 0.024 0.030 0.45 0.60 0.75 L 0 8 0 8 a Note: Controlling dimensions are millimeters. TSSOP - 0.034 grams unit weight SYMBOL L MIN MIN INCHES NOR MAX PulseCore - A Division of Alliance Semiconductor 3160 De La Cruz Blvd., Suite 200 * Santa Clara * CA * 95054 Tel (408) 748-6988 * Fax (408) 748-0009 http://www.pulsecore.com 6 of 7 (R) Preliminary Specification P2082/84A Alliance Semiconductor Ordering Information: X 208XA- 08 XX Package ST=SOIC in Tube SR=SOIC in Tape and Reel TT=TSSOP in Tube TR=TSSOP in Tape and Reel Device Pin Count Device Number Flow P=Commercial Temperature Range (0C to +70C) I =Industrial Temperature Range (-25C to +85C) A=Automotive Temperature Range (-40C to +125C) Ordering Number X208XA-08ST X208XA-08SR X208XA-08TT X208XA-08TR Marking P208xA P208xA P208xA P208xA Package Type 8 PIN SOIC, TUBE 8 PIN SOIC, TAPE & REEL 8 PIN TSSOP, TUBE 8 PIN TSSOP, TAPE & REEL QTY / Reel 2,500 2,500 Temperature 0C to 70C 0C to 70C 0C to 70C 0C to 70C "Licensed under U.S. Patent Nos. 5,488,627 and 5,631,920" Preliminary data sheet. Specifications subject to change without notice. SEP, 2002 Revision C PulseCore - A Division of Alliance Semiconductor 3160 De La Cruz Blvd., Suite 200 * Santa Clara * CA * 95054 Tel (408) 748-6988 * Fax (408) 748-0009 http://www.pulsecore.com 7 of 7