FUJITSU MICROELECTRONICS DATA SHEET DS07-12536-6E 8-bit Proprietary Microcontroller CMOS F2MC-8L MB89940 Series MB89943/945/P945/PV940 DESCRIPTION The MB89940 series is specially designed for automotive instrumentation applications. It features a combination of two PWM pulse generators and four high-drive-current outputs for controlling a stepping motor. It also contains two analog inputs, two PWM pulse generators and 10-digit LCD controller/driver for various sensor/indicator devices. The MB89940 series is manufactured with high performance CMOS technologies and packaged in a 48-pin QFP. FEATURES * * * * * * * * * * * * * * * 8-bit core CPU: 4 MHz system clock (8 MHz external, 500 ns instruction cycle) 21-bit timebase timer Watchdog timer Clock generator/controller 16-bit interval timer Two PWM pulse generators with four high-drive-current outputs Two-channel 8-bit A/D converter Three external interrupt Low supply voltage reset External voltage monitor interrupt Two more PWM pulse generators for controlling indicator devices 4-common 17-segment LCD driver/controller Package: 48-pin plastic QFP, 48-pin ceramic MQFP 5.0 V single power supply (VPP required for MB89P945) On-chip voltage regulator for internal 3.0 V power supply (MB89943, MB89945) For the information for microcontroller supports, see the following web site. http://edevice.fujitsu.com/micom/en-support/ Copyright(c)2002-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved 2008.10 MB89940 Series PRODUCT LINEUP Part number Item Classification ROM size MB89943 MB89945 MB89P945 MB89PV940 Mass-produced products (mask ROM products) One-time PROM Piggyback 8 K x 8 bits 16 K x 8 bits (internal mask ROM) (internal mask ROM) 16 K x 8 bits (internal ROM) 32 K x 8 bits (external on piggyback) 512 x 8 bits RAM size 1 K x 8 bits CPU functions The number of instructions: 136 Instruction cycle: 0.5 s*1@8 MHz Interrupt response time: 4.0 s*1@8 MHz Multiply instruction time: 19 instruction cycles Divide instruction time: 21 instruction cycles Direct addressing memory-to/from-register data transfer: 7 instruction cycles Ports Output: Input/Output: Timebase timer 8-bit/16-bit interval timer 5-bit N-ch open-drain Two 8-bit CMOS schmitt I/Os and 8-bit CMOS I/Os 21 bits Interrupt interval: 1 ms, 4.1 ms, 32.8 ms or 524.3 ms Can be used as two 8-bit timers or one 16-bit timer Operation clock: 1 s, 16 s, 256 s or external input *1 Watchdog timer Reset interval: Approx. 524 ms to 1049 ms Stepping motor controller Two 8-bit PWM pulse generators Synchronized 4-channel high current output Operation clock: 250 ns, 500 ns, 1 s or 4 s*1 8-bit PWM timers Two 8-bit PWM timers External interrupt 3 channels, selective positive edge or negative edge trigger A/D converter LCD controller & driver Low supply voltage reset 8-bit resolution, two-channel input A/D conversion time : (MB89943/945 : 26 s*1/8 MHz oscillation, MB89P945/MB89PV940 : 22 s*1/8MHz oscillation) 4-common and 17-segment outputs Number of outputs programmable Autonomous reset when low supply voltage Reset voltage: 3.3 V, 3.6 V, 4.0 V External voltage monitor interrupt Interrupts when voltage at external pin is lower than the reference voltage Standby modes Stop mode and sleep mode Operating voltage*2 Process External EPROM 3.5 V to 5.5 V CMOS MBM27C256A-20TVM *1: Execution times and clock cycle times are dependent on the use of MCU. *2: Varies with conditions such as the operating frequency. (See section " Electrical Characteristics".) In the case of the MB89PV940, the voltage varies with the restrictions of the EPROM for use. 2 DS07-12536-6E MB89940 Series PACKAGE AND CORRESPONDING PRODUCTS MB89943 MB89945 MB89P945 Package x FPT-48P-M16 MQP-48C-P01 : Available MB89PV940 x x: Not available Note: For more information about each package, see section " Package Dimensions". DIFFERENCES AMONG PRODUCTS 1. Memory Size Prior to evaluating/developing the software for the MB89940 series, please check the differences between the product types. * RAM/ROM configurations are dependent on the product type. * If the bottom address of the stack is set to the upper limit of the RAM address, it should be relocated when changing the product type. 2. Power Dissipation * For the piggyback product, add the power dissipation of the EPROM on the piggyback. * The power dissipation differs between the product types. 3. Technology The mask ROM product is fabricated with a 0.5 m CMOS technology whereas the other products with 0.8 m CMOS technology. Also the mask ROM product contains the on-chip voltage regulator for the internal 3.0 power supply. For details, refer. 4. Mask Option Functions that can be selected as options and how to designate these options vary by the product. Before using options check section " Mask Options". * No options are available for the piggyback product. * The power-on reset and reset output options are always activated with the mask ROM product. * Pull-up option must not be specified with the pins used as LCD outputs. DS07-12536-6E 3 MB89940 Series PIN ASSIGNMENT 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 DVCC P30/FUELO P00/SEG00 P01/SEG01 P02/SEG02 P03/SEG03 P04/SEG04 P05/SEG05 P06/SEG06 P07/SEG07 P10/SEG08 P11/SEG09 P24/V3 P23/TO/V2 P22/EC/V1 P21/V0 P20/SEG16 P17/SEG15 VSS P16/SEG14 P15/SEG13 P14/SEG12 P13/SEG11 P12/SEG10 AVCC RST P41/COM0 P42/COM1 X0 X1 VCC P43/COM2 P44/COM3 P27/INT2 P26/INT1 P25/INT0 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 MODE VINT P40/PW P37/FUELI P36/TEMPI AVSS DVSS P35/PWM2M P34/PWM2P P33/PWM1M P32/PWM1P P31/TEMPO (Top view) (FPT-48P-M16) (Continued) 4 DS07-12536-6E MB89940 Series (Continued) 60 59 58 57 56 55 54 53 77 78 79 80 49 50 51 52 69 70 71 72 73 74 75 76 13 14 15 16 17 18 19 20 21 22 23 24 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 25 DVCC P30/FUELO P00/SEG00 P01/SEG01 P02/SEG02 P03/SEG03 P04/SEG04 P05/SEG05 P06/SEG06 P07/SEG07 P10/SEG08 P11/SEG09 P24/V3 P23/TO/V2 P22/EC/V1 P21/V0 P20/SEG16 P17/SEG15 VSS P16/SEG14 P15/SEG13 P14/SEG12 P13/SEG11 P12/SEG10 AVCC RST P41/COM0 P42/COM1 X0 X1 VCC P43/COM2 P44/COM3 P27/INT2 P26/INT1 P25/INT0 68 67 66 65 64 63 62 61 48 47 46 45 44 43 42 41 40 39 38 37 MODE VINT P40/PW P37/FUELI P36/TEMPI AVSS DVSS P35/PWM2M P34/PWM2P P33/PWM1M P32/PWM1P P31/TEMPO (Top view) (MQP-48C-P01) * Pin assignment on package top (MB89PV940 only) Pin no. Pin name Pin no. Pin name Pin no. Pin name Pin no. Pin name 49 A15 57 N.C. 65 O4 73 OE 50 A12 58 A2 66 O5 74 N.C. 51 A7 59 A1 67 O6 75 A11 52 A6 60 A0 68 O7 76 A9 53 A5 61 O1 69 O8 77 A8 54 A4 62 O2 70 CE 78 A13 55 A3 63 O3 71 A10 79 A14 56 N.C. 64 VSS 72 N.C. 80 VCC N.C.: Internally connected. Do not use. DS07-12536-6E 5 MB89940 Series PIN DESCRIPTION Pin no. QFP* 1 5 5 X0 6 6 X1 48 48 2 2 34 to 27 Circuit type Function A Pin for connecting the crystal resonator. X0 and X1 can be directly connected to a crystal oscillator. When the oscillation clock is provided to X0 externally, X1 should be left open. MODE B The mode input is used for entering the MCU into the test mode. In user applications, MODE is connected to VSS. RST C Applying a reset pulse to this pin forces the MCU to enter the initial state. RST is active low and drives low state when an internal reset occurs. Reset pulses of the duration less than the minimum pulse width may cause the MCU to enter undefined states. 34 to 27 P00/SEG00 to P07/SEG07 H These pins have two functions. Their functions can be switched between Port 0 and LCD segment signal outputs by setting the internal registers of the LCD controller. 26 to 20, 18 26 to 20, 18 P10/SEG08 to P17/SEG15 J These pins have two functions. Their functions can be switched between Port 1 and LCD segment signal outputs by setting the internal registers of the LCD controller. 17 17 P20/SEG16 I This pin can be used as the bit 0 of Port 2 or an LCD segment signal output by setting the internal register of the LCD controller. 16 16 P21/V0 F This pin is the bit 1 of Port 2. This pin can also be used for an external LCD bias voltage input. 15 15 P22/EC/V1 F This pin can be used as the bit 2 of Port 2 or the external clock input for the interval timer. This pin can also be used for an external LCD bias voltage input. 14 14 P23/TO/V2 F This pin can be used as the bit 3 of Port 2 or the output for the interval timer. Its function can be switched by setting the internal register of the interval timer. This pin can also be used for an external LCD bias voltage input. 13 13 P24/V3 F This pin can be used as the bit 4 of Port 2 or an external LCD bias voltage input. 12, 11, 10 12, 11, 10 P25/INT0 to P27/INT2 E These pins are used for Port 2. They can also be used for external interrupt inputs. 35 35 P30/FUELO D This pin can be used for the bit 0 of Port 3 or the output from PWM3. The function of this pin can be switched by setting the internal register of PWM3. *1: FPT-48P-M16 *2: MQP-48C-P01 6 Pin name MQFP*2 (Continued) DS07-12536-6E MB89940 Series (Continued) Pin no. 1 QFP* MQFP*2 37 37 Circuit type Function P31/TEMPO G This pin can be used for the bit 1 of Port 3 or the output from PWM4. The function of this pin can be switched by setting the internal register of PWM4. This output has a high drive-current capability. These pins are the pair of high-current driver outputs for one of two motor coils. They can be also used for the bits 2 and 3 of Port 3 by setting the internal register of the stepper motor controller. These pins are the pair of high-current driver outputs for one of two motor coils. They can be also used for the bits 4 and 5 of Port 3 by setting the internal register of the stepper motor controller. This analog input is connected to channel 1 of the A/D converter. It can also be used for the bit 6 of Port 3 when this A/D input enable register bit is set to `0'. This analog input is connected to channel 0 of the A/D converter. It can also be used for the bit 7 of Port 3 when this A/D input enable register bit is set to `0'. This pin has two functions. When this pin is used as an open-drain output of Port 4, the external voltage monitor reset should be in the power down mode. When it is used as the PW input of external voltage monitor reset, the corresponding bit of the port data register should be set to `1'. These pins are the LCD common signal outputs. When LCD is not used, these pins can be also used for Port 4. An external capacitor should be connected to this pin for stabilizing the internal 3.0 V power supply. For MB89PV940 and MB89P945, this pin should be left open. VCC VSS The power supply pin for the analog circuit The same voltage should be applied as VCC. The power supply pin for the analog circuit The same voltage should be applied as VSS. The dedicated power supply pin for the high-current driver output The same voltage should be applied as VCC. The dedicated power supply pin for the high-current driver output The same voltage should be applied as VSS. Pin name 38, 39 38, 39 P32/PWM1P, P33/PWM1M G 40, 41 40, 41 P34/PWM2P, P35/PWM2M G 44 44 P36/TEMPI M 45 45 P37/FUELI M 46 46 P40/PW L 3, 4, 8, 9 3, 4, 8, 9 P41/COM0 to P44/COM3 K 47 47 VINT -- 7 19 1 7 19 1 VCC VSS AVCC -- -- -- 43 43 AVSS -- 36 36 DVCC -- 42 42 DVSS -- *1: FPT-48P-M16 *2: MQP-48C-P01 DS07-12536-6E 7 MB89940 Series * External EPROM pins (MB89PV940 only) Pin no. 8 Pin name I/O Function 49 50 51 52 53 54 55 58 59 60 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O Address output pins 61 62 63 65 66 67 68 69 O1 O2 O3 O4 O5 O6 O7 O8 I Data input pins 70 CE O ROM chip enable pin Outputs "H" during standby. 71 A10 O Address output pin 73 OE O ROM output enable pin Outputs "L" at all times. 75 76 77 78 79 A11 A9 A8 A13 A14 O Address output pin 80 VCC O EPROM power supply pin 64 VSS O Power supply (GND) pin 56 57 72 74 N.C. -- Internally connected pins Be sure to leave them open. DS07-12536-6E MB89940 Series I/O CIRCUIT TYPE Type A Circuit Remarks * Oscillator I/O With feedback resistor of approx. 1 M. X1 X0 Standby control signal B * Schmitt-trigger input (Pull-down resistance only for MB89943, MB89945) R C R P-ch * Open-drain output with pull-up resistor (Approx. 50 k). * Schmitt-trigger input * Hysteresis input N-ch D * CMOS I/O P-ch N-ch E * CMOS I/O (Schmitt trigger) * Pull-up resistor optional R P-ch Mask Option N-ch (Continued) DS07-12536-6E 9 MB89940 Series Type Circuit Remarks F R P-ch Mask Option * CMOS I/O (Schmitt trigger) * External bias input * Pull-up resistor optional N-ch Standby control signal P-ch N-ch G * CMOS I/O (High output current) P-ch N-ch H P-ch * CMOS I/O * LCD controller/driver output N-ch Standby control signal P-ch N-ch P-ch N-ch I R P-ch * * * * CMOS I/O LCD controller/driver output Pull-up resistor optional Hysteresis input N-ch Standby control signal P-ch N-ch P-ch N-ch (Continued) 10 DS07-12536-6E MB89940 Series (Continued) Type Circuit J R P-ch Mask Option Remarks * CMOS I/O * LCD controller/driver output * Pull-up resistor optional (Except P11/SEG09, P10/SEG08) N-ch Standby control signal P-ch N-ch P-ch N-ch K N-ch * N-ch open-drain output * LCD controller/driver output P-ch N-ch P-ch N-ch L N-ch M P-ch * N-ch open-drain output * Analog input * CMOS I/O * Analog input N-ch Standby control signal DS07-12536-6E 11 MB89940 Series HANDLING DEVICES 1. Preventing Latchup Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins other than medium- and high-voltage pins or if higher than the voltage which shows on "1. Absolute Maximum Ratings" in section " Electrical Characteristics" is applied between VCC and VSS. When latchup occurs, power supply current increases rapidly and might thermally damage elements. When using, take great care not to exceed the absolute maximum ratings. Also, take care to prevent the analog power supply (AVCC and AVR) and analog input from exceeding the digital power supply (VCC) when the analog system power supply is turned on and off. 2. Treatment of Unused Input Pins Leaving unused input pins open could cause malfunctions. They should be connected to a pull-up or pull-down resistor. The VINT pin of MB89PV940 and MB89P945 is the only exception. 3. Treatment of Power Supply Pins on Microcontrollers with A/D Converter Connect to be AVCC = VCC and AVSS = VSS even if the A/D converter are not in use. 4. Treatment of N.C. Pins Be sure to leave (internally connected) N.C. pins open. 5. Power Supply Voltage Fluctuations Although VCC power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched. 6. Note to Noise in the External Reset Pin (RST) If the reset pulse applied to the external reset pin (RST) does not meet the specifications, it may cause malfunctions. Use caution so that the reset pulse less than the specifications will not be fed to the external reset pin (RST). 12 DS07-12536-6E MB89940 Series PROGRAMMING TO THE EPROM ON THE MB89P945 1. Programming MB89P945 Using the EPROM adapter (provided by Sun Hayato Co., Ltd.) and a standard EPROM programmer, user-defined data can be written into the OTPROM and option PROM. The EPROM programmer should be set to MB27C256A20TVM and electro-signature mode should not be used. When programming the data, the internal addresses are mapped as follows. 2. Memory Space Address Single chip 0000 H EPROM mode (Corresponding addresses on the EPROM programmer) 8000 H 0000 H 3FF0 H C000 H Option PROM 4000 H One Time PROM 16 KB One Time PROM 16 KB 7FFFH FFFFH 3. Screening MB89P945 It is recommended that high-temperature aging is performed on the MB89P945 prior to the assembly. Program, verify Aging +150 C, 48 h Data verification Assembly DS07-12536-6E 13 MB89940 Series 4. Setting PROM Options For MB89P945, mask options are described in the internal option PROM area. The table below shows the bit map of the option PROM. The option data can be written by a standard EPROM programmer. * PROM option bit map PROM Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 3FF0H Unused Unused Unused Reserved Reset output 1: Active 0: Inactive Power-on reset 1: Active 0: Inactive Oscillation stabilization time 11: 218 TOSC 10: 217 TOSC 01: 214 TOSC 3FF1H P17 Pull-up 1: Inactive 0: Active P16 Pull-up 1: Inactive 0: Active P15 Pull-up 1: Inactive 0: Active P14 Pull-up 1: Inactive 0: Active P13 Pull-up 1: Inactive 0: Active P12 Pull-up 1: Inactive 0: Active Unused Unused 3FF2H P27 Pull-up 1: Inactive 0: Active P26 Pull-up 1: Inactive 0: Active P25 Pull-up 1: Inactive 0: Active P24 Pull-up 1: Inactive 0: Active P23 Pull-up 1: Inactive 0: Active P22 Pull-up 1: Inactive 0: Active P21 Pull-up 1: Inactive 0: Active P20 Pull-up 1: Inactive 0: Active 3FF3H Unused Unused Unused Low volt. PDX bit Low volt. S1 bit Low volt. S0 bit Low volt. LVE bit Low volt. 1: Register active 0: Option active 3FF4H Unused Unused Unused Unused Unused Unused Unused Unused 3FF5H Unused Unused Unused Unused Unused Unused Unused Unused 3FF6H Unused Unused Unused Unused Unused Unused Unused Unused Notes: * Default values are all `1'. * TOSC: One oscillation clock cycle time * When the bit0 of "3FF3H" is "0", it activates the option setting for the Low Voltage Reset Control register. * When this option is activated, software setting in the register has no effect. 5. Programming Yield All bits cannot be programmed at Fujitsu shipping test to a blanked OTPROM microcomputer, due to its nature. For this reason, a programming yield of 100% cannot be assured at all times. 14 DS07-12536-6E MB89940 Series PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE 1. EPROM for Use MBM27C256A-20TVM 2. Memory Space The memory space of the piggyback EPROM is mapped onto the internal memory space as shown in the figure below. Address Single chip Corresponding addresses on the EPROM programmer 0000 H 8000 H 0000 H Piggy Back EPROM 32 KB FFFFH 7FFFH For EPROM devices suitable for MB89PV940, please contact sales representatives. 3. Programming to the EPROM (1) Set the EPROM programmer to the MBM27C256A-20TVM. (2) Load program data into the EPROM programmer at 0000H to 7FFFH. (3) Program to 0000H to 7FFFH with the EPROM programmer. DS07-12536-6E 15 MB89940 Series BLOCK DIAGRAM X0 X1 Interrupt controller Oscillator Clock controller Timebase timer Low supply voltage reset P10/SEG08 to P17/SEG15 P00/SEG00 to P07/SEG07 4 Port 0, 1 and 4 8 Internal bus P41/COM0 to P44/COM3 Port 4 External voltage monitor interrupt P40/PW 8 LCD controller driver 8-bit A/D converter P20/SEG16 P37/FUELI P36/TEMPI DVCC DVSS P21/V0 P22/EC/V1 P23/TO/V2 Interval timer P24/V3 P25/INT0 to P27/INT2 RST Reset circuit 3 MODE Stepper motor macro High-drive-current P32/PWM1P P33/PWM1M PWM1 P34/PWM2P PWM2 P35/PWM2M Port 2 RAM PWM3 F2MC-8L core CPU P30/FUELO High-drive-current PWM4 P31/TEMPO ROM Other pins Port 3 VCC, VSS AVCC, AVSS VINT 16 DS07-12536-6E MB89940 Series CPU CORE 1. Memory Space The MB89940 Series has a memory space of 64 Kbytes. All peripheral registers, RAM and ROM areas are mapped onto the 0000H to FFFFH range. The peripheral registers address below 007FH and the RAM addresses the range 0080H to 027FH (0080H to 047FH for MB89PV940). A part of this RAM area is also assigned as the general-purpose registers. The ROM addresses above E000H for MB89943, or C000H for MB89945. The OneTime PROM addresses the range above C000H. The external ROM for the piggy sample addresses the range above 8000H. The reset vector, interrupt vectors and vectors for vector-call instructions are stored in the highest addresses of the memory space. Memory Space MB89943 0000 H MB89945/P945 0000 H Peripheral registers 007F H 0100 H 0200 H 027F H Peripheral registers 007F H Generalpurpose registers 512 B MB89PV940 0000 H 0100 H RAM 0200 H 027F H Peripheral registers 007F H Generalpurpose registers 0100 H RAM 512 B Generalpurpose registers RAM 0200 H 1 KB 047F H 8000 H C000 H E000 H ROM 8 KB FFFFH DS07-12536-6E External ROM MB89945 : ROM MB89P945 : OTPROM 32 KB 16 KB FFFFH FFFFH 17 MB89940 Series 2. Registers The F2MC-8L family has two types of registers; dedicated registers in the CPU and general-purpose registers in the memory. The following dedicated registers are provided: Program counter (PC): A 16-bit register for indicating instruction storage positions Accumulator (A): A 16-bit temporary register for storing arithmetic operations, etc. When the instruction is an 8-bit data processing instruction, the lower byte is used. Temporary accumulator (T): A 16-bit register which performs arithmetic operations with the accumulator When the instruction is an 8-bit data processing instruction, the lower byte is used. Index register (IX): A 16-bit register for index modification Extra pointer (EP): A 16-bit pointer for indicating a memory address Stack pointer (SP): A 16-bit register for indicating a stack area Program status (PS): A 16-bit register for storing a register pointer, a condition code 16 bits Initial value PC FFFDH : Program counter A : Accumulator T : Temporary accumulator Indeterminate IX : Index register Indeterminate EP : Extra pointer Indeterminate SP : Stack pointer Indeterminate PS : Program status Indeterminate I-flag = 0, IL1, 0 = 11 The other bit values are indeterminate. The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for use as a condition code register (CCR). (See the diagram below.) Structure of the Program Status Register 15 PS 14 13 12 RP 10 9 8 Vacancy Vacancy Vacancy RP 18 11 7 6 H I 5 4 IL1, 0 3 2 1 0 N Z V C CCR DS07-12536-6E MB89940 Series The RP indicates the address of the register bank currently in use. The relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. Rule for Conversion of Actual Addresses of the General-purpose Register Area Lower OP codes RP "0" "0" "0" "0" "0" "0" "0" "1" R4 R3 R2 R1 R0 b2 b1 b0 Generated addresses A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and bits for control of CPU operations at the time of an interrupt. H-flag:Set to `1' when a carry or a borrow from bit3 to bit4 occurs as a result of an arithmetic operation. Cleared otherwise. This flag is for decimal adjustment instructions. I-flag:Interrupt is enabled when this flag is set to `1'. Interrupt is disabled when the flag is cleared to `0'. Cleared to `0' at the reset. IL1, 0:Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is higher than the value indicated by this bit. IL1 IL0 Interrupt level 0 0 0 1 1 0 2 1 1 3 1 High-low High Low N-flag:Set to `1' if the MSB becomes `1' as the result of an arithmetic operation. Cleared to `0' otherwise. Z-flag:Set to `1' when an arithmetic operation results in 0. Cleared to `0' otherwise. V-flag:Set to `1' if the complement on `2' overflows as a result of an arithmetic operation. Cleared to `0' if the overflow does not occur. C-flag:Set to `1' when a carry or a borrow from bit7 occurs as a result of an arithmetic operation. Cleared to `0' otherwise. Set to `1' to the shift-out value in the case of a shift instruction. DS07-12536-6E 19 MB89940 Series The following general-purpose registers are provided: General-purpose registers: An 8-bit register for storing data The general-purpose registers are 8 bits and located in the register banks of the memory. One bank contains eight registers and up to a total of 32 banks can be used on the MB89940 series. The bank currently in use is indicated by the register bank pointer (RP). Register Bank Configuration This address = 0100H + 8 x (RP) R0 R1 R2 R3 R4 R5 R6 R7 32 banks Memory area 20 DS07-12536-6E MB89940 Series I/O MAP Address Read/write Register name 00H (R/W) PDR0 Port 0 data register 01H (W) PDD0 Port 0 data direction register 02H (R/W) PDR1 Port 1 data register 03H (W) PDD1 Port 1 data direction register 04H to 06H Register description Vacancy 07H (R/W) SCC System clock control register 08H (R/W) SMC Standby mode control register 09H (R/W) WDTC Watchdog timer control register 0AH (R/W) TBTC Timebase timer control register 0BH (R/W) LVRC Low voltage reset control 0CH (R/W) PDR2 Port 2 data register 0DH (W) PDD2 Port 2 data direction register 0EH (R/W) PDR3 Port 3 data register 0FH (W) PDD3 Port 3 data direction register 10H (R/W) PDR4 Port 4 data register 11H (R/W) ADE 12H to 17H Port 3 A/D input enable register Vacancy 18H (R/W) T2CR Timer 2 control register 19H (R/W) T1CR Timer 1 control register 1AH (R/W) T2DR Timer 2 data register 1BH (R/W) T1DR Timer 1 data register 1CH to 1FH Vacancy 20H (R/W) ADC1 A/D converter control register 1 21H (R/W) ADC2 A/D converter control register 2 22H (R/W) ADCD A/D converter data register 23H (R/W) CNTR PWM control register 24H (W) COMP1 25H PWM1 compare register Vacancy 26H (W) COMP2 PWM2 compare register 27H (R/W) SELR1 PWM1 select register 28H (R/W) SELR2 PWM2 select register 29H (R/W) CNTR3 PWM3 control register 2AH (W) COMP3 PWM3 compare register 2BH (R/W) CNTR4 PWM4 control register (Continued) DS07-12536-6E 21 MB89940 Series (Continued) Address Read/write Register name 2CH (W) COMP4 2DH (R/W) SELT Selector test register 2EH (R/W) PFC Power fail control register 2FH (R/W) EIR1 External interrupt control 1 register 30H (R/W) EIR2 External interrupt control 2 register 31H to 5FH 60H to 68H PWM4 compare register Vacancy (R/W) VRAM 69H to 71H Display data RAM Vacancy 72H (R/W) LCR1 LCD controller/driver 1register 73H (R/W) LCR2 LCD controller/driver 2 register 74H to 7BH Vacancy 7CH (W) ILR1 Interrupt level setting register 1 7DH (W) ILR2 Interrupt level setting register 2 7EH (W) ILR3 Interrupt level setting register 3 7FH 22 Register description Vacancy DS07-12536-6E MB89940 Series ELECTRICAL CHARACTERISTICS 1. Absolute Maximum Ratings (VSS = 0.0 V) Parameter Power supply voltage Input voltage Output voltage Symbol Rating Unit Remarks Min Max VCC VSS - 0.3 VSS + 6.5 V AVCC VSS - 0.3 VSS + 6.5 V Should not exceed VCC DVCC VSS - 0.3 VSS + 6.5 V Should not exceed VCC VI1 VSS - 0.3 VCC + 0.3 V Except P31 to P35 and P41 to P44 VI2 VSS - 0.3 DVCC + 0.3 V P31 to P35 VI3 VSS - 0.3 VSS + 6.5 V P41 to P44 MB89PV940/P945 VI4 VSS - 0.3 VCC + 0.3 V P41 to P44 MB89943/945 VO1 VSS - 0.3 VCC + 0.3 V Except P31 to P35 and P41 to P44 VO2 VSS - 0.3 DVCC + 0.3 V P31 to P35 VO3 VSS - 0.3 VSS + 6.5 V P41 to P44 MB89PV940/P945 VO4 VSS - 0.3 VCC + 0.3 V P41 to P44 MB89943/945 -- 20 mA Except P31 to P35 -- 50 mA P31 to P35 -- 4 mA Except P31 to P35 -- 40 mA P31 to P35 -- 100 mA Except P31 to P35 -- 200 mA P31 to P35 -- 40 mA Except P31 to P35 -- 100 mA P31 to P35 -- -20 mA Except P31 to P35 -- -50 mA P31 to P35 -- -4 mA Except P31 to P35 -- -40 mA P31 to P35 -- -50 mA Except P31 to P35 -- -200 mA P31 to P35 -- -20 mA Except P31 to P35 P31 to P35 "L" level maximum output current IOL "L" level average output current IOLAV "L" level total maximum output current IOL "L" level total average output current IOLAV "H" level maximum output current IOH "H" level average output current IOHAV "H" level total maximum output current IOH "H" level total average output current IOHAV -- -100 mA Power consumption PD -- 300 mW Operating temperature TA -40 +85 C Storage temperature Tstg -55 +150 C WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings. DS07-12536-6E 23 MB89940 Series 2. Recommended Operating Conditions (AVCC = VCC = DVCC = 5.0 V, VSS = AVSS = DVSS = 0.0 V) Symbol Parameter Value Min Typ Max Unit Operating supply voltage range VCC AVCC DVCC 3.5 -- 5.5 V RAM data retention supply voltage range VCC AVCC DVCC 3.0 -- 5.5 V Smoothing capacitor CVINT 0.1 -- 1.0 F Operating temperature range TA -40 -- +85 C Remarks MB89943/MB89945 only* *: Use either a ceramic capacitor or a capacitor with similar frequency characteristics. The bypass capacitor of VCC pin should be greater than CVINT. WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their representatives beforehand. Figure1 VINT Pin Connection Diagram VINT CVINT 24 DS07-12536-6E MB89940 Series Figure2 Operating voltage - Operating frequency 6 Operating Voltage (V) 5.5 5 Operation assurance range 4 3.5 3 2 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 Oparating frequency (MHz) (At instruction cycle = 4/FCH) 4.0 2.0 0.8 0.5 0.4 Minimum execution time (Instruction cycle) (s) DS07-12536-6E 25 MB89940 Series 3. DC Characteristics (AVCC = VCC = DVCC = 5.0 V, VSS = AVSS = DVSS = 0.0 V) Parameter "H" level input voltage "L" level input voltage Open-drain output pin application voltage Pin name Condition VIH P00 to P07, P10 to P17, P30 to P37, P40 to P47 VIHS Symbol Value Unit Min Typ Max -- 0.7 VCC -- VCC + 0.3 V RST, MODE, P20 to P27 -- 0.8 VCC -- VCC + 0.3 V VIL P00 to P07, P10 to P17, P30 to P37, P40 to P47 -- VSS - 0.3 -- 0.3 VCC V VILS RST, MODE, P20 to P27 -- VSS - 0.3 -- 0.2 VCC V Remarks VD P40 -- VSS - 0.3 -- VCC + 0.3 V VD2 P41 to P44 -- VSS - 0.3 -- VSS + 5.5 V MB89PV940/ P945 VD3 P41 to P44 -- VSS - 0.3 -- VCC + 0.3 V MB89943/ 945 4.0 -- -- V VCC - 0.5 -- -- V VOH P10 to P17, P20 to P27, IOH = -2.0 mA P30, P36, P37 VOH2 P31 to P35 VOL P10 to P17, P20 to P27, P30, P36, P37, P40 to IOL = 4.0 mA P44 -- -- 0.4 V VOL2 P31 to P35 IOL = 30 mA, VSS = DVSS -- -- 0.5 V IIL1 0.0 V< VI < MODE, P10 to P17, P20 to P27, P30 to P37, VCC, P40 to P44 VCC = DVCC -5 -- +5 A Without pull-up option Pull-up resistance RPULL RST, P12 to P17, P20 to P27 -- 25 50 100 k With pull-up option LCD internal bias voltage resister RLCD V0-V1, V1-V2, V2-V3 -- 50 100 200 k "H" level output voltage "L" level output voltage Input leakage current IOH = -30, VCC = DVCC (Continued) 26 DS07-12536-6E MB89940 Series (Continued) (AVCC = VCC = DVCC = 5.0 V, VSS = AVSS = DVSS = 0.0 V) Parameter Pin name Symbol ICCS VCC ICCH Input capacitance CIN -- Value Unit Remarks Min Typ Max -- 12 20 mA MB89PV940 -- 12 20 MB89943, mA MB89945, MB89P945 FC = 8 MHz, tinst* = 0.5 s, ICCS = I(VCC) + I(DVCC) in Sleep mode -- 3 7 mA In Stop mode, TA = 25C, ICCH = I(VCC) + I(DVCC) -- 5 10 A f = 1 MHz -- 10 -- pF FC = 8 MHz, tinst* = 0.5 s, ICC = I(VCC) + I(DVCC) ICC Power supply current Condition *: For information on tinst, see "(4) Instruction Cycle" in "4. AC Characteristics". DS07-12536-6E 27 MB89940 Series " 4. AC Characteristics (1) Reset Timing (AVSS = VSS = DVSS, TA = -40C to +85C) Symbol Parameter RST "L" pulse width Value Condition tZLZH -- Min Max 48 tHCYL -- Unit Remarks ns tHCYL: One oscillation clock cycle time tZLZH RST 0.8 VCC 0.2 VCC Notes: * If power-on reset option is not activated, the external reset signal must be kept asserted until the oscillation is stabilized. * If the reset pulse applied to the external reset pin (RST) does not meet the specifications, it may cause malfunctions. Use caution so that the reset pulse less than the specifications will not be fed to the external reset pin (RST). (2) Power-on Profile (AVSS = VSS = DVSS, TA = -40C to +85C) Parameter Power supply voltage rising time Power-off minimum period Symbol Condition Value Unit Max -- 50 ms MB89PV940, MB89P945 -- 219 tHCYL ns MB89943, MB89945 1 -- ms -- tR tOFF Remarks Min -- tHCYL: One oscillation clock cycle time Note: Power supply voltage should reach the minimum operation voltage within the specified default duration of the oscillation stabilization time. tR tOFF 3.5 V VCC 28 0.2 V 0.2 V 0.2 V DS07-12536-6E MB89940 Series (3) Clock Timing (AVSS = VSS = DVSS, TA = -40C to +85C) Symbol Parameter Value Condition Min Max Unit Clock frequency FC 1 8 MHz Clock cycle time tCYC 125 1000 ns Input clock pulse width tWH tWL 20 -- ns Input clock rising/falling time tCR tCF -- 10 ns -- Remarks X0 and X1 Timing and Conditions tCYC tWL tWL tCR tCF 0.8 VCC 0.8 VCC X0 0.2 VCC 0.2 VCC 0.2 VCC Clock Conditions When a crystal or ceramic resonator is used X0 X1 When an external clock is used X0 X1 Open (4) Instruction Cycle Parameter Symbol Instruction cycle tinst (minimum execution time) Value (typical) Unit 4/FC, 8/FC, 16/FC, 64/FC s Remarks (4/FC) tinst = 0.5 s when operating at FC = 8 MHz Note : When operating at 8 MHz, the cycle varies with the set execution time. DS07-12536-6E 29 MB89940 Series (5) Peripheral Input Timing (AVSS = VSS= DVSS, TA = -40C to +85C) Parameter Symbol Pin name Value Min Max Unit Peripheral input "H" pulse width tWH INT0, INT1, INT2, EC 2 tinst* -- s Peripheral input "L" pulse width tWL INT0, INT1, INT2, EC 2 tinst* -- s Remarks *: For information on tinst, see "(4) Instruction Cycle". tWL 0.8 VCC INT0, INT1, INT2, EC 30 tWL 0.8 VCC 0.2 VCC 0.2 VCC DS07-12536-6E MB89940 Series 5. A/D Converter Electrical Characteristics (AVSS = VSS = DVSS, TA = -40C to +85C) Parameter Symbol Pin name Condition Value Min Typ Max Unit Remarks Resolution -- -- 8 bit Total error -- -- 1.5 LSB -- -- 1.0 LSB -- -- 0.9 LSB AVSS - 1.0 LSB AVSS + 0.5 LSB AVSS + 2.0 LSB V MB89PV940/ MB89P945 AVSS - 1.0 LSB AVSS + 1.0 LSB AVSS + 2.0 LSB V MB89943/ MB89945 AVCC - 3.0 LSB AVCC - 1.5 LSB AVCC V MB89943/ MB89945/ MB89PV940/ MB89P945 -- -- 0.5 LSB -- -- 44 tinst* s MB89PV940/ MB89P945 -- -- 52 tinst* s MB89943/ MB89945 FC = 8 MHz, IA = I(AVCC) A/D in operation -- 6 8 mA FC = 8 MHz, IAH = I(AVCC) A/D stopped -- 5 10 A -- -- 10 A 0 -- AVCC V -- Nonlinearity error Differential linearity error Zero transition voltage VOT -- -- Full-scale transition VFST voltage Interchannel disparity -- A/D mode conversion time AVCC IA Power supply current IAH Analog input current Analog input voltage range IAIN -- -- -- *: For information on tinst, see "(4) Instruction Cycle" in "4. AC Characteristics". DS07-12536-6E 31 MB89940 Series 6. A/D Converter Glossary * Resolution Analog changes that are identifiable with the A/D converter When the number of bits is 8, analog voltage can be divided into 28 = 256. * Linearity error (unit: LSB) The deviation of the straight line connecting the zero transition point ("0000 0000" "0000 0001") with the full-scale transition point ("1111 1111" "1111 1110") from actual conversion characteristics * Differential linearity error (unit: LSB) The deviation of input voltage needed to change the output code by 1 LSB from the theoretical value * Total error (unit: LSB) The difference between theoretical and actual conversion values Digital output 1111 1111 1111 * 1110 0000 0000 0000 * * * * * * * * * * * * * * * * * * * Theoretical conversion value Actual conversion value (1 LSB x N + VOT) AVCC - AVSS 256 Linearity error = Linearity error Differential linearity error = Total error = VNT (1 LSB x N + VOT) 1 LSB V( N + 1 ) T VNT 1 1 LSB VNT (1 LSB x N + 1 LSB) 1 LSB 0010 0001 0000 VOT 32 1 LSB = VNT V(N + 1)T VFST Analog input DS07-12536-6E MB89940 Series 7. Notes on Using A/D Converter * Input impedance of the analog input pins The A/D converter used for the MB89940 series contains a sample & hold circuit as illustrated below to fetch analog input voltage into the sample hold capacitor for eight instruction cycles after activating A/D conversion. For this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output impedance of the external circuit low (below 10 k). Note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of about 0.1 F for the analog input pin. Analog Input Equivalent Circuit Analog input pin Sample & hold circuit . C =. 33 pF Comparator If the analog input impedance is higher than 10 k, it is recommended to connect an external capacitor of approx. 0.1 F. . R =. 6 k Close for 8 instruction cycles after activating A/D conversion. Analog channel selector * Error The smaller the | AVCC - AVSS |, the greater the error would become relatively. DS07-12536-6E 33 MB89940 Series 8. Low Supply Voltage Reset Electrical Characteristics Parameter Reset voltage Hysteresis of reset voltage Delay time to reset Supply voltage slew rate Symbol Value Unit Min Max VDL1 3.0 3.6 V VDL2 3.3 3.9 V VDL3 3.7 4.3 V VHYS 0.1 -- V tD -- 2.0 s dV/dt -- 0.1 V/s Remarks When the voltage is dropping. When the voltage is recovering. 9. External Voltage Monitor Interrupt Electrical Characteristics Parameter Reference voltage Delay time to interrupt Input slew rate 34 Symbol Value Unit Min Max VREF 1.18 1.38 V TD -- 2.0 s dV/dt -- 0.1 V/s Remarks DS07-12536-6E MB89940 Series MASK OPTIONS No. Part number MB89943/MB89945 MB89P945 MB89PV940 Specifying procedure Specify when ordering masking Set with EPROM Programmer Setting not possible Can be set per pin Fixed to without pull-up resistor 1 Pull-up resistors P12 to P17, P20 to P27 Selectable per pin (P20 and P12 to P17 must be set to without pull-up resistor when they are used as LCD outputs.) 2 Power-on reset With power-on reset Without power-on reset Fixed to with power-on reset Setting possible Fixed to with power-on reset 3 Main clock oscillation stabilization time selection (when operating at 8 MHz) Approx. 218/FC (Approx. 32.8 ms) Approx. 217/FC (Approx. 16.4 ms) Approx. 214/FC (Approx. 2.0 ms) Selectable Setting possible Fixed to approx. 218/FC (Approx. 32.8 ms) 4 Reset pin output With reset output Without reset output Fixed to with reset output Setting possible Fixed to with reset output ORDERING INFORMATION Part number MB89943PF MB89945PF MB89P945PF MB89PV940CF DS07-12536-6E Package Remarks 48-pin Plastic QFP (FPT-48P-M16) 48-pin Ceramic MQFP (MQP-48C-P01) 35 MB89940 Series PACKAGE DIMENSION 48-pin plastic QFP Lead pitch 0.80 mm Package width x package length 12 x 12 mm Lead shape Gullwing Sealing method Plastic mold Mounting height 2.70 mm MAX Code (Reference) P-QFP48-12x12-0.80 (FPT-48P-M16) 48-pin plastic QFP (FPT-48P-M16) Note 1) * : These dimensions do not include resin protrusion. Note 2) Pins width and pins thickness include plating thickness. Note 3) Pins width do not include tie bar cutting remainder. 17.200.40(.677.016)SQ * 12.000.10(.472.004)SQ 36 0.170.06 (.007.002) 25 Details of "A" part +0.30 24 37 2.40 -0.20 +.012 .094 -.008 (Mouting height) 0.15(.006) 0~8 INDEX 13 48 1.800.30 (.071.012) "A" 1 0.80(.031) C +0.10 0.25 -0.20 +.004 .010 -.008 (Stand off) 12 0.320.05 (.013.002) 0.20(.008) M 2003-2008 FUJITSU MICROELECTRONICS LIMITED F48026S-c-3-5 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/package/en-search/ (Continued) 36 DS07-12536-6E MB89940 Series (Continued) 48-pin ceramic MQFP Lead pitch 0.8 mm Lead shape Straight Motherboard material Ceramic Mounted package material Plastic (MQP-48C-P01) 48-pin ceramic MQFP (MQP-48C-P01) 17.20(.677)TYP PIN No.1 INDEX 15.000.25 (.591.010) 14.820.35 (.583.014) 1.50(.059)TYP 8.80(.346)REF 1.00(.040)TYP 0.800.22 (.0315.0087) PIN No.1 INDEX 1.020.13 (.040.005) +0.13 7.14(.281) 8.71(.343) TYP TYP 10.92 -0.0 +.005 .430 -0 PAD No.1 INDEX 0.30(.012)TYP +0.45 4.50(.177)TYP 1.10 -0.25 +.018 .043 -.010 0.400.08 (.016.003) 0.60(.024)TYP 8.50(.335)MAX 0.150.05 (.006.002) C 1994-2008 FUJITSU MICROELECTRONICS LIMITED M48001SC-4-3 Dimensions in mm (inches). Note: The values in parentheses are reference values. Please confirm the latest Package dimension by following URL. http://edevice.fujitsu.com/package/en-search/ DS07-12536-6E 37 MB89940 Series MAIN CHANGES IN THIS EDITION Page Section Change Results 13 PROGRAMMING TO THE EPROM ON THE MB89P945 15 PROGRAMMING TO THE EPROM WITH Deleted the "2. Programming Socket Adapter" PIGGYBACK/EVALUATION DEVICE Deleted the "3. EPROM Programmer Socket Adapter" The vertical lines marked in the left side of the page show the changes. 38 DS07-12536-6E MB89940 Series MEMO DS07-12536-6E 39 MB89940 Series FUJITSU MICROELECTRONICS LIMITED Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome, Shinjuku-ku, Tokyo 163-0722, Japan Tel: +81-3-5322-3347 Fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ For further information please contact: North and South America FUJITSU MICROELECTRONICS AMERICA, INC. 1250 E. Arques Avenue, M/S 333 Sunnyvale, CA 94085-5401, U.S.A. Tel: +1-408-737-5600 Fax: +1-408-737-5999 http://www.fma.fujitsu.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE. LTD. 151 Lorong Chuan, #05-08 New Tech Park 556741 Singapore Tel : +65-6281-0770 Fax : +65-6281-0220 http://www.fmal.fujitsu.com/ Europe FUJITSU MICROELECTRONICS EUROPE GmbH Pittlerstrasse 47, 63225 Langen, Germany Tel: +49-6103-690-0 Fax: +49-6103-690-122 http://emea.fujitsu.com/microelectronics/ FUJITSU MICROELECTRONICS SHANGHAI CO., LTD. Rm. 3102, Bund Center, No.222 Yan An Road (E), Shanghai 200002, China Tel : +86-21-6146-3688 Fax : +86-21-6335-1605 http://cn.fujitsu.com/fmc/ Korea FUJITSU MICROELECTRONICS KOREA LTD. 206 Kosmo Tower Building, 1002 Daechi-Dong, Gangnam-Gu, Seoul 135-280, Republic of Korea Tel: +82-2-3484-7100 Fax: +82-2-3484-7111 http://kr.fujitsu.com/fmk/ FUJITSU MICROELECTRONICS PACIFIC ASIA LTD. 10/F., World Commerce Centre, 11 Canton Road, Tsimshatsui, Kowloon, Hong Kong Tel : +852-2377-0226 Fax : +852-2376-3269 http://cn.fujitsu.com/fmc/en/ Specifications are subject to change without notice. For further information please contact each office. All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with sales representatives before ordering. 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