MB89943PF - Fujitsu Limited

FUJITSU MICROELECTRONICS

DATA SHEET

2008.10

For the information for microcontroller supports, see the following web site.

http://edevice.fujitsu.com/micom/en-support/

8-bit Proprietary Microcontroller

CMOS

F2MC-8L MB89940 Series

MB89943/945/P945/PV940

■DESCRIPTION

The MB89940 series is specially designed f or automotiv e instrumentation ap plications. It f eat ures a combination

of two PWM pulse generators and f our high-drive-current outputs for controlling a stepping motor . It also contains

two analog inputs, two PWM pulse generators and 10-digit LCD controller/driver for various sensor/indicator

devices. The MB89940 series is manufactured with high performance CMOS technologies and packaged in a

48-pin QFP.

■FEATURES

• 8-bit core CPU: 4 MHz system clock (8 MHz external, 500 ns instruction cycle)

• 21-bit timebase timer

• Watchdog timer

• Cloc k generator/controller

• 16-bit interval timer

• Two PWM pulse generators with four high-drive-current outputs

• Two-channel 8-bit A/D converter

• Three external interrupt

• Low supply voltage reset

• External voltage moni tor interrupt

• Two more PWM pulse generators for controlling indicator devices

• 4-common 17-segment LCD driver/ controller

• Package: 48-pin plastic QFP, 48-pin ceramic MQFP

• 5.0 V single power supply (VPP required for MB89P945)

• On-chip voltage regulator for internal 3.0 V power supply (MB89943, MB89 945)

DS07-12536-6E

MB89940 Series

2DS07-12536-6E

■PRODUCT LINEUP

*1: Execution times and clock cycle times are dependent on the use of MCU.

*2: V a ries with conditions such as th e operating freq uency. (See section “■ Electrical Characteristics”.) In the case

of the MB89PV940, the voltage varies with the restrictions of the EPROM for use.

Part number MB89943 MB89945 MB89P945 MB89PV940

Item

Classification Mass-produced products

(mask ROM products) One-time PROM Piggyback

ROM size 8 K × 8 bits

(internal mask ROM) 16 K × 8 bits

(internal ROM) 32 K × 8 bits

(external on piggyback)

RAM size 512 × 8 bits 1 K × 8 bits

CPU functions The number of instructions: 136

Instruction cycle: 0.5 µs*1@8 MHz

Interrupt response time: 4.0 µs*1@8 MHz

Multiply instruction time: 19 instruction cycles

Divide instruction time: 21 instruction cycles

Direct addressing memory-to/from-register data transfer:

7 instruction cycles

Ports Output: 5-bit N-ch open-drain

Input/Outpu t: Two 8-bit CMOS schmitt I/Os and 8-bit CMO S I/Os

Timebase timer 21 bits

Interrupt interval: 1 ms, 4.1 ms, 32.8 ms or 524.3 ms

8-bit/16-bit interv al

timer Can be used as two 8-bit timers or one 16-bit timer

Operation clock: 1 µs, 16 µs, 256 µs or external input *1

Watchdog timer Reset interval: Approx. 524 ms to 1049 ms

Stepping motor

controller Two 8-bit PWM pulse generators

Synchronized 4-channel high current output

Operation clock: 250 ns, 500 ns, 1 µs or 4 µs*1

8-bit PWM timers Two 8-bit PWM timers

External interrupt 3 channels, selective positive edge or negative edge tr igger

A/D converter 8-bit resolution, two-channel input

A/D conversion time : (MB89943/945 : 26 µs*1/8 MHz oscillation,

MB89P945/MB89PV940 : 22 µs*1/8MHz oscillation)

LCD controller &

driver 4-common and 17-segment outputs

Number of outputs programmable

Low supply voltage

reset Autonomous reset when low supply voltage

Reset voltage: 3.3 V, 3.6 V, 4.0 V

External voltage

monitor interrupt Interrupts wh en voltage at external pin is lower than the reference voltage

Standby modes Stop mode and sleep mode

Operating

voltage*23.5 V to 5.5 V

Process CMOS

External EPROM MBM27C256A-20TVM

MB89940 Series

DS07-12536-6E 3

■PACKAGE AND CORRESPONDING PRODUCTS

: Available ×: Not available

Note: For more information about each package, see section “■ Package Dimensions”.

■DIFFERENCES AMONG PRODUCTS

1. Memory Size

Prior to evaluating/developing the software for the MB89940 series, please check the differences between the

product types.

• RAM/ROM configurations are dependent on the product type.

• If the bottom address of the stack is set to the upper limit of the RAM address, it should be relocated when

changing the product type.

2. Power Dissipation

• For the piggyb ack product, add the po wer dissipation of the EPROM on the piggyback.

• The power dissipation differs between the product types.

3. Technology

The mask R OM p roduct is fabricated with a 0. 5 µm CMO S techn olo gy whereas the othe r produ ct s with 0. 8 µm

CMOS technology.

Also the mask R OM product contains the on -chip voltag e regulator f or the internal 3.0 pow er supply. For de tails,

refer.

4. Mask Option

Functions that can be selected as options and how to designate these options vary by the product.

Before using options check section “■ Mask Options”.

• No options are available for the piggyback product.

• The power-on reset and reset output options are always activated with the mask ROM product.

• Pull-up option must not be specified with the pins used as LCD outputs.

Package MB89943

MB89945

MB89P945 MB89PV940

FPT-48P-M16 ×

MQP-48C-P01 ×

MB89940 Series

4DS07-12536-6E

■PIN ASSIGNMENT

(Continued)

AVCC

RST

P41/COM0

P42/COM1

VCC

P43/COM2

P44/COM3

P27/INT2

P26/INT1

P25/INT0

DVCC

P30/FUELO

P00/SEG00

P01/SEG01

P02/SEG02

P03/SEG03

P04/SEG04

P05/SEG05

P06/SEG06

P07/SEG07

P10/SEG08

P11/SEG09

MODE

VINT

P40/PW

P37/FUELI

P36/TEMPI

AVSS

DVSS

P35/PWM2M

P34/PWM2P

P33/PWM1M

P32/PWM1P

P31/TEMPO

P24/V3

P23/TO/V2

P22/EC/V1

P21/V0

P20/SEG16

P17/SEG15

VSS

P16/SEG14

P15/SEG13

P14/SEG12

P13/SEG11

P12/SEG10

(Top view)

(FPT-48P-M16)

MB89940 Series

DS07-12536-6E 5

(Continued)

• Pin assignment on package top (MB89PV940 only)

N.C.: Internally connected. Do not use.

Pin no. Pin name Pin no. Pin name Pin no. Pin name Pin no. Pin name

49A1557N.C.65O473OE

50A1258A266O574N.C.

51 A7 59 A1 67 O6 75 A11

52 A6 60 A0 68 O7 76 A9

53 A5 61 O1 69 O8 77 A8

54 A4 62 O2 70 CE 78 A13

55 A3 63 O3 71 A10 79 A14

56 N.C. 64 VSS 72 N.C. 80 VCC

AVCC

RST

P41/COM0

P42/COM1

VCC

P43/COM2

P44/COM3

P27/INT2

P26/INT1

P25/INT0

DVCC

P30/FUELO

P00/SEG00

P01/SEG01

P02/SEG02

P03/SEG03

P04/SEG04

P05/SEG05

P06/SEG06

P07/SEG07

P10/SEG08

P11/SEG09

MODE

VINT

P40/PW

P37/FUELI

P36/TEMPI

AVSS

DVSS

P35/PWM2M

P34/PWM2P

P33/PWM1M

P32/PWM1P

P31/TEMPO

P24/V3

P23/TO/V2

P22/EC/V1

P21/V0

P20/SEG16

P17/SEG15

VSS

P16/SEG14

P15/SEG13

P14/SEG12

P13/SEG11

P12/SEG10

(Top view)

(MQP-48C-P01)

MB89940 Series

6DS07-12536-6E

■PIN DESCRIPTION

(Continued)

*1: FPT-48P-M16

*2: MQP-48C-P01

Pin no. Pin name Circuit

type Function

QFP*1MQFP*2

5 5 X0 A Pin for connecting the crystal resonator.

X0 and X1 can be directly connected to a crystal

oscillator.

When the oscillation clock is provided to X0

externally, X1 should be left open.

66X1

48 48 MODE B The mode input is used for entering the MCU into

the test mode.

In user applications, MODE is connected to VSS.

22RST C Applying a reset pulse to this pin forces the MCU to

enter the initial state. RST is active low and drives

low state when an internal reset occurs.

Reset pulses of the duration less than the minimum

pulse width may cause the MCU to enter undefined

states.

34 to 27 34 to 27 P00/SEG00 to

P07/SEG07 H These pins have two functions.

Their functions can be switched between Port 0 and

LCD segment signal outputs by setting the internal

registers of the LCD controller.

26 to 20,

18 26 to 20,

18 P10/SEG08 to

P17/SEG15 J These pins have two functions.

Their functions can be switched between Port 1 and

LCD segment signal outputs by setting the internal

registers of the LCD controller.

17 17 P20/SEG16 I This pin can be used as the bit 0 of Port 2 or an LCD

segment signal output b y setting the in ternal register

of the LCD controller.

16 16 P21/V0 F This pin is the bit 1 of Port 2.

This pin can also be used for an external LCD bias

v oltage input.

15 15 P22/EC/V1 F This pin can be used as the bit 2 of Port 2 or the

external clock input for the interval timer.

This pin can also be used for an external LCD bias

v oltage input.

14 14 P23/TO/V2 F This pin can be used as the bit 3 of Port 2 or the

output for the interval timer.

Its function can be switched by setting the internal

This pin can also be used for an external LCD bias

v oltage input.

13 13 P24/V3 F This pin can be used as the bit 4 of Port 2 or an

external LCD bias voltage input.

12, 11, 10 12, 11, 10 P25/INT0 to

P27/INT2 E These pins are used for Port 2.

They can also be used for external interrupt inputs.

35 35 P30/FUELO D This pin can be used for the bit 0 of Port 3 or the

output from PWM3.

The function of this pi n can be switched by setting

the internal register of PWM3.

MB89940 Series

DS07-12536-6E 7

(Continued)

*1: FPT-48P-M16

*2: MQP-48C-P01

Pin no. Pin name Circuit

type Function

QFP*1MQFP*2

37 37 P31/TEMPO G This pin can be used for the bit 1 of Port 3 or the

output from PWM4.

The function of this pi n can be switched by setting

the internal register of PWM4. This ou tput has a high

drive-current capability.

38,

39 38,

39 P32/PWM1P,

P33/PWM1M G These pins are the pair of high-current driver outp uts

fo r on e of two moto r coils.

They can be also used for the bits 2 and 3 of Port 3

by setting the internal register of the stepper motor

controller.

40,

41 40,

41 P34/PWM2P,

P35/PWM2M G These pins are the pair of high-current driver outp uts

fo r on e of two moto r coils.

They can be also used for the bits 4 and 5 of Port 3

by setting the internal register of the stepper motor

controller.

44 44 P36/TEMPI M This analog input is connected to chann el 1 of the

A/D converter.

It can also be used for the bit 6 of Port 3 when this

A/D input enable register bit is set to ‘0’.

45 45 P37/FUELI M This analog input is connected to channel 0 of the

A/D converter.

It can also be used for the bit 7 of Port 3 when this

A/D input enable register bit is set to ‘0’.

46 46 P40/PW L This pin has two functions.

When this pin is used as an open-drain output of

Port 4, the external voltage monitor reset should be

in the power down mode.

When it is used as the PW input of external voltage

monitor reset, the corresponding bit of the port data

3, 4,

8, 9 3, 4,

8, 9 P41/COM0 to

P44/COM3 K These pins are the LCD common signal outputs.

When LCD is not used, these pins can be also used

for Port 4.

47 47 VINT — An external capacitor should be connected to this

pin for stabilizing the internal 3.0 V powe r supply.

F o r MB89PV940 and MB89P945, this pin should be

left open.

77V

CC —VCC

19 19 VSS —VSS

11AVCC — The power supply pin for the analog circuit

The same voltage should be applied as VCC.

43 43 AVSS —The power supply pin for the analog circuit

The same voltage should be applied as VSS.

36 36 DVCC — The dedicated power supply pin for the high-current

driver output

The same voltage should be applied as VCC.

42 42 DVSS — The dedicated power supply pin for the high-current

driver output

The same voltage should be applied as VSS.

MB89940 Series

8DS07-12536-6E

• External EPROM pins (MB89PV940 only)

Pin no. Pin name I/O Function

A15

A12

O Address output pins

I Data input pins

70 CE O ROM chip enable pin

Outputs “H” during standby.

71 A10 O Address output pin

73 OE O ROM output enable pin

Outputs “L” at all times.

A11

A13

A14

O Address output pin

80 VCC O EPROM power supply pin

64 VSS O Power supply (GND) pin

N.C. — Internally connected pins

Be sure to leave them open.

MB89940 Series

DS07-12536-6E 9

■I/O CIRCUIT TYPE

(Continued)

Type Circuit Remarks

A • Oscillator I/O

With feedback resistor of approx. 1 MΩ.

B • Schmitt-trigger input

(Pull-down resistance only for MB89943, MB89945)

C • Open -d ra in ou tp ut with pu ll-u p resist or

(Approx. 50 kΩ).

• Schmitt-trigger input

• Hysteresis input

D • CMOS I/O

E • CMOS I/O (Schmitt trigger)

• Pull-up resistor optio nal

Standby control signal

P-ch

N-ch

P-ch

N-ch

P-ch

N-ch

Mask Option

MB89940 Series

10 DS07-12536-6E

(Continued)

Type Circuit Remarks

F • CMOS I/O (Schmitt trigger)

• External bias input

• Pull-up resistor optional

G • CMOS I/O (High output current)

H • CMOS I/O

• LCD contro lle r /d rive r ou tp ut

I • CMOS I/O

• LCD contro lle r /d rive r ou tp ut

• Pull-up resistor optional

• Hysteresis input

P-ch

N-ch

P-ch

N-ch

Mask Option

Standby

control

signal

P-ch

N-ch

P-ch

N-ch

P-ch

N-ch

P-ch

N-ch

Standby

control

signal

P-ch

N-ch

P-ch

N-ch

P-ch

N-ch

Standby

control

signal

MB89940 Series

DS07-12536-6E 11

(Continued)

Type Circuit Remarks

J • CMOS I/O

• LCD contro lle r /d rive r ou tp ut

• Pull-up resistor optional

(Except P11/SEG09, P10/SEG08)

K • N-ch open-drain output

• LCD contro lle r /d rive r ou tp ut

L • N-ch open-drain output

• Analog input

M • CMOS I/O

• Analog input

P-ch

N-ch

P-ch

N-ch

P-ch

N-ch

Mask Option

Standby

control

signal

N-ch

P-ch

N-ch

P-ch

N-ch

P-ch

N-ch

Standby

control

signal

MB89940 Series

12 DS07-12536-6E

■HANDLING DEVICES

1. Preventing Latchup

Latchup ma y occur on CMOS I Cs if v oltage higher than VCC or lo wer than VSS is applied t o input and output pins

other than medium- and high-voltage pins or if higher than the voltage which shows on “1. Absolute Maximum

Ratings” in section “■ Electrical Characteristics” is applied between VCC and VSS.

When latchup occurs, power supply current increases rapidly and might thermally damage elements. When

using, take great care not to exceed the absolute maximum ra tings.

Also , tak e ca re to pre v ent the analog po wer supp ly (AVCC and AVR) and analog input from exceeding the digita l

power supply (VCC) when the analog system power supply is turned on and off.

2. Treatment of Unused Input Pins

Lea ving unu sed input pin s open could cause malfunctions . Th ey should be conn ected to a pull- up or pull-do wn

resistor.

The VINT pin of MB89PV940 and MB89P945 is the only exception.

3. Treatment of Power Supply Pins on Microcontrollers with A/D Converter

Connect to be AVCC = VCC and AVSS = VSS even if the A/D converter are not in use.

4. Treatment of N.C. Pins

Be sure to leave (internally connected) N.C. pins open.

5. Power Supply Voltage Fluctuations

Although VCC power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage

could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore

impor tant. As stabilization guidelines, it is recommended to contro l power so that VCC ripple fluctuations (P-P

value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient

fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is s witched.

6. Note to Noise in the External Reset Pin (RST)

If the reset pulse applied to the external reset pin (RST) does not meet the specifications, it may cause

malfunctions. Use caution so that the reset pulse less than the specifications will not be f ed to the e xternal reset

pin (RST).

MB89940 Series

DS07-12536-6E 13

■PROGRAMMING TO THE EPROM ON THE MB89P945

1. Programming MB89P945

Using the EPROM adapter (provided by Sun Hayato Co., Ltd.) and a standard EPROM programmer, user-defined

data can be written into the OTPROM and option PROM. The EPROM programmer should be set to MB27C256A-

20TVM and electro-signature mode should not be used. When programming the data, the internal addresses

are mapped as follows.

2. Memory Space

3. Screening MB89P945

It is recommended that high-temperature aging is performed on the MB89P945 prior to the assembly.

One Time PROM

16 KB One Time PROM

16 KB

FFFFH

0000H

8000H

Single chipAddress

C000H

7FFFH

0000H

3FF0H

4000H

Option PROM

EPROM mode

(Corresponding addresses on the EPROM programmer)

Program, verify

Aging

+150 °C, 48 h

Data verification

Assembly

MB89940 Series

14 DS07-12536-6E

4. Setting PROM Options

For MB89P945, mask options are described in the internal option PROM area. The table below shows the bit

map of the option PROM. The option data can be written b y a standard EPROM programmer.

• PRO M option bit map

Notes: • Default values are all ‘1’.

• TOSC: One oscillation clock cycle time

• When the bit0 of “3FF3H” is “0”, it act ivates the option setting for the Lo w Voltage Reset Control re gister.

• When this option is act ivated, software setting in the register has no effect.

5. Programming Yield

All bits cannot be prog ramme d at Fujitsu shipping test to a bla nke d O TPR OM micr ocomputer, due to its nature .

F o r this reason, a programming yield of 100% cannot be assured at all times.

PROM

Address Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

3FF0HUnused Unused Unused Reserved Reset

output

1: Active

0: Inactive

Power-on

reset

1: Active

0: Inactive

Oscillation stabilization

time

11: 218 TOSC 10: 217 T OSC

01: 214 TOSC

3FF1HP17

Pull-up

1: Inactive

0: Active

P16

Pull-up

1: Inactive

0: Active

P15

Pull-up

1: Inactive

0: Active

P14

Pull-up

1: Inactive

0: Active

P13

Pull-up

1: Inactive

0: Active

P12

Pull-up

1: Inactive

0: Active

Unused Unused

3FF2HP27

Pull-up

1: Inactive

0: Active

P26

Pull-up

1: Inactive

0: Active

P25

Pull-up

1: Inactive

0: Active

P24

Pull-up

1: Inactive

0: Active

P23

Pull-up

1: Inactive

0: Active

P22

Pull-up

1: Inactive

0: Active

P21

Pull-up

1: Inactive

0: Active

P20

Pull-up

1: Inactive

0: Active

3FF3HUnused Unused Unused Low volt.

PDX bit Low volt.

S1 bit Low v olt.

S0 bit Low v olt.

LVE bit Low volt.

1: Register

active

0: Option

active

3FF4HUnused Unused Unused Unused Unused Unused Unused Unused

3FF5HUnused Unused Unused Unused Unused Unused Unused Unused

3FF6HUnused Unused Unused Unused Unused Unused Unused Unused

MB89940 Series

DS07-12536-6E 15

■PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE

1. EPROM for Use

MBM27C256A-20TVM

2. Memory Space

The memory space of the pigg yback EPR OM is mapped onto the internal memory space as shown in the figure

below.

For EPROM devices suitable for MB89PV940, please contact sales representatives.

3. Programming to the EPROM

(1) Set the EPROM programmer to t he MBM27C256A-20TVM.

(2) Load pr ogram data into the EPROM programmer at 000 0H to 7FFFH.

(3) Program to 0000H to 7FFFH with the EPROM programmer.

Piggy Back

FFFFH

0000H

8000H

Single chipAddress

7FFFH

0000H

Corresponding addresses on the EPROM programmer

EPROM

32 KB

MB89940 Series

16 DS07-12536-6E

■BLOCK DIAGRAM

P41/COM0 to

P44/COM3

F2MC-8L

core CPU

Interrupt

controller

Oscillator

External voltage

monitor interrupt

Stepper motor

macro

Port 3

8-bit A/D

converter

RST

P40/PW

P37/FUELI

P36/TEMPI

DVCC

DVSS

P30/FUELO

P31/TEMPO

P32/PWM1P

P33/PWM1M

P34/PWM2P

P35/PWM2M

Clock controller

Timebase timer

Reset circuit

Low supply

voltage reset

Internal bus

Port 0, 1 and 4

Port 2

RAM

ROM

PWM3

PWM4

PWM1

PWM2

Interval timer

LCD

controller driver

Port 4

High-drive-current

VCC, VSS

AVCC, AVSS

VINT

Other pins

P10/SEG08 to

P17/SEG15

P00/SEG00 to

P07/SEG07

P20/SEG16

P21/V0

P22/EC/V1

P23/TO/V2

P24/V3

MODE

P25/INT0 to

P27/INT2

MB89940 Series

DS07-12536-6E 17

■CPU CORE

1. Memory Space

The MB89940 Series has a memory space of 64 Kbytes. All peripheral registers, RAM and ROM areas are

mapped onto th e 0000H to FFFFH range. The peripher al registers address below 007FH and the RAM addresses

the range 0080H to 027FH (0080H to 047FH for MB89PV940). A par t of this RAM area is also assigned as the

general-purpose registers. The ROM addresses above E000H for MB89943, or C000H for MB89945. The One-

Time PROM addresses the range above C000H. The external ROM for the piggy sample addresses the range

abov e 8000H. The reset ve ctor , interrupt v ectors and v ectors f or v ector-call inst ructions are stored in the highest

addresses of the memor y space.

Memory Space

ROM

8 KB

512 B

16 KB

512 B

32 KB

1 KB

FFFFH

0000H

0100H

0200H

007FH

MB89943

E000H

RAM

General-

purpose

registers

Peripheral

registers

MB89945 : ROM

MB89P945 :

OTPROM

FFFFH

0000H

0200H

027FH027FH

0100H

007FH

MB89945/P945

C000H

RAM

General-

purpose

registers

Peripheral

registers

External

ROM

FFFFH

0000H

0200H

047FH

0100H

007FH

MB89PV940

8000H

RAM

General-

purpose

registers

Peripheral

registers

MB89940 Series

18 DS07-12536-6E

2. Registers

The F2MC-8L family has two types of registers; dedicated registers in the CPU and general-pur pose registers

in the memory. The following dedicated regist ers are provided:

Program counter (PC): A 16-bit register for indicating instruction storage positions

Accumulator (A): A 16-bit temporary register for storing arithmetic operations, etc. When the

instruction is an 8-bit data processing instruction, the lower byte is used.

Tempor ary accumulator (T): A 16-bit register which performs arithmetic operations with the accum ulator

When the instruction is an 8-bit data processing instruction, the lower byte is used.

Index register (IX): A 16-bit register for index modification

Extra pointer (EP): A 16-bit pointer for indicating a memory address

Stac k pointer (SP): A 16-bit register for indicating a stack area

Program status (PS): A 16-bit register for storing a regist er pointer, a condition code

The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for

use as a condition code register ( CCR). (See the diagram below.)

16 bits

: Program counter

: Accumulator

: Temporary accumulator

: Index register

: Extra pointer

: Stack pointer

: Program status

FFFDH

Indeterminate

I-flag = 0, IL1, 0 = 11

The other bit values are indeterminate.

Initial value

Structure of the Program Status Register

Vacancy

H I IL1, 0 N Z VC

RPPS

109876 321015 14 13 12 11

RP CCR

Vacancy Vacancy

MB89940 Series

DS07-12536-6E 19

The RP indicates the address of the register bank currently in use. The relationship between the pointer contents

and the actual address is based on the conversion rule illustrated below.

The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and

bits for control of CPU operations at the time of an interrupt.

H-flag:Set to ‘1’ when a carry or a borrow fr om bit3 to bit4 occurs as a result of an arithmetic operation. Cleared

otherwise. This flag is for decimal adjustment instructions.

I-flag:Interrupt is enab led when this flag is set to ‘1’. Interrupt is disabled when the flag is clear ed to ‘0’. Cleared

to ‘0’ at the reset.

IL1, 0:Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is

higher than the value indicated by this bit.

N-flag:Set to ‘1’ if the MSB becomes ‘1’ as the result of an arithmetic operation. Cleared to ‘0’ otherwise.

Z-flag:Set to ‘1’ when an arithmetic operation results in 0. Cleared to ‘0’ otherwise.

V-flag:Set to ‘1’ if the complement on ‘2’ overflows as a result of an arithmetic operation. Cleared to ‘0’ if the

overflow does not occur.

C-flag:Set to ‘1’ whe n a carry or a borrow from bit7 occurs as a result of an arithmetic operation. Cleared to

‘0’ otherwise. Set to ‘1’ to the shift-out value in the case of a shift instruction.

IL1 IL0 Interrupt level High-low

00 1High

Low

10 2

11 3

Rule for Conversion of Actual Addresses of the General-purpose Register Area

“0”

↓

A15

“0”

↓

A14

“0”

↓

A13

“0”

↓

A12

“0”

↓

A11

“0”

↓

A10

“0”

↓

“1”

↓

Generated addresses

Lower OP codes

MB89940 Series

20 DS07-12536-6E

The following general-purpose registers are provided:

General-purpose registers: An 8-bit re gister for storing data

The general-pur pose registers are 8 bits and located in the register banks of the memor y. One bank contains

eight registers and up to a total of 32 banks can be used on the MB89940 series. The bank currently in use is

indicated by the register bank pointer (RP).

This address = 0100H + 8 × (RP)

Memory area

32 banks

R 0

R 1

R 2

R 3

R 4

R 5

R 6

R 7

MB89940 Series

DS07-12536-6E 21

■ I/O MAP

(Continued)

Address Read/write Register name Register description

00H(R/W) PDR0 Port 0 data register

01H(W) PDD0 Port 0 data direction register

02H(R/W) PDR1 Port 1 data register

03H(W) PDD1 Port 1 data direction register

04H to 06HVacancy

07H(R/W) SCC System clock control register

08H(R/W) SMC Standby mode control register

09H(R/W) WDTC Watchdog timer contr ol register

0AH(R/W) TBTC Timebase timer control register

0BH(R/W) LVRC Low voltage reset control

0CH(R/W) PDR2 Port 2 data register

0DH(W) PDD2 P ort 2 data direction register

0EH(R/W) PDR3 Port 3 data register

0FH(W) PDD3 Port 3 data direction register

10H(R/W) PDR4 Port 4 data register

11H(R/W) ADE Port 3 A/D input enable register

12H to 17HVacancy

18H(R/W) T2CR Timer 2 control register

19H(R/W) T1CR Timer 1 control register

1AH(R/W) T2DR Timer 2 data register

1BH(R/W) T1DR Timer 1 data register

1CH to 1FHVacancy

20H(R/W) ADC1 A/D converter control register 1

21H(R/W) ADC2 A/D converter control register 2

22H(R/W) ADCD A/D converter data register

23H(R/W) CNTR PWM control register

24H(W) COMP1 PWM1 compare register

25HVacancy

26H(W) COMP2 PWM2 compare register

27H(R/W) SELR1 PWM1 select register

28H(R/W) SELR2 PWM2 select register

29H(R/W) CNTR3 PWM3 control register

2AH(W) COMP3 PWM3 compare register

2BH(R/W) CNTR4 PWM4 control register

MB89940 Series

22 DS07-12536-6E

(Continued)

Address Read/write Register name Register description

2CH(W) COMP4 PWM4 compare register

2DH(R/W) SELT Selector test register

2EH(R/W) PFC Power fail control register

2FH(R/W) EIR1 External interrupt control 1 register

30H(R/W) EIR2 External interrupt control 2 register

31H to 5FHVacancy

60H to 68H(R/W) VRAM Display data RAM

69H to 71HVacancy

72H(R/W) LCR1 LCD controller/driver 1register

73H(R/W) LCR2 LCD controller/driver 2 register

74H to 7BHVacancy

7CH(W) ILR1 Interrupt level setting register 1

7DH(W) ILR2 Interrupt level setting register 2

7EH(W) ILR3 Interr upt level setting register 3

7FHVacancy

MB89940 Series

DS07-12536-6E 23

■ELECTRICAL CHARACTERISTICS

1. Absolute Maximum Ratings (VSS = 0.0 V)

WARNING: Semiconductor devices can be permanently damaged by ap plication of stress (voltage, current,

temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.

Parameter Symbol Rating Unit Remarks

Min Max

Power supply voltage VCC VSS – 0.3 VSS + 6. 5 V

AVCC VSS – 0.3 VSS + 6.5 V Should not exceed VCC

DVCC VSS – 0.3 VSS + 6.5 V Should not exceed VCC

Input voltage

VI1 VSS – 0.3 VCC + 0.3 V Except P31 to P35 and P41 to P44

VI2 VSS – 0.3 DVCC + 0.3 V P31 to P35

VI3 VSS – 0.3 VSS + 6.5 V P41 to P44

MB89PV940/P945

VI4 VSS – 0.3 VCC + 0.3 V P41 to P44

MB89943/945

Output voltage

VO1 VSS – 0.3 VCC + 0.3 V Except P31 to P35 and P41 to P44

VO2 VSS – 0.3 DVCC + 0.3 V P31 to P35

VO3 VSS – 0.3 VSS + 6.5 V P41 to P44

MB89PV940/P945

VO4 VSS – 0.3 VCC + 0.3 V P41 to P44

MB89943/945

“L” level maximum output

current IOL — 20 mA Except P31 to P35

— 50 mA P31 to P35

“L” level average output

current IOLAV — 4 mA Except P31 to P35

— 40 mA P31 to P35

“L” level total maximum

output current Σ IOL — 100 mA Except P31 to P35

— 200 mA P31 to P35

“L” level total average

output current Σ IOLAV — 40 mA Except P31 to P35

— 100 mA P31 to P35

“H” le vel maximum output

current IOH — –20 mA Except P31 to P35

— –50 mA P31 to P35

“H” level avera ge output

current IOHAV — –4 mA Except P31 to P35

— –40 mA P31 to P35

“H” level total maximum

output current Σ IOH — –50 mA Except P31 to P35

— –200 mA P31 to P35

“H” level total average

output current Σ IOHAV — –20 mA Except P31 to P35

— –100 mA P31 to P35

Power consumption PD—300mW

Operating temperature TA–40 +85 °C

Storage temperature Tstg –55 +150 °C

MB89940 Series

24 DS07-12536-6E

2. Recommended Operating Conditions (AVCC = VCC = DVCC = 5.0 V, VSS = AVSS = DVSS = 0.0 V)

*: Use either a ceramic capacitor or a capacitor with similar frequency characteristics. The bypass capacitor of VCC

pin should be greater than CVINT.

WARNING: The recommended operating conditions are required in order to ensure the normal operation of

the semiconducto r device. All of the device's electrical characteristics are warranted when the

device is operated within these ranges.

Always use semiconductor devices within their recommended operating condition ranges.

Operation outside these ranges may adversely affect reliability and could result in device failure.

No warranty is made with respect to uses, operating conditions, or combinations not represented

on the data shee t. Users consider ing application outside th e listed cond itions are advised t o contact

their representatives beforehand.

Figure1 VINT Pin Connection Diagram

Parameter Symbol Value Unit Remarks

Min Typ Max

Operating supply voltage range VCC

AVCC

DVCC 3.5 — 5.5 V

RAM data retention supply v oltage r ange VCC

AVCC

DVCC 3.0 — 5.5 V

Smoothing capacitor CVINT 0.1 — 1.0 µFMB89943/MB89945

only*

Operating temperature range TA–40 — +85 °C

VINT

CVINT

MB89940 Series

DS07-12536-6E 25

Figure2 Operating voltage - Operating frequency

1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0

4.0 2.0 0.8 0.4

Oparating frequency

(MHz) (At instruction cycle = 4/FCH)

0.5

Operation assurance range

Operating Voltage (V)

3.5

5.5

Minimum execution time (Instruction cycle) (µs)

MB89940 Series

26 DS07-12536-6E

3. DC Characteristics (AVCC = VCC = DVCC = 5.0 V, VSS = AVSS = DVSS = 0.0 V)

(Continued)

Parameter Symbol Pin name Condition Value Unit Remarks

Min Typ Max

“H” level input

voltage

VIH P00 to P07, P10 to P17,

P30 to P37, P40 to P47 — 0.7 VCC —VCC +

0.3 V

VIHS RST, MODE, P20 to

P27 — 0.8 VCC —VCC +

0.3 V

“L” level input

voltage

VIL P00 to P07, P10 to P17,

P30 to P37, P40 to P47 —VSS −

0.3 — 0.3 VCC V

VILS RST, MODE, P20 to

P27 —VSS −

0.3 — 0.2 VCC V

Open-drain

output

pin application

voltage

VD—VSS −

0.3 —VCC +

0.3 V

VD2 —VSS −

0.3 —VSS +

5.5 VMB89PV940/

P945

VD3 —VSS −

0.3 —VCC +

0.3 VMB89943/

945

“H” level output

voltage

VOH P10 t o P17, P20 to P27,

P30, P36, P37 IOH = –2.0 mA 4.0 — — V

VOH2 P31 to P35 IOH = –30,

VCC = DVCC VCC −

0.5 ——V

“L” level output

voltage

VOL P10 t o P17, P20 to P27,

P30, P36, P37, P40 to

P44 IOL = 4.0 mA — — 0.4 V

VOL2 P31 to P35 IOL = 30 mA,

VSS = DVSS ——0.5V

Input leakage

current IIL1

MODE, P10 to P17,

P20 to P27, P30 to P37 ,

P40 to P44

0.0 V< VI <

VCC,

VCC = DVCC

–5 — +5 µAWithout

pull-up

option

Pull-up

resistance RPULL RST, P12 to P17,

P20 to P27 — 25 50 100 kΩWith

pull-up

option

LCD internal

bias voltage

resister RLCD V0-V1, V1-V2,

V2-V3 — 50 100 200 kΩ

P40

P41 to P44

MB89940 Series

DS07-12536-6E 27

(Continued) (AVCC = VCC = DVCC = 5.0 V, VSS = AVSS = DVSS = 0.0 V)

*: For information on tinst, see “(4) Instruction Cycle” in “4. AC Characteristics”.

Parameter Symbol Pin name Condition Value Unit Remarks

Min Typ Max

Power supply

current

ICC

VCC

FC = 8 MHz,

tinst* = 0.5 µs,

ICC = I(VCC)

+ I(DVCC)

12 20 mA MB89PV940

12 20 mA MB89943,

MB89945,

MB89P945

ICCS

FC = 8 MHz,

tinst* = 0.5 µs,

ICCS = I(VCC)

+ I(DVCC)

in Sleep mode

—3 7mA

ICCH

In Stop mode,

TA = 25°C,

ICCH = I(VCC)

+ I(DVCC)

—510µA

Input capacit ance CIN — f = 1 MHz — 10 — pF

—

MB89940 Series

28 DS07-12536-6E

”

4. AC Characteristics

(1) Reset Timing (AVSS = VSS = DVSS, TA = –40°C to +85°C)

tHCYL: One oscillation clock cycle time

Notes: • If power-on reset option is not activated, the external reset signal must be kept asserted until the oscillation

is stabilized.

• If the reset pulse applied to the external reset pin (RST) does not meet the specifications, it may cause

malfunctions. Use caution so that the reset pulse less than the specifications will not be fed to the e xternal

reset pin (RST).

(2) Power-on Profile (AVSS = VSS = DVSS, TA = –40°C to +85°C)

tHCYL: One oscillation clock cycle time

Note: P o wer supply v oltage should reach th e minimum operat ion volta ge within the specified def ault dur ation of the

oscillation stabilization time.

Parameter Symbol Condition Value Unit Remarks

Min Max

RST “L” pulse width tZLZH —48 tHCYL —ns

Parameter Symbol Condition Value Unit Remarks

Min Max

Powe r supply voltage rising time t R——50ms

MB89PV940,

MB89P945

—219 tHCYL ns MB89943,

MB89945

Power-off minimum period tOFF —1—ms

0.2 VCC

0.8 VCC

RST

tZLZH

0.2 V 0.2 V

3.5 V

0.2 V

VCC

tOFF

MB89940 Series

DS07-12536-6E 29

(3) Clock Timing (AVSS = VSS = DVSS, TA = –40°C to +85°C)

(4) Instructi on Cycle

Note : When operating at 8 MHz, the cycle varies with the set execution time.

Parameter Symbol Condition Value Unit Remarks

Min Max

Clock frequency FC

—

18MHz

Clock cycle time tCYC 125 1000 ns

Input clock pulse width tWH

tWL 20 — ns

Input clock rising/falling time tCR

tCF —10ns

Parameter Symbol Value (typical) Unit Remarks

Instruction cycle

(minimum execution time) tinst 4/FC, 8/FC, 16/FC, 64/FCµs(4/FC) tinst = 0.5 µs when operating at

FC = 8 MHz

0.2 VCC

X0 0.2 VCC

X0 X1

tCYC

When a crystal

ceramic resonator is used

X0 X1

When an external clock is used

Open

0.2 VCC

0.8 VCC 0.8 VCC

tCR tCF tWLtWL

X0 and X1 Timing and Conditions

Clock Conditions

MB89940 Series

30 DS07-12536-6E

(5) Peripheral Input Timing (AVSS = VSS= DVSS, TA = –40°C to +85°C)

*: For information on tinst, see “(4) Instruction Cycle”.

Parameter Symbol Pin name Value Unit Remarks

Min Max

Peripheral input “H” pulse width tWH INT0, INT1,

INT2, EC 2 tinst*—µs

Peripheral input “L” pulse width tWL INT0, INT1,

INT2, EC 2 tinst*—µs

INT0, INT1,

INT2, EC 0.2 VCC

0.2 VCC

0.8 VCC 0.8 VCC

tWLtWL

MB89940 Series

DS07-12536-6E 31

5. A/D Converter Electrical Characteristics (AVSS = VSS = DVSS, TA = –40°C to +85°C)

*: For information on tinst, see “(4) Instruction Cycle” in “4. AC Characteristics”.

Parameter Symbol Pin

name Condition Value Unit Remarks

Min Typ Max

Resolution

—

——

——8bit

Total error — — ±1.5 LSB

Nonlinearity error — — ±1.0 LSB

Differential linearity

error ——±0.9 LSB

Zero transition

voltage VOT

AVSS – 1.0

LSB AVSS + 0.5

LSB AVSS + 2.0

LSB VMB89PV940/

MB89P945

AVSS – 1.0

LSB AVSS + 1.0

LSB AVSS + 2.0

LSB VMB89943/

MB89945

Full-scale transition

voltage VFST AVCC – 3.0

LSB AVCC – 1.5

LSB AVCC VMB89943/

MB89945/

MB89PV940/

MB89P945

Interchannel

disparity

—

——0.5LSB

A/D mode

conversion time

——44 t

inst*µsMB89PV940/

MB89P945

——52 t

inst*µsMB89943/

MB89945

Power supply

current

IAAVCC

FC = 8 MHz,

IA = I(AVCC)

A/D in

operation

—68mA

IAH

—

FC = 8 MHz,

IAH = I(AVCC)

A/D stopped —510µA

Analog input

current IAIN ———10µA

Analog input

voltage range —0—AV

CC V

MB89940 Series

32 DS07-12536-6E

6. A/D Converter Glossary

• Resolution

Analog changes that are identifiable with the A/D converter

When the number of bits is 8, analog voltage can be divided into 28 = 256.

• Linearity error (unit: LSB)

The deviation of the straight line connecting the zero transition point (“0000 0000” ↔ “0000 0001”) with the

full-scale transition point (“1111 1111” ↔ “1111 1110”) from actual conversion characteristics

• Differential linearity error (unit: LSB)

The deviation of input voltage needed to change the output code by 1 LSB from the theoretical value

• Total error (unit: LSB)

The difference between theoretical and actual conversion values

VOT VNT V(N + 1)T VFST

Digital output

(1 LSB × N + VOT)

0000

0000 0000

0001

0010

1111

1111 1110

1111

1 LSB = AVCC - AVSS

256

Linearity error =

Differential linearity error =

Analog input

Actual conversion value

Theoretical conversion value

Total error =

VNT Ð (1 LSB × N + VOT)

1 LSB

V( N + 1 ) T Ð VNT

1 LSB Ð 1

1 LSB

VNT Ð (1 LSB × N + 1 LSB)

Linearity error

•

MB89940 Series

DS07-12536-6E 33

7. Notes on Using A/D Converter

• Input impedance of the ana log input pins

The A/D con verter used for th e MB89940 series contains a sample & hold circuit as illustrated below to fetch

analog input voltage into the sample hold capacitor f or eight instruction cycles af ter activatin g A/D conv ersion.

F or this reason, if the output impedance of the e xternal circuit f or the analog input is high, a nalog input voltage

might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output

impedance of the external circuit low (below 10 kΩ).

Note that if the impedance cannot be kept low, it is recommended to connect an exter nal capacitor of about

0.1 µF for the analog input pin.

•Error

The smaller the | AVCC – AVSS |, the greater the error would be co me rela tively.

Analog Input Equivalent Circuit

Sample & hold circuit

Analog channel selector

Close for 8 instruction cycles after activating

A/D conversion.

If the analog input

impedance is higher

than 10 kΩ, it is

recommended to

connect an external

capacitor of approx.

0.1 µF.

Analog input pin Comparator

R = 6 kΩ

C = 33 pF

MB89940 Series

34 DS07-12536-6E

8. Low Supply Voltage Reset Electrical Characteristics

9. External Voltage Monitor Interrupt Electrical Characteristics

Parameter Symbol Value Unit Remarks

Min Max

Reset v oltage

VDL1 3.0 3.6 V When the voltage is

dropping.

VDL2 3.3 3.9 V

VDL3 3.7 4.3 V

Hysteresis of reset voltage VHYS 0.1 — V When the voltage is

recovering.

Delay time to reset tD—2.0µs

Supply voltage slew rate dV/dt — 0.1 V/µs

Parameter Symbol Value Unit Remarks

Min Max

Reference voltage VREF 1.18 1.38 V

Delay time to interrupt TD—2.0µs

Input slew rate dV/dt — 0.1 V/µs

MB89940 Series

DS07-12536-6E 35

■MASK OPTIONS

■ORDERING IN FORMATION

No.

Part number MB89943/MB89945 MB89P945 MB89PV940

Specifying procedure Specify when

ordering

masking Set with EPROM

Programmer Setting not

possible

1Pull-up resistors

P12 to P17,

P20 to P27

Selectable per pin

(P20 and P12 to

P17 must be set to

without pull-up

resistor when they

are used as LCD

outputs.)

Can be set per pin Fixed to without

pull-up resistor

2Power-on reset

With power-on reset

Without power-on reset Fixed to with

power-on reset Setting possible Fixed to with

power-on reset

Main clock oscillation stabilization time

selection (when operating at 8 MHz)

Approx. 218/FC (Approx. 32.8 ms)

Approx. 217/FC (Approx. 16.4 ms)

Approx. 214/FC (Approx. 2.0 ms)

Selectable Setting possible Fixed to

approx. 218/FC

(Approx. 32.8 ms)

4Reset pin output

With reset output

Without reset outpu t Fixed to with reset

output Setting possible Fixed to with reset

output

Part number Package Remarks

MB89943PF

MB89945PF

MB89P945PF 48-pin Plastic QFP

(FPT-48P-M16)

MB89PV940CF 48-pin Ceramic MQFP

(MQP-48C-P01)

MB89940 Series

36 DS07-12536-6E

■PACKAGE DIMENSION

Please confirm the latest Package dimension by following URL.

http://edevice.fujitsu.com/package/en-search/ (Continued)

48-pin plastic QFP Lead pitch 0.80 mm

Package width ×

package length 12 × 12 mm

Lead shape Gullwing

Sealing method Plastic mold

Mounting height 2.70 mm MAX

Code

(Reference) P-QFP48-12×12-0.80

48-pin plastic QFP

(FPT-48P-M16)

2003-2008 FUJITSU MICROELECTRONICS LIMITED F48026S-c-3-5

0.20(.008)

0.15(.006)

INDEX

0.80(.031)

17.20±0.40(.677±.016)SQ

112

2536

0.32±0.05

(.013±.002)

0.17±0.06

(.007±.002)

1.80±0.30

(.071±.012)

–0.20

+0.10

0.25

.010

+.004

–.008

0~8°

2.40

+0.30

–0.20

.094

+.012

–.008

(Mouting height)

(Stand off)

Details of "A" part

"A"

12.00±0.10(.472±.004)SQ

Dimensions in mm (inc hes).

Note: The values in parentheses are reference values.

Note 1) * : These dimensions do not include resin protrusion.

Note 2) Pins width and pins thickness include plating thickness.

Note 3)Pins width do not include tie bar cutting remainder.

MB89940 Series

DS07-12536-6E 37

(Continued)

Please confirm the latest Package dimension by following URL.

http://edevice.fujitsu.com/package/en-search/

48-pin ceramic MQFP Lead pitch 0.8 mm

Lead shape Straight

Motherboard

materialCeramic

Mounted package

materialPlastic

48-pin ceramic MQFP

(MQP-48C-P01)

1994-2008 FUJITSU MICROELECTRONICS LIMITED M48001SC-4-3

14.82±0.35

(.583±.014)

15.00±0.25

(.591±.010)

17.20(.677)TYP

PIN No.1 INDEX

.430

–0

+.005

–0.0

+0.13

10.92

1.02±0.13

(.040±.005)

7.14(.281) 8.71(.343)

TYP

0.30(.012)TYP 4.50(.177)TYP

PAD No.1 INDEX

0.15±0.05

(.006±.002)

8.50(.335)MAX

0.60(.024)TYP1.10

+0.45

–0.25

+.018

–.010

.043

0.40±0.08

(.016±.003)

0.80±0.22

(.0315±.0087)

8.80(.346)REF

1.00(.040)TYP

1.50(.059)TYP

PIN No.1 INDEX

Dimensions in mm (inches).

Note: The values in parentheses are reference values.

MB89940 Series

38 DS07-12536-6E

■MAIN CHANGES IN THIS EDITION

The vertical lines marked in the left side of the page show the changes.

Page Section Change Results

13 ■ PROGRAMMING TO THE EPROM ON

THE MB89P945 Deleted the “3. EPROM Programmer Socket Adapter”

15 ■ PROGRAMMING TO THE EPROM WITH

PIGGYBACK/EVALUATION DEVICE Deleted the “2. Programming Socket Adapter”

MB89940 Series

DS07-12536-6E 39

MEMO

MB89940 Series

FUJITSU MICROELECTRONICS LIMITED

Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome,

Shinjuku-ku, Tokyo 163-0722, Ja pan

Tel: +81-3-5322-3347 Fax: +81-3-5322-3387

http://jp.fujitsu.com/fml/en/

F or further inf ormation please contact:

North and South America

FUJITSU MICROELECTRONICS AMERICA, INC.

1250 E. Arques Avenue, M/S 333

Sunnyvale, CA 94085-5401, U .S.A.

Tel: +1-408-737-5600 Fax: +1-408-737-5999

http://www.fma.fujitsu.com/

Europe

FUJITSU MICROELECTRONICS EUROPE GmbH

Pittlerstrasse 47, 63225 Langen, Germany

Tel: +49-6103-690-0 Fax: +49-6103-690-122

http://emea.fujitsu.com/microelectronics/

Korea

FUJITSU MICROELECTRONICS KOREA LTD.

206 Kosmo Tower Building, 1002 Daechi-Dong,

Gangnam-Gu, Seoul 135-280, Republic of Korea

Tel: +82-2-3484-7100 Fax: +82-2-3484-7111

http://kr.fujitsu.com/fmk/

Asia Pacific

FUJITSU MICROELECTRONICS ASIA PTE. LTD.

151 Lorong Chuan,

#05-08 New Tech Park 556741 Singapore

Tel : +65-6281-0770 Fax : +65-6281-0220

http://www.fmal.fujitsu.com/

FUJITSU MICROELECTR ONICS SHANGHAI CO., LTD.

Rm. 3102, Bund Center, No.222 Yan An Road (E),

Shanghai 200002, China

Tel : +86-21-6146-36 88 Fax : +86-21-6335-1605

http://cn.fujitsu.com/fmc/

FUJITSU MICROELECTRONI CS PACIFIC ASIA LTD.

10/F., World Commerce Centre, 11 Canton Road,

Tsimshatsui, Kowloon, Hong Kong

Tel : +852-2377-0226 Fax : +852-2376-3269

http://cn.fujitsu.com/fmc/en/

Specifications are subject to change without notice. For further information please contact each office.

The contents of this document are subject to change without notice.

Customers are advised to consult with sales representatives before ordering.

The informatio n, such as desc riptions of function and application circuit examples, in this document a re present ed solely for the purpose

of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS

does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating

the device based on such information, you must assume any responsibility arising out of such use of the information.

FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.

Any information in this document, including descriptions of functio n and schematic diagrams, shall not be construed as license of the use

or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS

or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual p roper ty right or

other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual

property rights or other rights of third parties which would result from the use of information contained herein.

The products described in this document are designed, developed and manufactured as contemplated for general use, including without

limitation, ordinary industrial use, general office use, personal use, and househo ld use, but are not designed, developed and manufactured

as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to

the public, and could lead directly to death, personal injury, severe p hysical damage or other loss (i.e., nuclear reaction control in nuclear

facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon

system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).

Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising

in connection with above-mentioned uses of the products.

Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by

incorporating safety design measures into your facility and equipment such as redund ancy, fire protection, and prevention of over-current

levels and other abnormal operating conditions.

Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of

the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.

The company names and brand names herein are the trademarks or registered trademarks of their respective owners.

Edited: Business & Media Promotion Dept.