19-2195; Rev 0; 10/01
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
DAC
REGISTER
INPUT
CONTROL
LOGIC
10-BIT
DAC
REF+
VDD GND
OUT
100kΩ1kΩ
CS SCLK DIN
REF-
OUTPUT
BUFFER
POWER-ON
RESET
POWER-DOWN
CONTROL
LOGIC
MAX5711
General Description
The MAX5711 is a small footprint, low-power, 10-bit digi-
tal-to-analog converter (DAC) that operates from a single
+2.7V to +5.5V supply. The MAX5711 on-chip precision
output amplifier provides Rail-to-Rail®output swing.
Drawing an 85µA supply current at 3V, the MAX5711 is
ideally suited to portable battery-operated equipment.
The MAX5711 utilizes a 3-wire serial interface compatible
with SPI™/QSPI™/MICROWIRE™ and DSP-interface
standards. All logic inputs are CMOS-logic compatible
and buffered with Schmitt triggers to allow direct interfac-
ing to optocouplers. The MAX5711 incorporates a power-
on reset (POR) circuit that ensures that the DAC begins in
a zero-volt-state upon power-up. A power-down mode
that reduces current consumption to 0.3µA may be initiat-
ed through a software command.
The MAX5711 is available in a small 6-pin SOT23 pack-
age. For dual and quad 10-bit versions, see the MAX5721
and MAX5741 data sheets. For single, dual, and quad
12-bit versions, see the MAX5712, MAX5722, and
MAX5742 data sheets. The MAX5711 is specified over
the automotive temperature range of -40°C to +125°C.
Applications
Automatic Tuning
Gain and Offset Adjustment
Power Amplifier Control
Process Control I/O Boards
Battery-Powered Equipment
VCO Control
Features
♦Wide -40°C to +125°C Operating Temperature
Range
♦Low 85µA Supply Current
♦Ultra Low 0.3µA Power-Down Supply Current
♦Single +2.7V to +5.5V Supply Voltage
♦Fast 20MHz 3-Wire SPI/QSPI/MICROWIRE and
DSP-Compatible Serial Interface
♦Schmitt-Triggered Inputs for Direct Interfacing to
Optocouplers
♦Rail-to-Rail Output Buffer
♦Power-On Reset to Zero Volts
♦Three Software-Selectable Power-Down Output
Impedances (100kΩ, 1kΩ, Hi-Z)
♦Tiny 6-Pin SOT23 Package
MAX5711
10-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
________________________________________________________________ Maxim Integrated Products 1
__________________Pin Configuration
GND
SCLKDIN
1 6 OUT
5
VDD
MAX5711
SOT23
TOP VIEW
2
34
CS
Functional Diagram
Ordering Information
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor, Corp.
PART TEMP. RANGE PIN-
PACKAGE
TOP
MARK
MAX5711EUT -40°C to +85°C 6 SOT23 ABCP
MAX5711AUT -40°C to +125°C 6 SOT23 AAUC
MAX5711
10-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +5.5V, GND = 0, RL= 5kΩ, CL= 200pF, TA= TMIN to TMAX, unless otherwise noted. Typical values are at VDD = +5V,
TA= +25°C.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VDD to GND..............................................................-0.3V to +6V
OUT, SCLK, DIN, CS to GND .....................-0.3V to (VDD + 0.3V)
Maximum Current into Any Pin .........................................±50mA
Continuous Power Dissipation (TA= +70°C)
6-Pin SOT23 (derate 9.1mW/°C above +70°C)...........727mW
Operating Temperature Range
MAX5711EUT .................................................-40°C to +85°C
MAX5711AUT ...............................................-40°C to +125°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
STATIC ACCURACY (NOTE 1)
Resolution N 10 Bits
Integral Nonlinearity Error INL (Note 2) ±0.5 ±4 LSB
Differential Nonlinearity Error DNL Guaranteed monotonic (Note 2) ±1 LSB
Zero-Code Error OE Code = 000 0.4 1.5 % of FS
Zero-Code Error Tempco 2.3 ppm/°C
Gain Error GE Code = 3FF hex -3 % of FS
Gain Error Tempco 0.26 ppm/°C
DAC OUTPUT
Output Voltage Range No load (Note 3) 0 VDD V
DC Output Impedance Code = 200 hex 0.8 Ω
VDD = +3V 15
Short-Circuit Current VDD = +5V 48 mA
VDD = +3V 8
Wake-Up Time VDD = +5V 8 µs
Output Leakage Current P ow er - d ow n m od e = outp ut hi g h i m p ed ance ±18 nA
DIGITAL INPUTS (SCLK, DIN, CS)
Input High Voltage VIH VDD = +3V, +5V 0.7 x VDD V
Input Low Voltage VIL VDD = +3V, +5V 0.3 x VDD V
Input Leakage Current IIN Digital inputs = 0 or VDD ±0.1 ±1µA
Input Capacitance CIN 5pF
-4
-2
-3
0
-1
1
2
3
4
0 256 384128 512 640 768 896 1024
MAX5711 toc01
CODE
INL (LSB)
INTEGRAL NONLINEARITY
vs. CODE (TA = +25°C)
VDD = +5V
VDD = +3V
MAX5711
10-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
_______________________________________________________________________________________ 3
Note 1: DC specifications are tested without output loads.
Note 2: Linearity guaranteed from code 29 to code 995.
Note 3: Offset and gain error limit the FSR.
Note 4: Guaranteed by design.
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +5.5V, GND = 0, RL= 5kΩ, CL= 200pF, TA= TMIN to TMAX, TA= +25°C, unless otherwise noted. Typical values are at
VDD = +5V, TA= +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
DYNAMIC PERFORMANCE
Voltage Output Slew Rate SR 0.5
V/µs
Voltage Output Settling Time 100 hex to 300 hex (Note 4) 4 10 µs
Digital Feedthrough Any digital inputs from 0 or VDD 0.2
nV-s
Digital-Analog Glitch Impulse Major carry transition (code 1FF hex to code
200 hex) 12
nV-s
POWER REQUIREMENTS
Supply Voltage Range VDD 2.7 5.5 V
All digital inputs at 0 or VDD, VDD = 3.6V 85
150
Supply Current with No Load IDD All digital inputs at 0 or VDD, VDD = 5.5V 105
187
µA
Power-Down Supply Current
IDDPD
All digital inputs at 0 or VDD, VDD = 5.5V
0.29
1µA
TIMING CHARACTERISTICS (FIGURE 2) (Timing is tested with no load)
SCLK Clock Frequency fSCLK
020
MHz
SCLK Pulse Width High tCH 20 ns
SCLK Pulse Width Low tCL 20 ns
CS Fall to SCLK Rise Setup tCSS 15 ns
DIN Setup Time tDS 15 ns
DIN Hold Time tDH 0ns
SCLK Falling Edge to CS
Rising Edge tCSH 10 ns
CS Pulse Width High tCSW 80 ns
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
-0.20
-0.10
-0.15
0
-0.05
0.05
0.10
0.15
0.20
0 256 384128 512 640 768 896 1024
MAX5711 toc02
CODE
DNL (LSB)
DIFFERENTIAL NONLINEARITY
vs. CODE (TA = +25°C)
VDD = +3V OR +5V
-1.0
-0.6
-0.8
-0.2
-0.4
0.2
0
0.4
0.8
0.6
1.0
0 256 384128 512 640 768 896 1024
MAX5711 toc03
CODE
TOTAL UNADJUSTED ERROR (%)
TOTAL UNADJUSTED ERROR
vs. CODE (TA = +25°C)
VDD = +5V
VDD = +3V
-4
-2
-3
0
-1
1
2
3
4
0 256 384128 512 640 768 896 1024
MAX5711 toc04
CODE
INL (LSB)
INTEGRAL NONLINEARITY
vs. CODE (TA = +125°C)
VDD = +5V
VDD = +3V
-0.20
-0.10
-0.15
0
-0.05
0.05
0.10
0.15
0.20
0 256 384128 512 640 768 896 1024
MAX5711 toc05
CODE
DNL (LSB)
DIFFERENTIAL NONLINEARITY
vs. CODE (TA = +125°C)
VDD = +3V OR +5V
-1.0
-0.6
-0.8
-0.2
-0.4
0.2
0
0.4
0.8
0.6
1.0
0 256 384128 512 640 768 896 1024
MAX5711 toc06
CODE
TOTAL UNADJUSTED ERROR (%)
TOTAL UNADJUSTED ERROR
vs. CODE (TA = +125°C)
VDD = +5V
VDD = +3V
-4
-2
-3
0
-1
1
2
3
4
0 256 384128 512 640 768 896 1024
MAX5711 toc07
CODE
INL (LSB)
INTEGRAL NONLINEARITY
vs. CODE (TA = -40°C)
VDD = +5V
VDD = +3V
-0.20
-0.10
-0.15
0
-0.05
0.05
0.10
0.15
0.20
0 256 384128 512 640 768 896 1024
MAX5711 toc08
CODE
DNL (LSB)
DIFFERENTIAL NONLINEARITY
vs. CODE (TA = -40°C)
VDD = +3V OR +5V
0 256 384128 512 640 768 896 1024
MAX5711 toc09
CODE
TOTAL UNADJUSTED ERROR (%)
TOTAL UNADJUSTED ERROR
vs. CODE (TA = -40°C)
-0.8
-0.4
-0.6
0.2
0
-0.2
0.8
0.6
0.4
1.0
VDD = +3V
VDD = +5V
-4
-2
-3
1
0
-1
3
2
4
-40 0 20-20 40 60 80 100 120
MAX5711 toc10
TEMPERATURE (°C)
INL AND DNL (LSB)
WORST-CASE INL AND DNL
vs. TEMPERATURE
MAXIMUM INL MAXIMUM DNL
MINIMUM INL
MINIMUM DNL
0
0.5
1.0
1.5
2.0
2.5
3.0
042 6 8 10121416
SOURCE AND SINK CURRENT
CAPABILITY (VDD = +3V)
MAX5711 toc11
ISOURCE/SINK (mA)
VOUT (V)
CODE = 3FF HEX,
SOURCING
CURRENT
FROM OUT
CODE = 100 HEX,
SINKING CURRENT
INTO OUT
CODE = 300 HEX,
SOURCING CURRENT
FROM OUT
CODE = 000, SINKING
CURRENT INTO OUT
0
1.0
0.5
2.0
1.5
3.0
2.5
3.5
4.5
4.0
5.0
010155 2025303540
SOURCE AND SINK CURRENT
CAPABILTIY (VDD = +5V)
MAX5711 toc12
ISOURCE/SINK (mA)
VOUT (V)
CODE = 3FF HEX,
SOURCING
CURRENT
FROM OUT
CODE = 100 HEX,
SINKING CURRENT
INTO OUT
CODE = 300 HEX,
SOURCING CURRENT
FROM OUT
CODE = 000, SINKING
CURRENT INTO OUT
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAX5711
10-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
4 _______________________________________________________________________________________
0
40
20
80
60
100
120
2.7 5.2
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX5711 toc13
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
3.73.2 4.2 4.7
CODE = 3FF HEX
CODE = 000
0
100
50
200
150
250
300
2.7 3.7 4.23.2 4.7 5.2
MAX5711 toc14
SUPPLY VOLTAGE (V)
POWER-DOWN SUPPLY CURRENT (nA)
POWER-DOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
0
200
100
500
400
300
800
700
600
900
021345
MAX5711 toc15
SUPPLY CURRENT (µA)
SUPPLY CURRENT vs.
CS INPUT VOLTAGE
CS INPUT VOLTAGE (V)
VDD = +5V
VDD = +3V
FULL-SCALE SETTLING TIME
(VDD = +5V)
MAX5711 toc16
VOUT
1V/div
VSCLK
5V/div
1µs/div
CODE 000 TO 3FF HEX
RL = 5kΩ
CL = 200pF
FULL-SCALE SETTLING TIME
(VDD = +5V)
MAX5711 toc17
VOUT
1V/div
VSCLK
5V/div
2µs/div
CODE 3FF HEX TO 000
RL = 5kΩ
CL = 200pF
HALF-SCALE SETTLING TIME
(VDD = +3V)
MAX5711 toc18
VOUT
1V/div
VSCLK
5V/div
1µs/div
CODE 100 HEX TO 300 HEX
RL = 5kΩ
CL = 200pF
EXITING POWER-DOWN
(VDD = +5V)
MAX5711 toc20
VOUT
1V/div
VSCLK
5V/div
5µs/div
CODE 200 HEX
RL = 5kΩ
CL = 200pF
DIGITAL-TO-ANALOG
GLITCH IMPULSE (VDD = +5V)
MAX5711 toc21
VOUT
10mV/div
CODE 200 HEX TO 1FF HEX
RL = 5kΩ
CL = 200pF
500ns/div
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAX5711
10-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
_______________________________________________________________________________________ 5
MAX5711
10-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
6 _______________________________________________________________________________________
Pin Description
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
DIGITAL-TO-ANALOG
GLITCH IMPULSE (VDD = +5V)
MAX5711 toc22
VOUT
10mV/div
500ns/div
CODE 1FF HEX TO 200 HEX
RL = 5kΩ
CL = 200pF
CLOCK FEEDTHROUGH
(VDD = +5V)
MAX5711 toc23
VOUT
1mV/div
VSCLK
2V/div
500ns/div
RL = 5kΩ
CL = 200pF
PIN NAME FUNCTION
1V
DD Power-Supply Input
2 GND Ground
3 DIN Serial Data Input
4 SCLK Serial Clock Input
5CS Active-Low Chip-Select Input
6 OUT DAC Output Voltage
MAX5711
10-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
_______________________________________________________________________________________ 7
Detailed Description
The MAX5711 voltage-output, 10-bit DAC, offers a full
10-bit performance in a small 6-pin SOT23 package.
The SOT23 footprint is less than 9mm2. The MAX5711
has less than 1LSB differential nonlinearity error, ensur-
ing monotonic performance. The device uses a simple
3-wire, SPI/QSPI/MICROWIRE and DSP-compatible ser-
ial interface that operates up to 20MHz. The MAX5711
incorporates three shutdown modes, making it ideal for
low-power applications.
Analog Section
The MAX5711 consists of a resistor string, an output
buffer, and a POR circuit. Monotonic digital-to-analog
conversion is achieved using a resistor string architec-
ture. Since VDD is the reference for the MAX5711, the
accuracy of the DAC depends on the accuracy of VDD.
The low bias current of the MAX5711 allows its power
to be supplied by a voltage reference such as the
MAX6030. The 10-bit DAC code is binary-unipolar with
1LSB = VDD/1024.
Output Buffer
The DAC output buffer has a rail-to-rail output and is
capable of driving a 5kΩresistive load in parallel with a
200pF capacitive load. With a capacitive load of 200pF,
the output buffer slews 0.5V/µs. With a 1/4FS to 3/4FS
output transition, the amplifier output settles to 1/2LSB
in less than 10µs when loaded with 5kΩin parallel with
200pF. The buffer amplifier is stable with any combination
of resistive loads greater than 5kΩand capacitive loads
less than 200pF.
Program the input register bits to power-down the
device. The DAC registers are preserved during power-
down and upon wake-up, the DAC output is restored to
its pre-power-down voltage.
Power-On Reset
The MAX5711 has a POR circuit to set the DACs output
to zero when VDD is first applied. This ensures that
unwanted DAC output voltages will not occur immedi-
ately following a system startup, such as after a loss of
power. Upon initial power-up, an internal power-on
reset circuit ensures that all DAC registers are cleared,
the DAC is powered-down, and its output is terminated
to GND by a 100kΩresistor. An 8µs recovery time after
issuing a wake-up command is needed before writing
to the DAC registers.
Digital Section
3-Wire Serial Interface
The MAX5711 digital interface is a standard 3-wire con-
nection compatible with SPI/QSPI/MICROWIRE/DSP
interfaces. The chip-select input (CS) frames the serial
data loading at DIN. Immediately following CS high-to-
low transition, the data is shifted synchronously and
latched into the input register on the falling edge of the
serial clock input (SCLK). After 16 bits have been
loaded into the serial input register, the serial input reg-
ister transfers its contents to the DAC latch. CS may
then either be held low or brought high. CS must be
brought high for a minimum of 80ns before the next
write sequence, since a write sequence is initiated on a
tCH
tCL
tDH
tDS
tCSH
SO
C3
SCLK
CS
DIN
tCSS
tCSW
Figure 1. Timing Diagram
MAX5711
10-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
8 _______________________________________________________________________________________
falling edge of CS. Not keeping CS low during the first
15 SCLK cycles discards input data. The serial clock
(SCLK) can idle either high or low between transitions.
Figure 1 shows the complete 3-wire serial interface
transmission. Table 1 lists serial-interface mapping. The
first command after VDD is applied must be the wake-
up command.
Power-Down Modes
The MAX5711 includes three software-controlled
power-down modes that reduce the supply current to
below 1µA. In two of the three power-down modes,
OUT is connected to GND through a resistor. Table 1
lists the three power-down modes of operation. When in
power-down, the MAX5711 does not respond to the
“set and update” command.
Applications Information
Device Powered by
an External Reference
The MAX5711 generates an output voltage proportional
to VDD, coupling power-supply noise to the output. The
circuit in Figure 2 rejects this power-supply noise by
powering the device directly with a precision voltage
reference, improving overall system accuracy. The
MAX6030 (+3V, 75ppm) or the MAX6050 (+5V, 75ppm)
precision voltage references are ideal choices due to
the low-power requirements of the MAX5711. This solu-
tion is also useful when the required full-scale output
voltage is less than the available supply voltages.
Digital Inputs and Interface Logic
The 3-wire digital interface for the MAX5711 is compati-
ble with SPI, QSPI, MICROWIRE, and DSP. The three
digital inputs (CS, DIN, and SCLK) load the digital input
serially into the DAC. All of the digital inputs include
Schmitt-trigger buffers to accept slow-transition inter-
faces. This allows optocouplers to interface directly to
the MAX5711 without additional external logic. The digi-
tal inputs are compatible with CMOS-logic levels.
Power-Supply Bypassing and Layout
Careful PC board layout is important for optimal system
performance. Keep analog and digital signals separate
to reduce noise injection and digital feedthrough. Use a
ground plane to ensure that the ground return from
GND to the supply ground is short and low impedance.
Bypass VDD with a 0.1µF capacitor to ground as close
as possible to the device.
Chip Information
TRANSISTOR COUNT: 3856
PROCESS: BiCMOS
16-BIT SERIAL WORD
MSB LSB MODE OUTPUT
C3 C2 C1 C0 D09 D08 D07 D06 D05 D04 D03 D02 D01 D00 S1 S0
0 0 0 0 10-Bit DAC Code 0 0 Set and Update
DAC
VOUT = VDD x
CODE/1024
1 111XXXXXXXXXX00 Wake-Up Current DAC
setting (initially 0)
1 111XXXXXXXXXX01 Power-Down Floating
1 111XXXXXXXXXX10 Power-Down 1kΩ to GND
1 111XXXXXXXXXX11 Power-Down 100kΩ to GND
Table 1. Serial Interface Mapping
VDD
GND
OUTIN
GND
OUT
MAX6050
MAX6030 MAX5711
Figure 2. MAX5711 Powered By Reference
X = Don’t Care
MAX5711
10-Bit, Low-Power, Rail-to-Rail
Voltage-Output Serial DAC in SOT23
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9
© 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
Package Information
6LSOT.EPS