MC74HCT14A Hex Schmitt-Trigger Inverter with LSTTL Compatible Inputs High-Performance Silicon-Gate CMOS http://onsemi.com The MC74HCT14A may be used as a level converter for interfacing TTL or NMOS outputs to high-speed CMOS inputs. The HCT14A is useful to "square up" slow input rise and fall times. Due to the hysteresis voltage of the Schmitt trigger, the HCT14A finds applications in noisy environments. Features * * * * * * * * MARKING DIAGRAMS 14 PDIP-14 N SUFFIX CASE 646 14 Output Drive Capability: 10 LSTTL Loads TTL/NMOS-Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1.0 mA In Compliance With the JEDEC Standard No. 7.0 A Requirements Chip Complexity: 72 FETs or 18 Equivalent Gates These Devices are Pb-Free, Halogen Free and are RoHS Compliant 1 MC74HCT14AN AWLYYWWG 1 14 SOIC-14 D SUFFIX CASE 751A 14 1 HCT14AG AWLYWW 1 14 14 1 HCT 14A ALYWG G TSSOP-14 DT SUFFIX CASE 948G 1 14 14 1 SOEIAJ-14 F SUFFIX CASE 965 74HCT14A ALYWG 1 A L, WL Y, YY W, WW G or G = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. (c) Semiconductor Components Industries, LLC, 2011 May, 2011 - Rev. 12 1 Publication Order Number: MC74HCT14A/D MC74HCT14A PIN ASSIGNMENT A1 1 14 VCC Y1 2 13 A6 A2 3 12 Y6 Y2 4 11 A5 A3 5 10 Y5 Y3 6 9 A4 GND 7 8 Y4 LOGIC DIAGRAM A1 A2 A3 A4 FUNCTION TABLE Input A Output Y L H H L A5 A6 1 2 3 4 5 6 9 8 11 10 13 12 Y=A Y1 Y2 Y3 Y4 Y5 Y6 PIN 14 = VCC PIN 7 = GND ORDERING INFORMATION Package Shipping MC74HCT14ANG PDIP-14 (Pb-Free) 25 Units / Rail MC74HCT14ADG SOIC-14 (Pb-Free) 55 Units / Rail MC74HCT14ADR2G SOIC-14 (Pb-Free) 2500 / Tape & Reel MC74HCT14ADTR2G TSSOP-14* 2500 / Tape & Reel MC74HCT14AFELG SOEIAJ-14 (Pb-Free) 2000 / Tape & Reel Device For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free. http://onsemi.com 2 MC74HCT14A MAXIMUM RATINGS Symbol VCC Parameter Value Unit DC Supply Voltage (Referenced to GND) *0.5 to )7.0 V VI DC Input Voltage (Referenced to GND) *0.5 to VCC )0.5 V VO DC Output Voltage (Referenced to GND) *0.5 to VCC )0.5 V IIK DC Input Diode Current $20 mA IOK DC Output Diode Current $25 mA IO DC Output Sink Current $25 mA ICC DC Supply Current per Supply Pin $50 mA IGND DC Ground Current per Ground Pin $50 mA TSTG Storage Temperature Range *65 to )150 _C TL Lead Temperature, 1 mm from Case for 10 Seconds TJ Junction Temperature under Bias qJA Thermal Resistance PD Power Dissipation in Still Air at 85_C MSL Moisture Sensitivity FR Flammability Rating VESD ILatchup _C _C PDIP SOIC TSSOP 78 125 170 _C/W PDIP SOIC TSSOP 750 500 450 mW Level 1 Oxygen Index: 30% - 35% ESD Withstand Voltage Latchup Performance 260 )150 UL 94 V-0 @ 0.125 in Human Body Model (Note 1) Machine Model (Note 2) Charged Device Model (Note 3) >4000 >300 >1000 V Above VCC and Below GND at 85_C (Note 4) $300 mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Tested to EIA/JESD22-A114-A. 2. Tested to EIA/JESD22-A115-A. 3. Tested to JESD22-C101-A. 4. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII Symbol VCC VI, VO Parameter Min Max Unit DC Supply Voltage (Referenced to GND) 4.5 5.5 V DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V *55 )125 _C - (Note 5) ns TA Operating Temperature, All Package Types tr, tf Input Rise and Fall Time (Figure 1) 5. No Limit when VI [ 50% VCC, ICC > 1 mA. 6. Unused inputs may not be left open. All inputs must be tied to a high-logic voltage level or a low-logic input voltage level. http://onsemi.com 3 MC74HCT14A DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) Temperature Limit VCC *55_C to 25_C v85_C v125_C IIII IIIIIIII IIIIIIIII III III III III II III III II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIIIIIII IIIIIIIIIIIIIIIII IIIIIIIIIIII IIIIII IIIIII IIIIII IIIII IIIII IIIIII IIIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIII IIIIIIIII III III III III II III III II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII IIIIIIII IIIIIIIII III IIIIIII IIIIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII Symbol Parameter VT)max Maximum Positive-Going Input Threshold Voltage VO = 0.1 V or VCC - 0.1 V |Iout| v 20 mA 4.5 5.5 VT)min Minimum Positive-Going Input Threshold Voltage VO = 0.1 V or VCC - 0.1 V |Iout| v 20 mA 4.5 5.5 VT*max Maximum Negative-Going Input Threshold Voltage VO = 0.1 V or VCC - 0.1 V |Iout| v 20 mA 4.5 5.5 VT*min Minimum Negative-Going Input Threshold Voltage VO = 0.1 V or VCC - 0.1 V |Iout| v 20 mA 4.5 5.5 VH max Maximum Hysteresis Voltage VO = 0.1 V or VCC - 0.1 V |Iout| v 20 mA 4.5 5.5 VH min Minimum Hysteresis Voltage VO = 0.1 V or VCC - 0.1 V |Iout| v 20 mA 4.5 5.5 0.4 0.4 0.4 0.4 0.4 04 VOH Minimum High-Level Output Voltage VI < VT*min |Iout| v 20 mA 4.5 5.5 4.4 5.4 4.4 5.4 4.4 5.4 VI < VT*min |Iout| v 4.0 mA 4.5 3.98 3.84 3.7 VI VT)max |Iout| v 20 mA 4.5 5.5 0.1 0.1 0.1 0.1 0.1 0.1 VI VT)max |Iout| v 4.0 mA 4.5 0.26 0.33 0.4 VOL Maximum Low-Level Output Voltage Test Conditions Volts Min Max Min 1.9 2.1 1.2 1.4 Max 1.9 2.1 1.2 1.4 1.2 1.4 0.5 0.6 Min Unit 1.9 2.1 V 1.2 1.4 1.2 1.4 0.5 0.6 1.4 1.5 Max V 1.2 1.4 0.5 0.6 1.4 1.5 1.4 1.5 V V IIK Maximum Input Leakage Current VI = VCC or GND 5.5 $0.1 $1.0 $1.0 mA ICC Maximum Quiescent Supply Current (per package) VI = VCC or GND Iout = 0 mA 5.5 1.0 10 40 mA DICC Additional Quiescent Supply Current VI = 2.4 V, Any One Input VI = VCC or GND, Other Inputs lout = 0 mA w*55_C 25_C to 125_C 2.9 2.4 5.5 mA AC CHARACTERISTICS (CL = 50 pF; Input tr = tf = 6.0 ns) Guaranteed Limit *55_C to 25_C v85_C v125_C IIII IIIIIIII IIIIIIII IIII III III III II III III II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII Symbol Parameter Test Conditions Figures Min Max tPLH, tPHL Maximum Propagation Delay, Input A to Output Y (L to H) VCC = 5.0 V $ 10% CL = 50 pF, Input tr = tf = 6.0 ns 1&2 32 tTLH, tTHL Maximum Output Transition Time, Any Output VCC = 5.0 V $ 10% CL = 50 pF, Input tr = tf = 6.0 ns 1&2 15 Min Max Min Max Unit 40 48 ns 19 22 ns Typical @ 25C, VCC = 5.0 V CPD Power Dissipation Capacitance, per Inverter (Note 7) 32 7. Used to determine the no-load dynamic power consumption: P D = CPD VCC 2 f + ICC VCC . http://onsemi.com 4 pF MC74HCT14A tr tf INPUT A 2.7 V 1.3 V 0.3 V OUTPUT Y tPLH tPHL 90% 1.3 V 10% tTLH tTHL Figure 1. Switching Waveforms TEST POINT OUTPUT DEVICE UNDER TEST CL * *Includes all probe and jig capacitance. Figure 2. Test Circuit http://onsemi.com 5 3V GND MC74HCT14A PACKAGE DIMENSIONS PDIP-14 N SUFFIX CASE 646-06 ISSUE P 14 8 1 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. B A F L N C -T- SEATING PLANE H G D 14 PL J K 0.13 (0.005) M M http://onsemi.com 6 DIM A B C D F G H J K L M N INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 --- 10 _ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 --- 10 _ 0.38 1.01 MC74HCT14A PACKAGE DIMENSIONS SOIC-14 D SUFFIX CASE 751A-03 ISSUE J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. -A- 14 8 -B- P 7 PL 0.25 (0.010) B M 7 1 G -T- D 14 PL 0.25 (0.010) T B S A DIM A B C D F G J K M P R J M K M F R X 45 _ C SEATING PLANE M S SOLDERING FOOTPRINT 7X 7.04 14X 1.52 1 14X 0.58 1.27 PITCH DIMENSIONS: MILLIMETERS http://onsemi.com 7 MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 MC74HCT14A PACKAGE DIMENSIONS TSSOP-14 DT SUFFIX CASE 948G-01 ISSUE B 14X K REF 0.10 (0.004) 0.15 (0.006) T U M T U V S S N 2X 14 L/2 0.25 (0.010) 8 M B -U- L PIN 1 IDENT. N F 7 1 0.15 (0.006) T U NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. S S DETAIL E K A -V- EEE CCC CCC EEE K1 J J1 SECTION N-N -W- C 0.10 (0.004) -T- SEATING PLANE D H G DETAIL E DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ SOLDERING FOOTPRINT 7.06 1 0.65 PITCH 14X 0.36 14X 1.26 DIMENSIONS: MILLIMETERS http://onsemi.com 8 INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ MC74HCT14A PACKAGE DIMENSIONS SOEIAJ-14 F SUFFIX CASE 965-01 ISSUE B 14 LE 8 Q1 E HE M_ L 7 1 DETAIL P Z D VIEW P A e DIM A A1 b c D E e HE L LE M Q1 Z A1 b 0.13 (0.005) c M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). 0.10 (0.004) MILLIMETERS MIN MAX --2.05 0.05 0.20 0.35 0.50 0.10 0.20 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --1.42 INCHES MIN MAX --0.081 0.002 0.008 0.014 0.020 0.004 0.008 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --0.056 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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