MC74HCT14ADR2G - ON Semiconductor L.L.C.

May, 2011 − Rev. 12

1Publication Order Number:

MC74HCT14A/D

MC74HCT14A

Hex Schmitt-Trigger

Inverter with LSTTL

Compatible Inputs

High−Performance Silicon−Gate CMOS

The MC74HCT14A may be used as a level converter for interfacing

TTL or NMOS outputs to high−speed CMOS inputs.

The HCT14A is useful to “square up” slow input rise and fall times.

Due to the hysteresis voltage of the Schmitt trigger, the HCT14A finds

applications in noisy environments.

Features

•Output Drive Capability: 10 LSTTL Loads

•TTL/NMOS−Compatible Input Levels

•Outputs Directly Interface to CMOS, NMOS, and TTL

•Operating Voltage Range: 4.5 to 5.5 V

•Low Input Current: 1.0 mA

•In Compliance With the JEDEC Standard No. 7.0 A Requirements

•Chip Complexity: 72 FETs or 18 Equivalent Gates

•These Devices are Pb−Free, Halogen Free and are RoHS Compliant

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See detailed ordering and shipping information in the package

dimensions section on page 2 of this data sheet.

ORDERING INFORMATION

MARKING

DIAGRAMS

A = Assembly Location

L, WL = Wafer Lot

Y, YY = Year

W, WW = Work Week

G or G= Pb−Free Package

TSSOP−14

DT SUFFIX

CASE 948G

14

1

SOEIAJ−14

F SUFFIX

CASE 965

SOIC−14

D SUFFIX

CASE 751A

14

1

14

74HCT14A

ALYWG

HCT14AG

AWLYWW

14

1

14

HCT

14A

ALYWG

G

1

14

1

PDIP−14

N SUFFIX

CASE 646

MC74HCT14AN

AWLYYWWG

1

14

(Note: Microdot may be in either location)

MC74HCT14A

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PIN ASSIGNMENT

PIN 14 = VCC

PIN 7 = GND

Y = A

A1 12Y1

A2 34Y2

A3 56Y3

A4 98Y4

A5 11 10 Y5

A6 13 12 Y6

FUNCTION TABLE

Input

A

Output

Y

LOGIC DIAGRAM

11

12

13

14

8

9

105

4

3

2

1

7

6

Y5

A5

Y6

A6

VCC

Y4

A4

Y2

A2

Y1

A1

GND

Y3

A3

L

H

L

ORDERING INFORMATION

Device Package Shipping†

MC74HCT14ANG PDIP−14

(Pb−Free) 25 Units / Rail

MC74HCT14ADG SOIC−14

(Pb−Free) 55 Units / Rail

MC74HCT14ADR2G SOIC−14

(Pb−Free) 2500 / Tape & Reel

MC74HCT14ADTR2G TSSOP−14* 2500 / Tape & Reel

MC74HCT14AFELG SOEIAJ−14

(Pb−Free) 2000 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*This package is inherently Pb−Free.

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3

MAXIMUM RATINGS

Symbol Parameter Value Unit

VCC DC Supply Voltage (Referenced to GND) *0.5 to )7.0 V

VIDC Input Voltage (Referenced to GND) *0.5 to VCC )0.5 V

VODC Output Voltage (Referenced to GND) *0.5 to VCC )0.5 V

IIK DC Input Diode Current $20 mA

IOK DC Output Diode Current $25 mA

IODC Output Sink Current $25 mA

ICC DC Supply Current per Supply Pin $50 mA

IGND DC Ground Current per Ground Pin $50 mA

TSTG Storage Temperature Range *65 to )150 _C

TLLead Temperature, 1 mm from Case for 10 Seconds 260 _C

TJJunction Temperature under Bias )150 _C

qJA Thermal Resistance PDIP

SOIC

TSSOP

78

125

170

_C/W

PDPower Dissipation in Still Air at 85_C PDIP

SOIC

TSSOP

750

500

450

mW

MSL Moisture Sensitivity Level 1

FRFlammability Rating Oxygen Index: 30% − 35% UL 94 V−0 @ 0.125 in

VESD ESD Withstand Voltage Human Body Model (Note 1)

Machine Model (Note 2)

Charged Device Model (Note 3)

>4000

>300

>1000

V

ILatchup Latchup Performance Above VCC and Below GND at 85_C (Note 4) $300 mA

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. Tested to EIA/JESD22−A114−A.

2. Tested to EIA/JESD22−A115−A.

3. Tested to JESD22−C101−A.

4. Tested to EIA/JESD78.

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Max Unit

ÎÎÎÎ

VCC

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Supply Voltage (Referenced to GND)

ÎÎÎÎÎ

4.5

ÎÎÎÎ

5.5

ÎÎÎ

V

ÎÎÎÎ

VI, VO

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

DC Input Voltage, Output Voltage (Referenced to GND)

ÎÎÎÎÎ

0

ÎÎÎÎ

VCC

ÎÎÎ

V

ÎÎÎÎ

TA

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Operating Temperature, All Package Types

ÎÎÎÎÎ

*55

ÎÎÎÎ

)125

ÎÎÎ

_C

ÎÎÎÎ

tr, tf

ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ

Input Rise and Fall Time (Figure 1)

ÎÎÎÎÎ

−

ÎÎÎÎ

(Note 5)

ÎÎÎ

ns

5. No Limit when VI [ 50% VCC, ICC > 1 mA.

6. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level.

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4

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Temperature Limit

VCC *55_C to 25_Cv85_Cv125_C

Symbol Parameter Test Conditions Volts Min Max Min Max Min Max Unit

ÎÎÎÎ

VT)max

ÎÎÎÎÎÎÎÎ

Maximum Positive−Going

Input Threshold Voltage

ÎÎÎÎÎÎÎÎÎ

VO = 0.1 V or VCC – 0.1 V

|Iout| v 20 mA

ÎÎÎ

4.5

5.5

ÎÎÎ

1.9

2.1

ÎÎÎ

ÎÎ

1.9

2.1

ÎÎÎ

1.9

2.1

ÎÎ

V

ÎÎÎÎ

VT)min

ÎÎÎÎÎÎÎÎ

Minimum Positive−Going

Input Threshold Voltage

ÎÎÎÎÎÎÎÎÎ

VO = 0.1 V or VCC – 0.1 V

|Iout| v 20 mA

ÎÎÎ

4.5

5.5

ÎÎÎ

1.2

1.4

ÎÎÎ

1.2

1.4

ÎÎ

ÎÎÎ

1.2

1.4

ÎÎÎ

ÎÎ

V

ÎÎÎÎ

VT*max

ÎÎÎÎÎÎÎÎ

Maximum Negative−Going

Input Threshold Voltage

ÎÎÎÎÎÎÎÎÎ

VO = 0.1 V or VCC – 0.1 V

|Iout| v 20 mA

ÎÎÎ

4.5

5.5

ÎÎÎ

1.2

1.4

ÎÎÎ

ÎÎ

1.2

1.4

ÎÎÎ

1.2

1.4

ÎÎ

ÎÎÎÎ

VT*min

ÎÎÎÎÎÎÎÎ

Minimum Negative−Going

Input Threshold Voltage

ÎÎÎÎÎÎÎÎÎ

VO = 0.1 V or VCC – 0.1 V

|Iout| v 20 mA

ÎÎÎ

4.5

5.5

ÎÎÎ

0.5

0.6

ÎÎÎ

0.5

0.6

ÎÎ

ÎÎÎ

0.5

0.6

ÎÎÎ

ÎÎ

ÎÎÎÎ

VH max

ÎÎÎÎÎÎÎÎ

Maximum Hysteresis

Voltage

ÎÎÎÎÎÎÎÎÎ

VO = 0.1 V or VCC – 0.1 V

|Iout| v 20 mA

ÎÎÎ

4.5

5.5

ÎÎÎ

1.4

1.5

ÎÎÎ

ÎÎ

1.4

1.5

ÎÎÎ

1.4

1.5

ÎÎ

ÎÎÎÎ

VH min

ÎÎÎÎÎÎÎÎ

Minimum Hysteresis

Voltage

ÎÎÎÎÎÎÎÎÎ

VO = 0.1 V or VCC – 0.1 V

|Iout| v 20 mA

ÎÎÎ

4.5

5.5

ÎÎÎ

0.4

ÎÎÎ

0.4

ÎÎ

ÎÎÎ

0.4

0 4

ÎÎÎ

ÎÎ

ÎÎÎÎ

VOH

ÎÎÎÎÎÎÎÎ

Minimum High−Level

Output Voltage

ÎÎÎÎÎÎÎÎÎ

VI < VT*min

|Iout| v 20 mA

ÎÎÎ

4.5

5.5

ÎÎÎ

4.4

5.4

ÎÎÎ

4.4

5.4

ÎÎ

ÎÎÎ

4.4

5.4

ÎÎÎ

ÎÎ

V

ÎÎÎÎ

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎ

VI < VT*min

|Iout| v 4.0 mA

ÎÎÎ

4.5

ÎÎÎ

3.98

ÎÎÎ

3.84

ÎÎ

ÎÎÎ

3.7

ÎÎÎ

ÎÎ

ÎÎÎÎ

VOL

ÎÎÎÎÎÎÎÎ

Maximum Low−Level

Output Voltage

ÎÎÎÎÎÎÎÎÎ

VI ≥ VT)max

|Iout| v 20 mA

ÎÎÎ

4.5

5.5

ÎÎÎ

0.1

ÎÎÎ

ÎÎ

0.1

ÎÎÎ

0.1

ÎÎ

V

ÎÎÎÎ

ÎÎÎÎÎÎÎÎ

ÎÎÎÎÎÎÎÎÎ

VI ≥ VT)max

|Iout| v 4.0 mA

ÎÎÎ

4.5

ÎÎÎ

0.26

ÎÎÎ

ÎÎ

0.33

ÎÎÎ

0.4

ÎÎ

ÎÎÎÎ

IIK

ÎÎÎÎÎÎÎÎ

Maximum Input

Leakage Current

ÎÎÎÎÎÎÎÎÎ

VI = VCC or GND

ÎÎÎ

5.5

ÎÎÎ

$0.1

ÎÎÎ

ÎÎ

$1.0

ÎÎÎ

$1.0

ÎÎ

mA

ÎÎÎÎ

ICC

ÎÎÎÎÎÎÎÎ

Maximum Quiescent

Supply Current

(per package)

ÎÎÎÎÎÎÎÎÎ

VI = VCC or GND

Iout = 0 mA

ÎÎÎ

5.5

ÎÎÎ

1.0

ÎÎÎ

ÎÎ

10

ÎÎÎ

40

ÎÎ

mA

w*55_C 25_C to 125_C

ÎÎÎÎ

DICC

ÎÎÎÎÎÎÎÎ

Additional Quiescent

Supply Current

ÎÎÎÎÎÎÎÎÎ

VI = 2.4 V, Any One Input

VI = VCC or GND, Other Inputs

lout = 0 mA

ÎÎÎ

5.5

ÎÎÎÎÎÎÎ

2.9

ÎÎÎÎÎÎ

2.4

ÎÎ

mA

AC CHARACTERISTICS (CL = 50 pF; Input tr = tf = 6.0 ns)

Guaranteed Limit

*55_C to 25_Cv85_Cv125_C

Symbol Parameter Test Conditions Figures Min Max Min Max Min Max Unit

ÎÎÎÎ

tPLH,

tPHL

ÎÎÎÎÎÎÎÎ

Maximum Propagation

Delay, Input A to Output

Y (L to H)

ÎÎÎÎÎÎÎÎ

VCC = 5.0 V $10%

CL = 50 pF, Input tr = tf = 6.0 ns

ÎÎÎÎ

1 & 2

ÎÎÎ

32

ÎÎÎ

ÎÎ

40

ÎÎÎ

48

ÎÎ

ns

ÎÎÎÎ

tTLH,

tTHL

ÎÎÎÎÎÎÎÎ

Maximum Output

Transition Time, Any

Output

ÎÎÎÎÎÎÎÎ

VCC = 5.0 V $ 10%

CL = 50 pF, Input tr = tf = 6.0 ns

ÎÎÎÎ

1 & 2

ÎÎÎ

15

ÎÎÎ

ÎÎ

19

ÎÎÎ

22

ÎÎ

ns

Typical @ 25°C, VCC = 5.0 V

CPD Power Dissipation Capacitance, per Inverter (Note 7) 32 pF

7. Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC.

MC74HCT14A

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5

*Includes all probe and jig capacitance.

CL*

TEST POINT

DEVICE

UNDER

TEST

OUTPUT

Figure 1. Switching Waveforms

Figure 2. Test Circuit

INPUT A

OUTPUT Y

tftr3 V

GND

tPHL

tPLH

tTLH tTHL

2.7 V

1.3 V

0.3 V

90%

1.3 V

10%

MC74HCT14A

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6

PACKAGE DIMENSIONS

PDIP−14

N SUFFIX

CASE 646−06

ISSUE P

17

14 8

B

ADIM MIN MAX MIN MAX

MILLIMETERSINCHES

A0.715 0.770 18.16 19.56

B0.240 0.260 6.10 6.60

C0.145 0.185 3.69 4.69

D0.015 0.021 0.38 0.53

F0.040 0.070 1.02 1.78

G0.100 BSC 2.54 BSC

H0.052 0.095 1.32 2.41

J0.008 0.015 0.20 0.38

K0.115 0.135 2.92 3.43

L

M−−− 10 −−− 10

N0.015 0.039 0.38 1.01

__

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS WHEN

FORMED PARALLEL.

4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

5. ROUNDED CORNERS OPTIONAL.

F

HG D

K

C

SEATING

PLANE

N

−T−

14 PL

M

0.13 (0.005)

L

M

J0.290 0.310 7.37 7.87

MC74HCT14A

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7

PACKAGE DIMENSIONS

SOIC−14

D SUFFIX

CASE 751A−03

ISSUE J

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE

MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

PER SIDE.

5. DIMENSION D DOES NOT INCLUDE

DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.127

(0.005) TOTAL IN EXCESS OF THE D

DIMENSION AT MAXIMUM MATERIAL

CONDITION.

−A−

−B−

G

P7 PL

14 8

7

1

M

0.25 (0.010) B M

S

B

M

0.25 (0.010) A S

T

−T−

F

RX 45

SEATING

PLANE D14 PL K

C

J

M

_DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A8.55 8.75 0.337 0.344

B3.80 4.00 0.150 0.157

C1.35 1.75 0.054 0.068

D0.35 0.49 0.014 0.019

F0.40 1.25 0.016 0.049

G1.27 BSC 0.050 BSC

J0.19 0.25 0.008 0.009

K0.10 0.25 0.004 0.009

M0 7 0 7

P5.80 6.20 0.228 0.244

R0.25 0.50 0.010 0.019

__ __

7.04

14X

0.58

14X

1.52

1.27

DIMENSIONS: MILLIMETERS

1

PITCH

SOLDERING FOOTPRINT

7X

MC74HCT14A

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8

PACKAGE DIMENSIONS

TSSOP−14

DT SUFFIX

CASE 948G−01

ISSUE B

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A4.90 5.10 0.193 0.200

B4.30 4.50 0.169 0.177

C−−− 1.20 −−− 0.047

D0.05 0.15 0.002 0.006

F0.50 0.75 0.020 0.030

G0.65 BSC 0.026 BSC

H0.50 0.60 0.020 0.024

J0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L6.40 BSC 0.252 BSC

M0 8 0 8

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD

FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH OR GATE BURRS SHALL NOT

EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE

INTERLEAD FLASH OR PROTRUSION.

INTERLEAD FLASH OR PROTRUSION SHALL

NOT EXCEED 0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE

DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08

(0.003) TOTAL IN EXCESS OF THE K

DIMENSION AT MAXIMUM MATERIAL

CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE

DETERMINED AT DATUM PLANE −W−.

____

S

U0.15 (0.006) T

2X L/2

S

U

M

0.10 (0.004) V S

T

L−U−

SEATING

PLANE

0.10 (0.004)

−T−

ÇÇÇ

SECTION N−N

DETAIL E

JJ1

K

K1

ÉÉÉ

DETAIL E

F

M

−W−

0.25 (0.010)

8

14

7

1

PIN 1

IDENT.

H

G

A

D

C

B

S

U0.15 (0.006) T

−V−

14X REFK

N

7.06

14X

0.36 14X

1.26

0.65

DIMENSIONS: MILLIMETERS

1

PITCH

SOLDERING FOOTPRINT

MC74HCT14A

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9

PACKAGE DIMENSIONS

SOEIAJ−14

F SUFFIX

CASE 965−01

ISSUE B

HE

A1

DIM MIN MAX MIN MAX

INCHES

--- 2.05 --- 0.081

MILLIMETERS

0.05 0.20 0.002 0.008

0.35 0.50 0.014 0.020

0.10 0.20 0.004 0.008

9.90 10.50 0.390 0.413

5.10 5.45 0.201 0.215

1.27 BSC 0.050 BSC

7.40 8.20 0.291 0.323

0.50 0.85 0.020 0.033

1.10 1.50 0.043 0.059

0

0.70 0.90 0.028 0.035

--- 1.42 --- 0.056

A1

HE

Q1

LE

_10 _0

_10 _

LE

Q1

_

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS D AND E DO NOT INCLUDE

MOLD FLASH OR PROTRUSIONS AND ARE

MEASURED AT THE PARTING LINE. MOLD FLASH

OR PROTRUSIONS SHALL NOT EXCEED 0.15

(0.006) PER SIDE.

4. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY.

5. THE LEAD WIDTH DIMENSION (b) DOES NOT

INCLUDE DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08 (0.003)

TOTAL IN EXCESS OF THE LEAD WIDTH

DIMENSION AT MAXIMUM MATERIAL CONDITION.

DAMBAR CANNOT BE LOCATED ON THE LOWER

RADIUS OR THE FOOT. MINIMUM SPACE

BETWEEN PROTRUSIONS AND ADJACENT LEAD

TO BE 0.46 ( 0.018).

0.13 (0.005) M0.10 (0.004)

D

Z

E

1

14 8

7

eA

b

VIEW P

c

L

DETAIL P

M

A

b

c

D

E

e

L

M

Z

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to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All

operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights

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intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should

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MC74HCT14A/D

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