S71WS-P based MCP Products 1.8 Volt-only x16 Simultaneous Read/Write, Burst Mode Flash Memory with CellularRAM Data Sheet S71WS-P based MCP Products Cover Sheet Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Each product described herein may be designated as Advance Information, Preliminary, or Full Production. See Notice On Data Sheet Designations for definitions. Publication Number S71WS-P_00 Revision A Amendment 16 Issue Date November 11, 2010 D at a S hee t Notice On Data Sheet Designations Spansion Inc. issues data sheets with Advance Information or Preliminary designations to advise readers of product information or intended specifications throughout the product life cycle, including development, qualification, initial production, and full production. In all cases, however, readers are encouraged to verify that they have the latest information before finalizing their design. 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Questions regarding these document designations may be directed to your local sales office. 2 S71WS-P based MCP Products S71WS-P_00_A16 November 11, 2010 S71WS-P based MCP Products 1.8 Volt-only x16 Simultaneous Read/Write, Burst Mode Flash Memory with CellularRAM Data Sheet Features Power supply voltage of 1.7 to 1.95V pSRAM burst frequency: 66 MHz, 80 MHz, 104 MHz Flash access time: 80 ns, 20 ns Package: Flash burst frequencies: 66 MHz, 80 MHz, 104 MHz - 8.0 x 11.6 mm MCP Operating Temperature pSRAM Access time: 70 ns, 20 ns - -25C to +85C (wireless) The S71WS series is a product line of stacked packages and consists of: One S29WS-P NOR flash memory die CellularRAM die The products covered by this document are listed in the table below. CellularRAM Density (Mb) Device 32 Mb 64 Mb 128 Mb S29WS512P S71WS512PD0 S29WS256P S29WS128P S71WS256PC0 S71WS128PB0 Note: For a full list of OPNs, please contact the local sales representative or refer to the Ordering Information valid combinations tables. For detailed specifications, please refer to the individual data sheets. Document Publication Identification Number (PID) S29WS-P S29WS-P_00 128M CellularRAM Type 5 CustComspec_00 64M CellularRAM PN: SWM064D133S1R SWM064D133S1R 32M CellularRAM PN: SWM032D133S1R SWM032D133S1R Publication Number S71WS-P_00 Revision A Amendment 16 Issue Date November 11, 2010 D at a 1. S hee t Product Selector Guide Device Model Number S71WS512PD0HH3 YL S71WS512PD0HH3 YR S71WS512PD0HH3 YV S71WS256PC0HH3 YL S71WS256PC0HH3 YR Flash Density (Mb) CellularRAM Density (Mb) 512 128 RL S71WS128PB0HH3 RR S71WS128PB0HH3 RV CellularRAM Speed (MHz) CellularRAM Supplier Package 104 80 Type 5 66 104 256 S71WS128PB0HH3 Flash Speed (MHz) 64 104 SWM064D133S1R 80 84 ball MCP 8x11.6x1.2 mm 104 128 32 80 SWM032D133S1R 66 2. MCP Block Diagram A0-Amax A0-Amax AFlash AFlash RDY RDY CLK AVD# F-CE# OE# F-RST# F-ACC F-WP# F-WE# CLK AVD# CE# OE# RESET# ACC WP# WE# WS-P Flash Memory DQ0-DQ15 DQ0-DQ15 VSS VSS VCC VCCQ F-VCC F-VCCQ A0-Amax DQ0-DQ15 WAIT R-CE# R-LB# R-UB# R-CRE CLK AVD# CE# OE# LB# UB# WE# CRE pSRAM Memory VSS VCC VCCQ 4 S71WS-P based MCP Products R-VCC S71WS-P_00_A16 November 11, 2010 Data She et 3. Connection Diagrams 1 2 3 4 5 6 7 8 9 10 A DNU DNU B AVD# VSS CLK RFU F-VCC RFU RFU RFU Legend C F-WP# A7 R-LB# F-ACC WE# A8 A11 RFU Reserved for Future Use D A3 A6 R-UB# F-RST# RFU A19 A12 A15 A2 A5 A18 RDY A20 A9 A13 A21 A1 A4 A17 RFU A23 A10 A14 A22 A0 VSS DQ1 RFU RFU DQ6 A24 A16 Flash & pSRAM Shared Only F-CE# OE# DQ9 DQ3 DQ4 DQ13 DQ15 R-CRE Do Not Use R-CE# DQ0 DQ10 F-VCC R-VCC DQ12 DQ7 VSS RFU DQ8 DQ2 DQ11 RFU DQ5 DQ14 RFU RFU RFU VSS F-VCC RFU RFU F-VCCQ DNU NOR Flash Only E F pSRAM Only G H J K L M DNU DNU Note: 1. VCC pins must ramp simultaneously. 3.1 MCP Flash-only Addresses Shared Addresses S71WS512PD0 A24-A23 A22-A0 S71WS256PC0 A23-A22 A21-A0 S71WS128PB0 A22-A21 A20-A0 Special Handling Instructions For FBGA Package Special handling is required for Flash Memory products in FBGA packages. Flash memory devices in FBGA packages may be damaged if exposed to ultrasonic cleaning methods. The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150C for prolonged periods of time. 3.2 Look-ahead Ballout for Future Designs Please refer to the Design-in Scalable Wireless Solutions with Spansion Products application note (publication number: Design_Scalable_Wireless). Contact your local Spansion sales representative for more details. November 11, 2010 S71WS-P_00_A16 S71WS-P based MCP Products 5 D at a 3.3 NOR Flash and pSRAM Input/Output Descriptions Signal Amax-A0 DQ15-DQ0 F-CE# Description Flash pSRAM NOR Flash Address inputs X X Flash Data input/output X X NOR Flash Chip-enable input #1. Asynchronous relative to CLK for Burst Mode. X OE# Output Enable input. Asynchronous relative to CLK for Burst mode. X X WE# Write Enable input. X X NOR Flash device power supply (1.7 V - 1.95 V). X F-VCC Input/Output Buffer power supply. X VSS Ground X X RFU Reserved for Future Use. No device internal signal is currently connected to the package connector but there is potential future use for the connector for a signal. It is recommended to not use RFU connectors for PCB routing channels so that the PCB may take advantage of future enhanced features in compatible footprint devices. RDY Flash ready output. Indicates the status of the Burst read. VOL = data valid. The Flash RDY pin is shared with the WAIT pin of the pSRAM. X X CLK NOR Flash Clock, shared with CLK of burst-mode pSRAM.. The first rising edge of CLK in conjunction with AVD# low latches the address input and activates burst mode operation. After the initial word is output, subsequent rising edges of CLK increment the internal address counter. CLK should remain low during asynchronous access. X X NOR Flash Address Valid input. Shared with AVD# of burst-mode pSRAM. Indicates to device that the valid address is present on the address inputs. VIL = for asynchronous mode, indicates valid address; for burst mode, causes starting address to be latched on rising edge of CLK. VIH= device ignores address inputs X X F-RST# NOR Flash hardware reset input. VIL= device resets and returns to reading array data X F-WP# NOR Flash hardware write protect input. VIL = disables program and erase functions in the four outermost sectors. X F-ACC NOR Flash accelerated input. At VHH, accelerates programming; automatically places device in unlock bypass mode. At VIL, disables all program and erase functions. Should be at VIH for all other conditions. X F-VCCQ AVD# R-CE# Chip-enable input for pSRAM X R-CRE Control Register Enable (pSRAM). For CellularRAM only. X R-VCC pSRAM Power Supply X R-UB# Upper Byte Control (pSRAM) X R-LB# Lower Byte Control (pSRAM) X DNU 6 S hee t Do Not Use. A device internal signal may be connected to the package connector. The connection may be used by Spansion for test or other purposes and is not intended for connection to any host system signal. Any DNU signal related function will be inactive when the signal is at VIL. The signal has an internal pull-down resistor and may be left unconnected in the host system or may be tied to VSS. Do not use these connections for PCB signal routing channels. Do not connect any host system signal to these connections. Note: Some customers prefer being able to tie DNU signals to VSS on the PCB. S71WS-P based MCP Products S71WS-P_00_A16 November 11, 2010 Data 4. She et Ordering Information The order number is formed by a valid combinations of the following: S71WS 256 P C0 H H 3 YL 0 PACKING TYPE 0 = Tray 2 = 7" Tape and Reel 3 = 13" Tape and Reel MODEL NUMBER Refer to Product Selector Guide on page 4 PACKAGE DESCRIPTOR 3 = 84-ball Fine-pitch BGA, 11.6 mm x 8 mm MATERIAL SET H = Low-Halogen, Pb-free PACKAGE TYPE H = 1.2 mm MCP FBGA CellularRAM DENSITY D0 = 128 Mb C0 = 64 Mb B0 = 32 Mb PROCESS TECHNOLOGY P = 90 nm, MirrorBit(R) Technology CODE FLASH DENSITY 512 = 512 Mb 256 = 256 Mb 128 = 128 Mb PRODUCT FAMILY S71WS Stacked Products (MCP) 1.8 V NOR Flash with pSRAM 4.1 Valid Combinations Valid Combinations list configurations planned to be supported in volume for this device. Consult your local sales office to confirm availability of specific valid combinations and to check on newly released combinations. Valid Combination Product Family Code Flash Denisty (Mb) 256 512 Model Number Combo B0 HH3 RL, RR, RV C0 HH3 YL, YR HH3 YL, YR, YV CellularRAM Density P D0 128 S71WS Package Type / Material Process Technology Packing Type 0, 2, 3 (Note 1) Notes: 1. Packing Type 0 is standard. Specify other options as required. 2. BGA package marking omits leading S and packing type designator from ordering part number. November 11, 2010 S71WS-P_00_A16 S71WS-P based MCP Products 7 D at a 5. S hee t Physical Dimensions 6. TLA084-- 84-ball Fine Pitch Ball Grid Array (FBGA) 8 x 11.6 mm Package D1 A D eD 0.15 C (2X) 10 9 SE 7 8 7 6 E E1 5 4 eE 3 2 1 M L K J INDEX MARK PIN A1 CORNER B 10 TOP VIEW H G F E D C B A 7 SD 0.15 C PIN A1 CORNER (2X) BOTTOM VIEW 0.20 C A A2 A1 C 0.08 C SIDE VIEW 6 b 84X 0.15 0.08 M C A B M C NOTES: PACKAGE TLA 084 JEDEC N/A DxE 11.60 mm x 8.00 mm PACKAGE SYMBOL MIN NOM MAX A --- --- 1.20 A1 0.17 --- --- A2 0.81 --- 0.97 NOTE PROFILE BODY SIZE E 8.00 BSC. BODY SIZE D1 8.80 BSC. MATRIX FOOTPRINT E1 7.20 BSC. MATRIX FOOTPRINT MD 12 MATRIX SIZE D DIRECTION ME 10 MATRIX SIZE E DIRECTION 84 0.35 0.40 BALL POSITION DESIGNATION PER JESD 95-1, SPP-010. 4. e REPRESENTS THE SOLDER BALL GRID PITCH. 5. SYMBOL "MD" IS THE BALL MATRIX SIZE IN THE "D" DIRECTION. SYMBOL "ME" IS THE BALL MATRIX SIZE IN THE "E" DIRECTION. n IS THE NUMBER OF POPULTED SOLDER BALL POSITIONS FOR MATRIX SIZE MD X ME. 6 DIMENSION "b" IS MEASURED AT THE MAXIMUM BALL DIAMETER IN A PLANE PARALLEL TO DATUM C. 7 SD AND SE ARE MEASURED WITH RESPECT TO DATUMS A AND B AND DEFINE THE POSITION OF THE CENTER SOLDER BALL IN THE OUTER ROW. WHEN THERE IS AN ODD NUMBER OF SOLDER BALLS IN THE OUTER ROW SD OR SE = 0.000. BALL DIAMETER eE 0.80 BSC. BALL PITCH 0.80 BSC BALL PITCH 0.40 BSC. SOLDER BALL PLACEMENT A2,A3,A4,A5,A6,A7,A8,A9 DEPOPULATED SOLDER BALLS B1,B10,C1,C10,D1,D10, E1,E10,F1,F10,G1,G10, H1,H10,J1,J10,K1,K10,L1,L10, M2,M3,M4,M5,M6,M7,M8,M9 8 ALL DIMENSIONS ARE IN MILLIMETERS. 3. BALL COUNT 0.45 eD SD / SE 2. BALL HEIGHT 11.60 BSC. n DIMENSIONING AND TOLERANCING METHODS PER ASME Y14.5M-1994. BODY THICKNESS D Ob 1. S71WS-P based MCP Products WHEN THERE IS AN EVEN NUMBER OF SOLDER BALLS IN THE OUTER ROW, SD OR SE = e/2 8. "+" INDICATES THE THEORETICAL CENTER OF DEPOPULATED BALLS. 9. N/A 10 A1 CORNER TO BE IDENTIFIED BY CHAMFER, LASER OR INK MARK, METALLIZED MARK INDENTATION OR OTHER MEANS. 3372-2 \ 16-038.22a S71WS-P_00_A16 November 11, 2010 Data 7. 7.1 She et Revision History Revision A (February 21, 2006) Initial release. 7.2 Revision A1 (April 12, 2006) Added the S71WS512PC0 7.3 Revision A2 (August 21, 2006) Added the S71WS512PD0 108MHz OPN 7.4 Revision A3 (November 7, 2006) Added the S71WS256PD0 MCP Added the S71WS256PC0 MCP 7.5 Revision A4 (December 8, 2006) Added new CellularRAM Type 3 Revised Valid Combination table Revised Product Selector Guide 7.6 Revision A5 (January 11, 2007) Added S71WS128PC0 MCP offering 7.7 Revision A6 (February 5, 2007) Added the S71WS512PD0JF4 OPN 7.8 Revision A7 (March 27, 2007) Added the S71WS512PD0HF3SR OPN 7.9 Revision A8 (July 30, 2007) Added 80 MHz S71WS128PC0 to Valid Combinations 7.10 Revision A9 (September 4, 2007) Added 54 MHz and Asynchronous S71WS512PC0 MCP Revised Valid Combinations 7.11 Revision A10 (October 19, 2007) Add 104 MHz, 80 Mhz and 66 MHz S71WS256PC, S71WS256PD and S71WS128PC MCP products Removed the S71WS512PD0JF MCP November 11, 2010 S71WS-P_00_A16 S71WS-P based MCP Products 9 D at a 7.12 S hee t Revision A11 (March 14, 2008) Added package TSB084 Added OPNs S71WS128PB0HF3SR/SV Added low-Halogen options for S71WS128PB0, S71WS128PC0, S71WS256PC0, S71WS256PD0, and S71WS512PD0 7.13 Revision A12 (April 8, 2008) Added 64M CellularRAM Type 2 Updated 128M CellularRAM Type 2 PID Removed 128M/64M CellularRAM Type 3 OPNs and PIDs 7.14 Revision A13 (June 13, 2008) Added CellularRAM Type 3 and associated OPNs Added CellularRAM PN: SWM128D104R1R and associated OPNs Changed Flash Page Access time to 20 ns In Features, changed max Flash burst frequency from 108 MHz to 104 MHz Removed OPNs S71WS512PD0HH3HL, S71WS256PD0HH3HL, S71WS256PD0HH3HR 7.15 Revision A14 (May 7, 2010) Added MCP OPNs S71WS256PC0HH3YR0/L0 and CellularRAM OPN SWM064D133S1R 7.16 Revision A15 (June 30, 2010) Added MCP OPNs S71WS128PB0HH3RL0/RR0/RV0 for new 32 Mb CellularRAM OPN SWM032D133S1R 7.17 Revision A16 (November 11, 2010) Removed all OPNs except S71WS512PD0HH3YL/YR/YV, S71WS256PC0HH3YR/YL and S71WS128PB0HH3RL/RR/RV Removed TSB084 drawing 10 S71WS-P based MCP Products S71WS-P_00_A16 November 11, 2010 Data She et Colophon The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for any use that includes fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for any use where chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Spansion will not be liable to you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the US Export Administration Regulations or the applicable laws of any other country, the prior authorization by the respective government entity will be required for export of those products. Trademarks and Notice The contents of this document are subject to change without notice. This document may contain information on a Spansion product under development by Spansion. Spansion reserves the right to change or discontinue work on any product without notice. The information in this document is provided as is without warranty or guarantee of any kind as to its accuracy, completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other warranty, express, implied, or statutory. Spansion assumes no liability for any damages of any kind arising out of the use of the information in this document. Copyright (c)2006- 2010 Spansion Inc. All rights reserved. Spansion(R), the Spansion logo, MirrorBit(R), MirrorBit(R) EclipseTM, ORNANDTM, EcoRAMTM and combinations thereof, are trademarks and registered trademarks of Spansion LLC in the United States and other countries. Other names used are for informational purposes only and may be trademarks of their respective owners. November 11, 2010 S71WS-P_00_A16 S71WS-P based MCP Products 11