SPWF04SC - STMICROELECTRONICS

Features

• 2.4 GHz IEEE 802.11 b/g/n transceiver

• High performance STM32F439

– ARM® Cortex®-M4

– 256 kB SRAM

– 2 MB embedded high-speed Flash memory

– 1 MB Flash memory for user storage, extendable via SD/MMC interface or

external SPI Flash

• Integrated TCP/IP protocol stack

– 8 simultaneous TCP or UDP clients and 2 socket servers (supporting up to

8 clients each)

– Secured socket and upper layers (i.e. HTTPS) supporting up to TLS 1.2,

including X.509 Certificates, AES (128, 256), hash (MD5, SHA-1, SHA-256,

SHA-384) and public key algorithms for key exchange (RSA, DH, ECDH)

and digital signature (RSA, ECDSA).

• Web server supporting SSI

• Open, WEP, WPA2 PSK, WPA2 enterprise

• WPS for station

• System modes: station, IBSS, and miniAP (supporting up to 5 stations)

• miniAP easily provisioned (SSID, PWD)

• Fast Wi-Fi re-association after reset

• Secure Firmware and FileSystem updates Over-The-Air (OTA)

• TX power

– 18.3 dBm @ 1 Mbps DSSS

– 13.7 dBm @ 54 Mbps OFDM

• RX sensitivity

– -96.0 dBm @ 1 Mbps DSSS

– -74.5 dBm @ 54 Mbps OFDM

• 21 configurable GPIOs available

• UART and SPI interface to host system

• Advanced low-power modes

– Standby with RTC: 43 µA

– Sleep = 3 mA

– Idle connected (DTIM=1) = 5 mA

– RX traffic 105 mA typical

– TX traffic 260 mA typical @ 10 dBm

• AT command set interface through UART

• SPI interface with simple protocol

• Application subsystem

– Embedded real-time MicroPython environment for customer applications

and on-board development

– MicroPython API library for easy access to Wi-Fi subsystem capabilities

and device peripherals (i.e. UART, SPI, I²C)

• Small form factor: 26.92 x 15.24 x 2.35 mm

Product status link

SPWF04SA, SPWF04SC

Standalone and Serial-to-Wi-Fi b/g/n intelligent modules

SPWF04SA, SPWF04SC

Datasheet

DS11839 - Rev 6 - October 2018

For further information contact your local STMicroelectronics sales office.

www.st.com

• Single voltage supply (3.3 V typical)

• Antenna options: integrated antenna/U.FL connector

• Industrial temperature range: -40 °C to 85 °C

• FCC/CE/IC certified

• RoHS compliant

Applications

• Smart appliances

• Industrial control and data acquisition

• Home automation and security systems

• Wireless sensors

• Cable replacement

• Medical equipment

• Machine-to-machine communication

SPWF04SA, SPWF04SC

DS11839 - Rev 6 page 2/27

1Description

The SPWF04SA and the SPWF04SC are ready-to-use Wi-Fi modules conceived for Internet of Things (IoT)

applications. These modules integrate a Cortex-M4-based STM32 microcontroller and a powerful Wi-Fi

transceiver, compliant with IEEE 802.11 b/g/n standard for the 2.4 GHz band.

The modules are cloud compatible thanks to the complete protocol package, which includes application and

security layers. They can operate in serial-to-Wi-Fi and standalone mode, with customer applications developed

in the subsystem based on the MicroPython environment.

The modules are configured around a single-chip 802.11 transceiver with integrated PA and comprehensive

power management subsystem, and an STM32F4 microcontroller with UART/SPI interface and an extensive

GPIO suite; they also incorporate timing clocks and a voltage regulator.

The SPWF04SA module is configured with a highly-efficient, embedded micro 2.4 GHz ISM band antenna, or with

an external U.FL antenna connector (SPWF04SC); both are certified FCC/IC and CE.

With low power consumption and an ultra-compact (2.7 x 1.5 cm) footprint, the modules are ideal for fixed and

mobile wireless applications, as well as challenging battery-operated applications.

The SPWF04Sx parts are released with an integrated full featured TCP/IP protocol stack with added web server

and additional application service capabilities, including REST API for accessing files on servers in the cloud and

support for dynamic web pages with SSI functions to easily interact with the module and the host processor over

the air. Application note AN4965 on www.st.com provides details on HTTP server capabilities.

Multiple higher level protocols over TCP are supported by the module including: HTTP, MQTT, SMTP, and

WebSockets to easily connect application to the cloud. Multiple protocols supported over UDP include: TFTP,

SNTP and mDNS; the module also includes IPv6 networking capabilities.

The SW package also has an AT command layer interface for user-friendly access to the stack functionalities via

the UART serial port and an SPI interface supporting master and slave messages from and to the host processor

respectively (see user manual UM2114 on www.st.com).

The SPWF04Sx includes a MicroPython scripting engine to enable simple and fast custom application

development on the module MCU: no external MCU is needed and the customer application runs directly on the

module. The interpreter implementation is fully compatible with the standard MicroPython version 1.6. In

standalone mode, MicroPython use Wi-Fi interfaces and MCU peripherals such as UART, SPI, I2C, GPIOs via

standard MicroPython APIs (see application note AN4964 on www.st.com).

1 MB of the internal Flash is dedicated to store the user file system while a hardware interface allows the usage of

an external memory via SPI/SDIO (Serial Flash/SD Card) to further extend the file system storage capabilities.

The module supports WPA2-Personal and WPA2-Enterprise security and WPS (Wi-Fi protected setup).

For secure end-to-end communication with the cloud, an SSL/TLS stack is embedded in every module, with no

licensing charge. See application note AN4963 on www.st.com for details on security.

The module firmware may be updated at any time via UART and over-the-air (FOTA); the FOTA operation can be

performed with different level of security, as described in AN4963.

ST may update the module firmware at any time; check regularly for documentation and firmware updates on

www.st.com/wifimodules.

SPWF04SA, SPWF04SC

Description

DS11839 - Rev 6 page 3/27

2Schematic diagram

Figure 1. SPWF04S block diagram

STM32F4

120 MHZ

Flash: 2 MB

RAM: 256 kB C

38 MHz

UART/SPI

GPIOs/Peripherals

3.3 V

CW1100

b/g/n

Integrated

Filter

Tx /Rx

Switch

Ext. Serial Memory

Boot0

Reset

SPWF04SA, SPWF04SC

Schematic diagram

DS11839 - Rev 6 page 4/27

3General electrical specifications

Table 1. Absolute maximum ratings

Rating Min. Typ. Max. Unit

Voltage supply -0.3 - 4.0 V

Vin for 5 V tolerant pins -0.3 - 5.5 V

Vin for all other pins -0.3 - 3.6 V

Storage temperature range -55 - 105 °C

Table 2. Operating conditions and input power specifications

Parameter Test conditions Min. Typ. Max. Unit

Operating temperature range Industrial -40 85 °C

3.3 V supply

Input supply voltage 3.3 V supply input 3.1 3.3 3.6 V

Standby Both the STM32 and the radio are

in standby power states 43 µA

Sleep

The STM32 is in stop power state

and the radio is in sleep power

state

3 mA

Low power state The STM32 is active and the radio

is in sleep power state 33 mA

TX (@ max power)

802.11b 1 Mbps DSSS 360 mA

802.11g

6 Mbps 350 mA

54 Mbps 290 mA

802.11n

MCS0 350 mA

MCS7 280 mA

802.11b 105 mA

802.11g 105 mA

802.11n 105 mA

Note: Measure preformed at Ta = 25 °C, VDD = 3.3 V on channel 1.

SPWF04SA, SPWF04SC

General electrical specifications

DS11839 - Rev 6 page 5/27

4Digital interface specifications

Table 3. Digital interface specifications, I/O pins

Parameter Test conditions Min. Typ. Max. Unit

Inputs

VIH 2.3

3.6 V

VIL 0 0.9 V

Outputs

VOH IOH=4 mA 2.4 3.6 V

VOL IOL=4 mA 0 0.4 V

SPWF04SA, SPWF04SC

Digital interface specifications

DS11839 - Rev 6 page 6/27

5RF characteristics

Table 4. RF characteristics

Parameter Test conditions Value Unit

RX sensitivity (1)

11b, 1 Mbps -96 dBm

11b, 2 Mbps -93 dBm

11b, 5.5 Mbps -91 dBm

11b, 11 Mbps -87 dBm

11g, 9 Mbps -89.5 dBm

11g, 18 Mbps -86 dBm

11g, 36 Mbps -80 dBm

11g, 54 Mbps -74.5 dBm

11n, MCS1, 13 Mbps -86.5 dBm

11n, MCS3, 26 Mbps -81.5 dBm

11n, MCS5, 52 Mbps -74 dBm

11n, MCS7, 65 Mbps -71 dBm

Channel-to-channel de-

sensitivity CH1 to 14 11g, 54 Mbps, 10%PER 1 dB

Maximum input signal CH7 11g, 54 Mbps -20 dBm

Adjacent channel rejection

11 Mbps 38 dBc

9 Mbps 20 dBc

54 Mbps 4 dBc

MCS1 24 dBc

MCS7 3 dBc

Max TX output power (1)

11b, 1 Mbps

@ 11b spectral mask

18.3 dBm

11b, 11 Mbps 18.3 dBm

11g, 9 Mbps @ 11g spectral mask 18.3 dBm

11g, 54 Mbps EVM = -27 dB, 4.5% 13.7 dBm

11n, MCS0 @ 11n spectral mask 18.3 dBm

11n, MCS7 EVM = -27 dB 13.5 dBm

On-board antenna gain Average -1.2 dBi

1. Output power and sensitivities are measured with a 50 Ω connection at the antenna port.

SPWF04SA, SPWF04SC

RF characteristics

DS11839 - Rev 6 page 7/27

6Pinout description

Table 5. Pinout description

Signal name Type Pin number Function Notes

GPIOs - general purpose input/output

GPIO[0] – GPIO[18] I/O See for corresponding pin numbers, main and alternate functionsSection 6

Host interface (1)

RXD/MOSI I 8 5 V tolerant

TXD/MISO O 6 5 V tolerant

CTS/nCS I 9 Active low, 5 V tolerant

RTS/CLK O 10 5 V tolerant

Reset (2)

RESETn I 3 Reset input Active low for 5 ms with pull-up to 3.3

VDC. Not 5 V tolerant

Bootloader

BOOT0 I 2 Boot loader (3)

External memory interface (4)

SDIO CLK / SPI CLK 31

SDIO D0 / SPI MISO 32

SDIO CMD / SPI MOSI 33

Other pins

VCC (3.3 V) 24 Voltage supply Decouple with 10 µF capacitor

Ground 23 Ground

Ground Paddle 25 Ground Add plenty of Ground vias for thermal

dissipation and ground

GPIO19 / LSE (5) 34

GPIO20 / HSE(5) 35

SWD I/O 26

SWD CLK 29

1. See Section 6 Pinout description for a UART and SPI selection modes and interface details.

2. In order to recover from unexpected behavior, the HOST processor, when connected, could conveniently control the

RESETn pin of the module.

3. To enable the firmware download, pin BOOT0 needs to be high during power-up. RESETn needs to be pulled low at least 5

ms to initiate the firmware download sequence.

4. Automatic detection via the configuration variable ext_volume.

5. Reserved for future usage.

Table 6. GPIOs main and alternate functions

Signal name Pin n° Main function (1)

Alternate function

Electrical

notes

System function (2) Peripheral

driver (3)

MicroPython

Interfaces (4)

GPIO[0] 16 General Purpose input/

output

Restore to factory

setting (5) ADC Input pull-down

and 5 V tolerant

SPWF04SA, SPWF04SC

Pinout description

DS11839 - Rev 6 page 8/27

Signal name Pin n° Main function (1)

Alternate function

Electrical

notes

System function (2) Peripheral

driver (3)

MicroPython

Interfaces (4)

GPIO[1] 17 General purpose input/

output ADC Input pull-down

and 5 V tolerant

GPIO[2] 19 General purpose input/

output PWM TX UART Floating and 5 V

tolerant

GPIO[3] 1 General purpose input/

output

Ext memory:

SPI_nCS

Input pull down

and 5 V tolerant

GPIO[4] 18 General purpose input/

output PWM I2C SDA

GPIO[5] 20 General purpose input/

output I2C SCL

GPIO[6] 22 General purpose input/

output

Wake-up sleep

inhibit (6)

Input pull-down

and 5 V tolerant

GPIO[7] 13

MiniAP: general purpose

input/output; STA: WPS

PushButton

STA/MiniAP switch

(startup) (7) RTS UART

GPIO[8] 4 General purpose input/

output

MicroPython

selection mode (8)

GPIO[9] 7 General purpose input/

output

SPI HOST interface:

SPI nHostInterrupt

(9)

GPIO[10] 5 General purpose input/

output

LED drive: module

running (10)

GPIO[11] 11 General purpose input/

output RX UART

GPIO[12] 12 General purpose input/

output CTS UART

GPIO[13] 15 LED drive: Wi-Fi link-up MISO SPI

GPIO[14] 14 LED Drive: power-up MOSI SPI

GPIO[15] 21 General purpose input/

output DAC SCK SPI

GPIO[16] 27 General Purpose input/

output ADC

GPIO[17] 28 General purpose input/

output

GPIO[18] 30 General purpose input/

output

1. Main function is set at the module initialization when "factory" configuration is used. The GPIOs are all set as input pull-

down with the exception of GPIO7 that is set as input pull-up.

2. Alternate System Functions are activated when the related pin is connected or when the command/specific configuration is

used.

3. Alternate Peripheral Drivers are activated when the corresponding peripheral command is used.

4. Alternate MicroPython Functions are activated when the related class is initialized.

5. To perform the restore of the factory variable set, the pin GPIO0 must be high during power-up.

6. This alternate function is running when low power mode variable is enabled. Ext. RC is suggested in order to stabilize the

signal. The value is high to wakeup the module.

7. To enable the STA or MiniAP switch, the GPIO[7] needs to be low together with the HW reset. GPIO7 is set by default as

input pull-up. WPS push button function is enabled if this pin is set to low during active phase.

8. When this GPIO is high at the start-up the module enters the MicroPython mode.

9. To select the SPI as host interface, this GPIO must be driven high at the reset time.

SPWF04SA, SPWF04SC

Pinout description

DS11839 - Rev 6 page 9/27

10. Selected by using the configuration variable Blink_led.

Note: Use an external pull up/pull down connected to a given GPIO to prevent unwanted behavior.

SPWF04SA, SPWF04SC

Pinout description

DS11839 - Rev 6 page 10/27

7Host interfaces

The SPWF04S supports UART and SPI interfaces to connect the module with a host processor. The pins to be

used in the two possible configurations are indicated in the Table 5. Pinout description. By default, the SPWF04S

works using the UART port with AT commands. To switch SPI on, the pin corresponding to GPIO[9] must be

driven high during boot to force the device to handle incoming commands over SPI instead of UART.

7.1 UART interface

The SPWF04S can be interfaced with an external host using the UART interface shown in Figure 2. UART

connection with host device. This configuration is used by default, with four signals including RTS and CTS for

HW flow control. The UART baud rate is configurable in the 1200-921600 range. The default configuration is

115200/8/n/1 with flow control disabled.

Figure 2. UART connection with host device

7.2 SPI interface

The SPWF04S can be interfaced as a slave with an external host by using the SPI interface as shown in

Figure 3. SPI connection with host device. There are four SPI signals and an additional host interrupt signal. SPI

signals are detailed in the Table 7. SPI signals. This interrupt signal allows the SPI slave to alert the SPI master

that it has data to send. In turn, the SPI master needs to assert the GPIO connected to the SPWF04S chip select

and to start the CLK signal to send data to the slave.

SPWF04SA, SPWF04SC

Host interfaces

DS11839 - Rev 6 page 11/27

Figure 3. SPI connection with host device

Table 7. SPI signals

SPWF04S signal name Description

RTS/Clk Clock (up to 22 MHz) from MCU to SPWF04S

CTS/nCS Active low indicates the selection of the slave before a data

transmission from the master

GPIO[9] (nHostInt) nHostInt. Interrupt sent from the SPWF04S to the host to

indicate the transmission of data from the slave

RXD/MOSI Data from Host to SPWF04S

TXD/MISO Data from SPWF04S to the Host

The host SPI can work up to the speed of 22 MHz. The communication between host and the SPWF04S is

handled in half duplex.

Data is transmitted and received with the most significant bit first (SPI mode 0). That means the clock polarity

(CPOL) and the clk phase (CPHA) used to configure SPI are both set to zero. The mode 0 is commonly used as

default for microcontrollers.

Figures from Figure 4. Single 1 byte transaction to Figure 6. RX master transaction detail the signaling over the

SPI. In particular, Figure 4. Single 1 byte transaction shows a single 1-byte transaction in mode 0. Tlead should be

at least half a clock cycle long, and so its value depends on the host clock frequency. SPI data is latched by the

master and slave using the CLK signal. So, when data needs to be transferred, the MISO and MOSI signals

change between each clock. After each single request sent from master to the slave, the master MUST waits for a

confirmation message sent from the slave. The message is notified to the master using the nHost Irq. All the data

transferred in both directions are packed using a well-defined packet format described in the user manual.

Figure 4. Single 1 byte transaction

SPWF04SA, SPWF04SC

SPI interface

DS11839 - Rev 6 page 12/27

The Figure 5. TX master transaction and Figure 6. RX master transaction show a Mmaster TX transaction and a

master RX transaction, respectively. The communication starts with the host sending the write SYNC word (0x02),

followed by header information, and then payload, when applicable. Once the command has been analyzed by

the device, it asserts the IRQ interrupt line. Then the host detects the interrupts and then writes the read SYNC

word (0x02) and starts to generate the clock. The device then clears the interrupt line and prepares the response.

The host then reads continuously until the SYNC pattern is detected. All data until that point is discarded. The

SYNC word is then followed by headers and then payload, when applicable.

Figure 5. TX master transaction

Figure 6. RX master transaction

SPWF04SA, SPWF04SC

SPI interface

DS11839 - Rev 6 page 13/27

8Package information

In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK®

packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions

and product status are available at: www.st.com. ECOPACK® is an ST trademark.

Figure 7. Module dimensions

GSPG1909161035SG

Note: An antenna area of 217 x 520 mils must be free of any ground metalization or traces under the unit. The

area extending away from the antenna should be free from metal on the PCB and housing to meet expected

performance levels. Pin 25 is the required paddle ground and is not shown in this diagram.

SPWF04SA, SPWF04SC

Package information

DS11839 - Rev 6 page 14/27

Figure 8. Module footprint

Note: PCB design requires a detailed review of the center exposed pad. This pad requires good thermal

conductivity. Soldering coverage should be maximized and checked via x-ray for proper design. There is a trade-

off between providing enough soldering for conductivity and applying too much, which allows the module to "float"

on the paddle creating reliability issues. ST recommends two approaches, a large center via that allows excess

solder to flow down into the host PCB with smaller vias around it, or many smaller vias with just enough space for

the viscosity of the chosen solder/flux to allow some solder to flow into the smaller vias.

Either of these approaches must result in 60% or more full contact solder coverage on the paddle after reflow. ST

strongly encourages PCB layout teams to work with their EMS providers to ensure vias and solder paste designs

that will result in satisfactory performance.

SPWF04SA, SPWF04SC

Package information

DS11839 - Rev 6 page 15/27

9Module reflow

The SPWF04SA and SPWF04SC are surface mount modules with a 6-layer PCB. The recommended final

assembly reflow profiles are indicated below.

The soldering phase must be executed with care: in order to prevent an undesired melting phenomenon,

particular attention must be paid to the setup of the peak temperature.

The following are some suggestions for the temperature profile based on the IPC/JEDEC J- STD-020C, July 2004

recommendations.

Table 8. Soldering values

Profile feature PB-free assembly

Average ramp-up rate (TSMA X to TP)3 °C/s max.

Preheat:

Temperature min. (Ts min.)

Temperature max. (Ts max.)

Time (Ts min. to Ts max.) (ts)

150 °C

200 °C

60 - 100 s

Critical zone:

Temperature TL

Time TL

217 °C

60 - 70 s

Peak temperature (TP)240 + 0 °C

Time within 5 °C of actual peak temperature (TP)10 - 20 s

Ramp-down rate 6 °C/s

Time from 25 °C to peak temperature 8 minutes max.

Figure 9. Soldering profile

AM17477v1

SPWF04SA, SPWF04SC

Module reflow

DS11839 - Rev 6 page 16/27

10 Regulatory compliance

10.1 RoHS compliance

In order to meet environmental requirements, ST defines different grades of ECOPACK® packages, depending

on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are

available at: www.st.com.

ECOPACK® is an ST trademark.

The SPWF04S modules comply with the ECOPACK2 level of RoHS compliance grade.

The material declaration file is available at: www.st.com.

10.2 RF certifications

The RF certifications obtained for the SPWF04S modules are summarized below.

Table 9. RF certification summary

Directives Id Certified rules and STD Notes

FCC S9NSPWFS04 FCC part 15

ID that applies to the version SPWF04SA

and SPWF04SC when this is used with the

antennas specified in the Table 8. Soldering

values. Both versions are modular approved

in the meaning defined by FCC

IC 8976C-SPWFS04 IC RSS-247

ID that applies to the version SPWF04SA

and SPWF04SC when this is used with the

antennas specified in the Table 8. Soldering

values. Both versions are modular approved

in the meaning defined by IC

ETSI Compliant

• EN301 489-17 V3.1.1 (2017-02)

• EN 201 489-1 V2.1.1 (2017-02)

• EN 60950-1:2006 + A11:2009 +

A12:2011 + A1:2010 + A2:2013 +

AC:2011

• EN 62479:2010

• EN 300 328 V2.1.1 (2016-11)

ID that applies to the version SPWF04SA

and SPWF04SC when this is used with the

antennas specified in the Table 8. Soldering

values

The certifications of the version SPWF04SC that has an integrated U.FL connector applies when the module is

connected with the antenna specified in the Table 8. Soldering values.

SPWF04SA, SPWF04SC

Regulatory compliance

DS11839 - Rev 6 page 17/27

Table 10. Antennas used for certification of SPWF04SC

Product name

Titanis 2.4 GHz

Article n.

2010B4844-01 (standard)

2010B6090-01 (reverse thread)

Frequency 2.4 - 2.5 GHz

Polarization Linear

Operating temperature -40 to +85 degC

Impedance 50 Ω

Weight 7.4 g

Antenna type Swivel

10.2.1 FCC and IC

The device SPWF04S has been tested and complies with the FCC part 15 and IC RSS-247 regulations. These

limits are designed to provide reasonable protection against harmful interference in approved installations. This

equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance

with the instructions, may cause harmful interference to radio communications.

However, there is no guarantee that interference will not occur in a particular installation. This device complies

with part 15 of the FCC rules. Operation is subject to the following two conditions:

• The device must not cause harmful interference.

• The device must accept any interference received, including interference that may cause undesired

operation.

Modifications or changes to this equipment not expressly approved by the party responsible for compliance may

render void the user's authority to operate this equipment.

The module has been approved by Industry Canada to operate with the antenna type listed in Table 10. Antennas

used for certification of SPWF04SC with the maximum possible gain there indicated. Antenna types not included

in Table 10. Antennas used for certification of SPWF04SC and that have a gain greater than the maximum gain

indicated for that type in the Table 11. Titanis antenna characteristics, are strictly prohibited for use with this

module.

Table 11. Titanis antenna characteristics

Characteristics

Conditions (1)

Min. Typ. Max.

Peak gain 4.0 dBi 4.1 dBi 4.4 dBi

Frequency 2.4 – 2.5 GHz, measured in 3D chamber (near field)

Efficiency 80% 85% 90%

VSWR 1.1:1 1.2:1 1.3:1 Frequency 2.4 – 2.5 GHz, measured in network analyzer

1. Note all data provided in this table are based on the Antenova reference board.

The safe user distance, for RF exposure, is ≥ 50 mm (in compliance with 447498 D01 General RF Exposure

Guidance v06 and RSS-102 issue 5).

Modular approval, FCC and IC

• FCC ID: S9NSPWFS04

• IC: 8976C-SPWFS04

In accordance with FCC part 15, the modules SPWF04SA and SPWF04SC are listed above as a modular

transmitter device.

SPWF04SA, SPWF04SC

RF certifications

DS11839 - Rev 6 page 18/27

Labeling instructions

When integrating the SPWF04SA and SPWF04SC into the final product, it must be ensured that the FCC labeling

requirements specified below are satisfied. Based on the Public Notice from FCC, the product into which the ST

transmitter module is installed must display a label referring to the enclosed module. The label should use

wording like the following:

Contains Transmitter Module

• FCC ID: S9NSPWFS04

• IC: 8976C-SPWFS04

Any similar wording that expresses the same meaning may also be used.

10.2.2 CE

This module complies with the following European EMI/EMC and safety directives and standards:

• EN 301 489-17 V3.1.1 (2017-02)

• EN 301 489-1 V2.1.1 (2017-02)

• EN 60950-1:2006 + A11:2009 + A1:2010 + A12:2011 + A2:2013

• EN 62479:2010

• EN 300 328 V2.1.1 (2016-11)

The module is provided by CE marking:

Figure 10. CE label

For additional information please refer to:

• STMicroelectronics Via C. Olivetti , 2 Agrate Brianza 20864 (ITALY)

The SPWF04SA / (SPWF04SC) module current production firmware release is:

• 1.x

(If needed, for module firmware update please refer to www.st.com)

SPWF04SA, SPWF04SC

RF certifications

DS11839 - Rev 6 page 19/27

11 Module marking and traceability

The SPWF04Sx top-side contains the following information:

• CE label printed on the shield

Figure 11. SPWF04SA front side

The SPWF04x bottom-side contains the following information:

• Model number indicating the RF module family: SPWF04Sx

• FCC USA certification number: FCC ID: S9NSPWFS04

• IC Canada certification number: IC: 8976C-SPWFS04

• 2D laser data matrix

Figure 12. SPWF04SA bottom-side

The 2D data matrix laser marked stores a serial number codified in the following format: WW YY K PP NNN,

where:

• WW - week

• YY - year

• K - product ID (refer to the table below)

• PP - internal ST use only

• NNN - internal ST use only

Table 12. Module product ID

KProduct family identification

< SPWF04SA

> SPWF04SC

SPWF04SA, SPWF04SC

Module marking and traceability

DS11839 - Rev 6 page 20/27

Every module is completely traceable thanks to the following applied rules:

• Each module bulk package is identified by a bulk ID

• The bulk ID and module 2D data matrix are linked by a reciprocal traceability link

• The module 2D data matrix traces the lot number of any raw material used

SPWF04SA, SPWF04SC

Module marking and traceability

DS11839 - Rev 6 page 21/27

12 Ordering information

Table 13. Ordering information

Order codes Description

SPWF04SA Wi-Fi module with integrated antenna and protocol stack

SPWF04SC Wi-Fi module with integrated U.FL connector and protocol stack

Note: Refer to the UM2114 for a complete list of stack features and commands.

SPWF04SA, SPWF04SC

Ordering information

DS11839 - Rev 6 page 22/27

Revision history

Table 14. Document revision history

Date Revision Changes

04-Oct-2016 1 Initial release.

10-Feb-2017 2 Updated features and description on the cover page. Added Section

12: "Module marking and traceability".

03-Mar-2017 3 Updated Figure 9: "Module footprint".

28-Apr-2017 4 Datasheet status promoted from preliminary data to production data.

14-Nov-2017 5

Updated Section "Features".

Updated Table 5: "Pinout description" and Table 6:

"GPIOs main and alternate functions".

Updated Figure 4: "Single 1 byte transaction" and

Figure 5: "TX master transaction".

Updated Table 9: "RF certification summary".

Updated Section 11.2.2: "CE".

Minor text changes.

05-Oct-2018 6 Updated Table 6. GPIOs main and alternate functions,

Figure 8. Module footprint.

SPWF04SA, SPWF04SC

DS11839 - Rev 6 page 23/27

Contents

1Description ........................................................................3

2Schematic diagram ................................................................4

3General electrical specifications ...................................................5

4Digital interface specifications .....................................................6

5RF characteristics .................................................................7

6Pinout description .................................................................8

7Host interfaces ...................................................................11

7.1 UART interface ...............................................................11

7.2 SPI interface .................................................................11

8Mechanical dimensions...........................................................14

9Module reflow ....................................................................16

10 Regulatory compliance ...........................................................17

10.1 RoHS compliance .............................................................17

10.2 RF certifications...............................................................17

10.2.1 FCC and IC............................................................18

10.2.2 CE...................................................................19

11 Module marking and traceability ..................................................20

12 Ordering information .............................................................22

Revision history .......................................................................23

SPWF04SA, SPWF04SC

Contents

DS11839 - Rev 6 page 24/27

List of tables

Table 1. Absolute maximum ratings .............................................................5

Table 2. Operating conditions and input power specifications ............................................5

Table 3. Digital interface specifications, I/O pins .....................................................6

Table 4. RF characteristics ...................................................................7

Table 5. Pinout description ...................................................................8

Table 6. GPIOs main and alternate functions .......................................................8

Table 7. SPI signals ....................................................................... 12

Table 8. Soldering values ................................................................... 16

Table 9. RF certification summary ............................................................. 17

Table 10. Antennas used for certification of SPWF04SC ............................................... 18

Table 11. Titanis antenna characteristics.......................................................... 18

Table 12. Module product ID .................................................................. 20

Table 13. Ordering information................................................................. 22

Table 14. Document revision history ............................................................. 23

SPWF04SA, SPWF04SC

List of tables

DS11839 - Rev 6 page 25/27

List of figures

Figure 1. SPWF04S block diagram .............................................................4

Figure 2. UART connection with host device ..................................................... 11

Figure 3. SPI connection with host device ....................................................... 12

Figure 4. Single 1 byte transaction ............................................................ 12

Figure 5. TX master transaction .............................................................. 13

Figure 6. RX master transaction .............................................................. 13

Figure 7. Module dimensions ................................................................ 14

Figure 8. Module footprint .................................................................. 15

Figure 9. Soldering profile .................................................................. 16

Figure 10. CE label ....................................................................... 19

Figure 11. SPWF04SA front side .............................................................. 20

Figure 12. SPWF04SA bottom-side ............................................................ 20

SPWF04SA, SPWF04SC

List of figures

DS11839 - Rev 6 page 26/27

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