A1304ELHLX-05-T - ALLEGRO MICROSYSTEMS

New applications for linear output Hall-effect sensors require

medium accuracy and smaller package size. The Allegro A1304

linear Hall-effect sensor IC has been designed specifically to

achieve both goals. This temperature-stable device is available

in a miniature surface mount package (SOT23-W).

This ratiometric Hall-effect sensor provides a voltage output

that is proportional to the applied magnetic field and features

a quiescent voltage output of 50% of the supply voltage.

Each BiCMOS monolithic circuit integrates a Hall element,

offset and sensitivity trim circuitry to correct for the variation

in the Hall element, a small-signal high-gain amplifier, and a

proprietary dynamic offset cancellation technique.

The A1304 sensor IC is available in a 3-pin surface mount

SOT-23W style package (LH suffix). The package is lead (Pb)

free, with 100% matte tin leadframe plating.

A1304-DS, Rev. 3

MCO-0000508

Linear Hall-Effect Sensor IC with Analog Output,

Available in a Miniature, Low-Profile Surface Mount Package

Package: 3-Pin Surface Mount SOT23-W

(suffix LH)

Functional Block Diagram

A1304

V+

OffsetSensitivity

Dynamic Offset

Cancellation

Tuned Filter

Trim Control

VCC

CBYPASS

GND

VOUT

Approximate footprint

Not to scale

• 3.3 V supply operation

• Allegro factory-programmed offset and sensitivity

• Miniature package

• High-bandwidth, low-noise analog output

• High-speed chopping scheme minimizes QVO drift

across operating temperature range

• Temperature-stable quiescent voltage output and

sensitivity

• Precise recoverability after temperature cycling

• Wide ambient temperature range: –40°C to 85°C

• Immune to mechanical stress

FEATURES AND BENEFITS DESCRIPTION

September 30, 2019

Linear Hall-Effect Sensor IC with Analog Output,

Available in a Miniature, Low-Profile Surface Mount Package

A1304

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

SELECTION GUIDE

Part Number Sensitivity

(typ)(mV/G) Packing* Package

A1304ELHLX-T 4.0 10,000 pieces per reel 3-pin SOT-23W surface mount

A1304ELHLX-05-T 0.5 10,000 pieces per reel 3-pin SOT-23W surface mount

*Contact Allegro™ for additional packing options

ABSOLUTE MAXIMUM RATINGS

Characteristic Symbol Notes Rating Unit

Forward Supply Voltage VCC 5.5 V

Reverse Supply Voltage VRCC –0.1 V

Forward Output Voltage VOUT For IOUT < IOUT(SINK) 7 V

Reverse Output Voltage VROUT –0.1 V

Output Source Current IOUT(SOURCE) VOUT to GND 1 mA

Output Sink Current IOUT(SINK) VCC to VOUT 5 mA

Operating Ambient Temperature TARange E –40 to 85 °C

Maximum Junction Temperature TJ(max) 165 °C

Storage Temperature Tstg –65 to 170 °C

THERMAL CHARACTERISTICS: May require derating at maximum conditions; see application information

Characteristic Symbol Test Conditions* Value Units

Package Thermal Resistance RθJA

Package LH, 1-layer PCB with copper limited to solder pads 228 °C/W

Package LH, 2-layer PCB with 0.463 in.

2 of copper area each side

connected by thermal vias 110 °C/W

*Additional thermal information available on the Allegro website

LH Package, 3-Pin SOT23-W Pinout Diagram

PINOUT DRAWING AND TERMINAL LIST

Terminal List Table

Name Number Description

VCC 1 Input power supply; tie to GND with bypass

capacitor

VOUT 2 Output signal

GND 3 Ground

Linear Hall-Effect Sensor IC with Analog Output,

Available in a Miniature, Low-Profile Surface Mount Package

A1304

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

Characteristic Symbol Test Conditions Min. Typ. Max. Unit [1]

ELECTRICAL CHARACTERISTICS

Supply Voltage VCC 3 – 3.6 V

Supply Current ICC No load on VOUT – 7.7 9 mA

Power-On Time [2][3] tPO TA = 25°C, CL = 10 nF – 50 70 µs

VCC Ramp Time [2][3] tVCC TA = 25°C 0.005 – 100 ms

VCC Off Level [2][3] VCCOFF TA = 25°C 0 – 0.33 V

Internal Bandwidth [3] BWiSmall signal –3 dB – 20 – kHz

OUTPUT CHARACTERISTICS

Output Referred Noise [3] VN

A1304ELHLX-T TA = 25°C; CBYPASS =

open; no load on VOUT

– 13 – mV(p–p)

A1304ELHLX-05-T – 13 – mV(p–p)

Input Referred RMS Noise Density [3] VNRMS

A1304ELHLX-T TA = 25°C; CBYPASS =

open; no load on VOUT;

f << BWi

– 2.3 – mG / √Hz

A1304ELHLX-05-T – 4.6 – mG / √Hz

DC Output Resistance [3] ROUT –< 1 –Ω

Output Load Resistance [3] RLVOUT to GND 4.7 – – kΩ

Output Load Capacitance [3] CLVOUT to GND – – 10 nF

Saturation Voltage [3] VSAT(HIGH) TA = 25°C, RL = 10 kΩ, (VOUT to GND) 2.87 – – V

VSAT(LOW) TA = 25°C, RL = 10 kΩ, (VOUT to GND) – – 0.38 V

MAGNETIC CHARACTERISTICS

Sensitivity [4] Sens A1304ELHLX-T TA = 25°C 3.76 4.0 4.24 mV/G

A1304ELHLX-05-T 0.2 0.5 0.8 mV/G

Sensitivity Temperature Coefficient [3] TCSens TA = 85°C, relative to Sens at 25°C 0.04 0.12 0.2 % / °C

Quiescent Voltage Output (QVO) VOUT(Q) TA = 25°C, B = 0 G 1.625 1.65 1.675 V

Delta QVO ∆VOUT(Q)

A1304ELHLX-T TA = 85°C, relative to

QVO at 25°C

– ±40 – mV

A1304ELHLX-05-T – ±40 – mV

Ratiometry Quiescent Voltage

Output Error RatVOUT(Q)

Across specified supply voltage range (relative

to VCC = 3.3 V) – ±1.5 – %

Ratiometry Sensitivity Error RatSens

Across specified supply voltage range (relative

to VCC = 3.3 V) – ±1.5 – %

Linearity Sensitivity Error LinERR

A1304ELHLX-T Typ. Sensitivity, ±300 G – ±1.5 – %

A1304ELHLX-05-T Typ. Sensitivity, ±2250 G – ±1.5 – %

Sensitivity Drift Due to

Package Hysteresis ∆SensPKG TA = 25°C, after temperature cycling – ±2 – %

Magnetic Field Range B A1304ELHLX-T Range of Input Field – ±375 – G

A1304ELHLX-05-T – ±3000 – G

[1] 1 gauss (G) is exactly equal to 0.1 millitesla (mT).

[2] See Characteristic Definitions section.

[3] Based on design simulations and/or characterization data. Not tested at Allegro end-of-line.

[4] Sensitivity drift through the life of the part, ΔSensLIFE , can have a typical error value ±3% in addition to package hysteresis effects.

OPERATING CHARACTERISTICS: Valid across TA, CBYPASS = 0.1 µF, VCC = 3.3 V, unless otherwise noted

Linear Hall-Effect Sensor IC with Analog Output,

Available in a Miniature, Low-Profile Surface Mount Package

A1304

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

CHARACTERISTIC DEFINITIONS

Power-On Time. When the supply is ramped to its operating

voltage, the device output requires a finite time to react to an

input magnetic field. Power-On Time, tPO , is defined as the time

it takes for the output voltage to begin responding to an applied

magnetic field after the power supply has reached its minimum

specified operating voltage, VCC(min), as shown in Figure 1.

Quiescent Voltage Output. In the quiescent state (no signifi-

cant magnetic field: B = 0 G), the output, VOUT(Q), is at a con-

stant ratio to the supply voltage, VCC, across the entire operating

ranges of VCC and Operating Ambient Temperature, TA.

Quiescent Voltage Output Drift Across Temperature

Range. Due to internal component tolerances and thermal

considerations, the Quiescent Voltage Output, VOUT(Q), may

drift due to temperature changes within the Operating Ambient

Temperature, TA. For purposes of specification, the Quiescent

Voltage Output Drift Across Temperature Range, ∆VOUT(Q) (mV),

is defined as:

∆VOUT(Q) VOUT(Q)(TA) –VOUT(Q)(25°C)

=(1)

Sensitivity. The amount of the output voltage change is propor-

tional to the magnitude and polarity of the magnetic field applied.

This proportionality is specified as the magnetic sensitivity,

Sens (mV/G), of the device and is defined as:

OUT(B+)

– V

OUT(B–)

(B+) – (B–)

Sens =(2)

where B+ is the magnetic flux density in a positive field (south

polarity) and B– is the magnetic flux density in a negative field

(north polarity).

Sensitivity Temperature Coefficient. The device sensitivity

changes as temperature changes, with respect to its Sensitivity

Temperature Coefficient, TCSENS. TCSENS is defined as:

SensT2 – SensT1

SensT1 T2–T1

TCSens =×

100 (%/°C)

























(3)

where T1 is the baseline Sens programming temperature of 25°C,

and T2 is the sensitivity at another temperature.

The ideal value of Sens across the full ambient temperature

range, SensIDEAL(TA), is defined as:

SensT1 × [100 (%) + TCSENS (TA –T1

)]

SensIDEAL(TA) =(4)

Linearity Sensitivity Error. The A1304 is designed to provide

linear output in response to a ramping applied magnetic field.

Consider two magnetic fields, B1 and B2. Ideally, the sensitivity

of a device is the same for both fields, for a given supply voltage

and temperature. Linearity error is present when there is a differ-

ence between the sensitivities measured at B1 and B2.

Linearity Sensitivity Error, LINERR , is calculated separately for

positive (LinERR+) and negative (LinERR– ) applied magnetic

fields. LINERR (%) is measured and defined as:

Sens(B+)(2)

Sens(B+)(1)

Sens(B–)(2)

Sens(B–)(1)

1–

LinERR+ =×

100 (%)













1–

LinERR–=













(5)

where:

|VOUT(Bx) – VOUT(Q)|

SensBx= (6)

VCC

VCC(min)

VOUT

90% VOUT

t1= time at which power supply reaches

minimum specified operating voltage

t2=

time at which output voltage settles

within ±10% of its steady state value

under an applied magnetic field

t1t2

tPO

(typ)

Figure 1: Def inition of Power-On Time, tPO

Linear Hall-Effect Sensor IC with Analog Output,

Available in a Miniature, Low-Profile Surface Mount Package

A1304

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

and Bx are positive and negative magnetic fields, with respect to

the quiescent voltage output, such that

|B(+)(2)| > |B(+)(1)| and |B(–)(2)| > |B(–)(1)|

The effective linearity error is:

max(|LinERR+| , |LinERR– |)

LinERR =(7)

The saturation of the output at VSAT(HIGH) and VSAT(LOW) will

limit the operating magnetic range of the applied field in which

the device provides a linear output. The maximum positive and

negative applied magnetic fields in the operating range can be

calculated:

VSAT(HIGH) – VOUT(Q)

Sens



BMAX(+)



VOUT(Q) – VSAT(LOW)

Sens



BMAX(–)



=(8)

Ratiometry Error. The A1304 provides ratiometric output.

This means that the Quiescent Voltage Output, VOUT(Q) , and the

magnetic sensitivity, Sens, are proportional to the supply volt-

age, VCC. In other words, when the supply voltage increases

or decreases by a certain percentage, each characteristic also

increases or decreases by the same percentage. Error is the differ-

ence between the measured change in the supply voltage relative

to 3.3 V, and the measured change in each characteristic.

The ratiometric error in quiescent voltage output, RatVOUT(Q) (%),

for a given supply voltage, VCC, is defined as:

VOUT(Q)(VCC) / VOUT(Q)(3.3V)

VCC / 3.3 (V)

1–

RatVOUT(Q) =×

100 (%)













(9)

The ratiometric error in magnetic sensitivity, RatSens (%), for a

given supply voltage, VCC, is defined as:

Sens(VCC) / Sens(3.3V)

VCC / 3.3 (V)

1–

RatSens =×

100 (%)













(10)

VCC Ramp Time. The time taken for VCC to ramp from 0 V to

VCC(typ), 3.3 V (see figure 3).

VCC Off Level. For applications in which the VCC pin of the

A1304 is being power-cycled (for example using a multiplexer

to toggle the part on and off), the specification of VCC Off Level,

VCCOFF , determines how high a VCC off voltage can be tolerated

while still ensuring proper operation and startup of the device

(see Figure 3).

+B–B

VSAT(Low)

VSAT(High)

VOUT(Q)

Output Voltage, VOUT (V)

Appied Magnetic Field Intensity, B (G)

Figure 2: E󰀨ect of Saturation

time

(typ)

CCOFF

tVCC

Supply Voltage, VCC (V)

Figure 3: Def inition of VCC Ramp Time, tVCC

Linear Hall-Effect Sensor IC with Analog Output,

Available in a Miniature, Low-Profile Surface Mount Package

A1304

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

VCC (V)

3.0

2.8

2.6

VCC(min)

VCC rising UVLO Reset

VCC falling UVLO trip

Undervoltage

Lockout

Undervoltage

Lockout

Reduced

perfomance

Reduced

perfomance

VOUT (V)

VCC (V)

VCC / 2

2.8

2.6

VCC rising UVLO Reset

VCC falling UVLO trip

VOUT is near ground

potential when A1304

is in UVLO state

Figure 4: UVLO Operation

Undervoltage Lockout. The A1304 provides an undervoltage

lockout feature which ensures that the device outputs a VOUT

signal only when VCC is above certain thresholds

. The undervolt-

age lockout feature provides a hysteresis of operation to eliminate

indeterminate output states.

The output of the A1304 is held low (GND) until VCC exceeds

the VCC rising UVLO reset threshold. After that , the device

VOUT output is enabled, providing a ratiometric output volt-

age that is proportional to the input magnetic signal and VCC . If

VCC should drop back down below the VCC falling UVLO trip

threshold after the device is powered up, the output would be

pulled low (see Figure 4) until VCC rising UVLO reset threshold

is reached again and VOUT would be reenabled.

Linear Hall-Effect Sensor IC with Analog Output,

Available in a Miniature, Low-Profile Surface Mount Package

A1304

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

A1304

VOUT

GND

0.1

3.3 V µF

VCC

4.7 nF

APPLICATION INFORMATION

Figure 5: Typical Application Circuit

Figure 6: Chopper Stabilization Technique

Chopper Stabilization Technique

When using Hall-effect technology, a limiting factor for

switchpoint accuracy is the small signal voltage developed across

the Hall element. This voltage is disproportionally small relative

to the offset that can be produced at the output of the Hall sensor

IC. This makes it difficult to process the signal while maintain-

ing an accurate, reliable output over the specified operating

temperature and voltage ranges. Chopper stabilization is a unique

approach used to minimize Hall offset on the chip. Allegro

employs a technique to remove key sources of the output drift

induced by thermal and mechanical stresses. This offset reduction

technique is based on a signal modulation-demodulation process.

The undesired offset signal is separated from the magnetic field-

induced signal in the frequency domain, through modulation. The

subsequent demodulation acts as a modulation process for the

offset, causing the magnetic field-induced signal to recover its

original spectrum at base band, while the DC offset becomes a

high-frequency signal. The magnetic-sourced signal then can pass

through a low-pass filter, while the modulated DC offset is sup-

pressed. In addition to the removal of the thermal and mechanical

stress related offset, this novel technique also reduces the amount

of thermal noise in the Hall sensor IC while completely removing

the modulated residue resulting from the chopper operation. The

chopper stabilization technique uses a high frequency sampling

clock. For demodulation process, a sample and hold technique is

used. This high-frequency operation allows a greater sampling

rate, which results in higher accuracy and faster signal-processing

capability. This approach desensitizes the chip to the effects

of thermal and mechanical stresses, and produces devices that

have extremely stable quiescent Hall output voltages and precise

recoverability after temperature cycling. This technique is made

possible through the use of a BiCMOS process, which allows the

use of low-offset, low-noise amplifiers in combination with high-

density logic integration and sample-and-hold circuits.

Amp

Regulator

Clock/Logic

Hall Element

Tuned

Filter

Anti-aliasing

LP Filter

Linear Hall-Effect Sensor IC with Analog Output,

Available in a Miniature, Low-Profile Surface Mount Package

A1304

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

PACKAGE OUTLINE DIAGRAM

For Reference Only – Not for Tooling Use

(Reference DWG-2840)

Dimensions in millimeters–NOT TO SCALE

Dimensions exclusive of mold ﬂash, gate burrs, and dambar protrusions

Exact case and lead conﬁguration at supplier discretion within limits shown

Reference land pattern layout

All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary

to meet application process requirements and PCB layout tolerances

Active Area Depth, 0.28 mm

Hall elements, not to scale

= Last three digits of device part numberN

Standard Branding Reference Vi

NNN

Branding scale and appearance at supplier discretion

Seating Plane

Gauge Plane PCB Layout Reference View

0.55 REF

0.25 BSC

0.95 BSC

0.95

1.00

0.70

2.40

Branded Face

2.90

+0.10

–0.20

4°±4°

8X 10° REF

0.180+0.020

–0.053

0.05 +0.10

–0.05

0.25 MIN

1.91+0.19

–0.06

2.98+0.12

–0.08

1.00 ±0.13

0.40 ±0.10

1.49

0.96

Figure 7: Package LH, 3-Pin (SOT-23W)

Linear Hall-Effect Sensor IC with Analog Output,

Available in a Miniature, Low-Profile Surface Mount Package

A1304

Allegro MicroSystems

955 Perimeter Road

Manchester, NH 03103-3353 U.S.A.

www.allegromicro.com

For the latest version of this document, visit our website:

www.allegromicro.com

Revision History

Number Date Description

– June 16, 2014 Initial Release

1 July 13, 2015 Corrected LH package Active Area Depth value

2 September 18, 2018 Clarified Absolute Maximum Ratings; minor editorial updates

3 September 30, 2019 Minor editorial updates

Allegro MicroSystems reserves the right to make, from time to time, such departures from the detail specifications as may be required to permit

improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the

information being relied upon is current.

Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of

Allegro’s product can reasonably be expected to cause bodily harm.

The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems assumes no responsibility for its use; nor

for any infringement of patents or other rights of third parties which may result from its use.

Copies of this document are considered uncontrolled documents.