4 Am27X020
FUNCTIONAL DESCRIPTION
Read Mode
To obtain data at the device outputs , Chip Enable (CE#)
and Output Enab le (OE#) must be driv en low . CE# con-
trols the po wer to the de vice and is typically used t o se-
lect the device. OE# enab les th e device to output data,
independent of device selection. Addresses must be
stable for at least tACC–tOE. Refer to the Switching
Waveforms section for the timing diag ram.
Standby Mode
The de vice enters the CMOS standby mode when CE#
is at VCC ± 0.3 V. Maximum VCC current is reduced to
100 µA. The device enters the TTL-standby mode
when CE# is at VIH. Maximum VCC current is reduced
to 1.0 mA. When in either standby mode, the device
places its outputs in a high-impedance state, indepen-
dent of the OE# input.
Output OR-Tieing
To accommodate multiple memory connections, a
two-line control function provides:
■Low memory power dissipation, and
■Assurance that outp ut bus contention will not o ccur .
CE# should be decoded and used as the primary de-
vice-selecting funct ion, whi le OE# be made a common
connection to all devices in the array and connected to
the READ line from the system control bus. This as-
sures that all deselected memory devices are in their
low-power standby mode and that the output pins are
only activ e when data is desired fro m a particular mem-
ory device.
System Applications
During the switch between active and standby condi-
tions, transient current peaks are produced on the ris-
ing and f alling edges of Chip Enab le. The magnitu de of
these transient current peaks is dependent on the out-
put capacitance loading of t he device. At a minim um, a
0.1 µF ceramic capacitor (high frequency, low inherent
inductance) should be used on each device between
VCC and VSS to minimize transient effects. In addition,
to overcome the voltage drop caused by the inductive
effects of the printed circuit board traces on Express-
ROM de vi ce arrays, a 4.7 µF bulk electr olytic capacitor
should be used between VCC and VSS for each eight
devices. The location of the capacitor should be close
to where the power supply is connected to the array.
MODE SELECT TABLE
Note:
X = Either VIH or VIL.
Mode CE# OE# PGM# VPP Outputs
Read VIL VIL XXD
OUT
Output Disable X VIH X X High Z
Standby (TTL) VIH X X X High Z
Standby (CMOS) VCC ± 0.3 V X X X High Z