The
and no longer supplied.
m
A733M is obsolete
m m
SLFS027B − NOVEMBER 1970 − REVISED MAY 2004
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D200-MHz Bandwidth
D250-kΩ Input Resistance
DSelectable Nominal Amplification of 10,
100, or 400
DNo Frequency Compensation Required
1
2
3
4
5
10
9
8
7
6
IN+
GAIN ADJ 2A
GAIN ADJ 1A
VCC−
OUT+
IN−
GAIN ADJ 2B
GAIN ADJ 1B
VCC+
OUT−
mA733M ...U PACKAGE
(TOP VIEW)
NC No internal connection
1
2
3
4
5
6
7
14
13
12
11
10
9
8
IN+
NC
GAIN ADJ 2A
GAIN ADJ 1A
VCC−
NC
OUT+
IN−
NC
GAIN ADJ 2B
GAIN ADJ 1B
VCC+
NC
OUT−
mA733C ...D, N, OR NS PACKAGE
mA733M ...J PACKAGE
(TOP VIEW)
description/ordering information
The µA733 is a monolithic two-stage video amplifier with differential inputs and differential outputs. Internal
series-shunt feedback provides wide bandwidth, low phase distortion, and excellent gain stability.
Emitter-follower outputs enable the device to drive capacitive loads, and all stages are current-source biased
to obtain high common-mode and supply-voltage rejection ratios.
Fixed differential amplification of 10 V/V, 100 V/V, or 400 V/V may be selected without external components,
or amplification may be adjusted from 10 V/V to 400 V/V by the use of a single external resistor connected
between 1A and 1B. No external frequency-compensating components are required for any gain option.
The device is particularly useful in magnetic-tape or disc-file systems using phase or NRZ encoding and in
high-speed thin-film or plated-wire memories. Other applications include general-purpose video and pulse
amplifiers where wide bandwidth, low phase shift, and excellent gain stability are required.
The µA733C is characterized for operation from 0°C to 70°C; the µA733M is characterized for operation over
the full military temperature range of −55°C to 125°C.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
P-DIP (N) Tube of 25 UA733CN UA733CN
0°C to 70°C
SOIC (D)
Tube of 50 UA733CD
UA733C
0
°
C to 70
°
C
SOIC (D) Reel of 2500 UA733CDR UA733C
SOP (NS) Reel of 2000 UA733CNSR UA733
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Copyright 2004, Texas Instruments Incorporated
!"# $%
$ ! ! & '
$$ ()% $ !* $ #) #$
* ## !%
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
The
and no longer supplied.
m
A733M is obsolete
m m
SLFS027B − NOVEMBER 1970 − REVISED MAY 2004
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
symbol
+
_
GAIN ADJ 1A
GAIN ADJ 2A
IN+
IN−
GAIN ADJ 1B
GAIN ADJ 2B
OUT+
OUT−
schematic
1A
2A
GAIN
ADJ
IN+ IN−
1B
2B
GAIN
ADJ
590 Ω590 Ω
300 Ω
2.4 kΩ2.4 kΩ10 kΩ1.1 kΩ1.1 kΩ
50 Ω50 Ω
1.4 kΩ300 Ω400 Ω400 Ω
V
CC+
OUT+
OUT−
VCC−
7 kΩ
7 kΩ
Component values shown are nominal.
The
and no longer supplied.
m
A733M is obsolete
m m
SLFS027B − NOVEMBER 1970 − REVISED MAY 2004
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
mA733C mA733M UNIT
Supply voltage VCC+ (see Note 1) 8 8 V
Supply voltage VCC− (see Note 1) − 8 − 8 V
Differential input voltage ± 5 ± 5 V
Common-mode input voltage ± 6 ± 6 V
Output current 10 10 mA
Continuous total power dissipation See Dissipation Rating Table
D package 86
Package thermal impedance, q
JA
(see Notes 2 and 3) N package 80 °C/W
Package thermal impedance, qJA (see Notes 2 and 3)
NS package 76
C/W
Maximum junction temperature, TJ150 °C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds J or U package 300 °C
Storage temperature range, Tstg − 65 to 150 − 65 to 150 °C
†Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, and
functional operation of the device at these or any other conditions beyond those indicated in the recommended operating conditions section of
this specification is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential input voltages, are with respect to the midpoint between VCC+ and VCC–.
2. Maximum power dissipation is a function of TJ(max), qJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) – TA)/qJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
DISSIPATION RATING TABLE
PACKAGE TA ≤ 25°C
POWER RATING DERATING
FACTOR DERATE
ABOVE TATA = 70°C
POWER RATING TA = 125°C
POWER RATING
J (µA733M) 500 mW 11.0 mW/°C 104°C500 mW 269 mW
The
and no longer supplied.
m
A733M is obsolete
m m
SLFS027B − NOVEMBER 1970 − REVISED MAY 2004
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, VCC± = ±6 V, TA = 25°C
PARAMETER
FIGURE
TEST CONDITIONS
GAIN †
mA733C mA733M
UNIT
PARAMETER
FIGURE
TEST CONDITIONS
GAIN
OPTION†MIN TYP MAX MIN TYP MAX
UNIT
Large-signal
differential
1 250 400 600 300 400 500
A
VD
Large-signal
differential
voltage
1 V
OD
= 1 V 2 80 100 120 90 100 110 V/V
AVD
voltage
amplification
1
VOD = 1 V
3 8 10 12 9 10 11
V/V
1 50 50
BW Bandwidth 2 R
S
= 50 Ω2 90 90 MHz
BW
Bandwidth
2
RS = 50 Ω
3 200 200
MHz
IIO Input offset
current Any 0.4 5 0.4 3 µA
IIB Input bias current Any 9 30 9 20 µA
VICR Common-mode
input voltage
range 1 Any ±1±1 V
VOC Common-mode
output voltage 1 Any 2.4 2.9 3.4 2.4 2.9 3.4 V
VOO
Output offset
1
1 0.6 1.5 0.6 1.5
V
VOO
Output offset
voltage 12 & 3 0.35 1.5 0.35 1 V
VOPP Maximum peak-
to-peak output
voltage swing 1 Any 3 4.7 3 4.7 V
1 4 4
r
i
Input resistance 3 V
OD
≤ 1 V 2 10 24 20 24 kΩ
ri
Input resistance
3
VOD ≤ 1 V
3 250 250
kΩ
roOutput resistance 20 20 Ω
CiInput capacitance 3 VOD ≤ 1 V 2 2 2 pF
CMRR
Common-mode
4
VIC = ±1 V,
f ≤ 100 kHz 2 60 86 60 86
dB
CMRR
Common-mode
rejection ration 4VIC = ±1 V,
f = 5 MHz 2 70 70 dB
kSVR Supply voltage
rejection ratio
(∆VCC/(∆VIO)1∆VCC± = ±0.5 V 2 50 70 50 70 dB
VnBroadband
equivalent input
noise voltage 5BW = 1 kHz to 10 MHz Any 12 12 µV
Propagation
RS = 50 Ω,
1 7.5 7.5
t
pd
Propagation
delay time
2
RS = 50 Ω,
Output voltage
step = 1 V
2 6.0 10 6.0 10 ns
tpd
delay time
2
Output voltage
step = 1 V 3 3.6 3.6
ns
RS = 50 Ω,
1 10.5 10.5
t
r
Rise time 2
RS = 50 Ω,
Output voltage
step = 1 V
2 4.5 12 4.5 10 ns
tr
Rise time
2
Output voltage
step = 1 V 3 2.5 2.5
ns
Isink(max) Maximum output
sink current Any 2.5 3.6 2.5 3.6 mA
ICC Supply current No load,
No signal Any 16 24 16 24 mA
†The gain option is selected as follows:
Gain Option 1: Gain-adjust pin 1A is connected to pin 1B, and pins 2A and 2B are open.
Gain Option 2: Gain-adjust pin 1A and pin 1B are open, pin 2A is connected to pin 2B.
Gain Option 3: All four gain-adjust pins are open.
The
and no longer supplied.
m
A733M is obsolete
m m
SLFS027B − NOVEMBER 1970 − REVISED MAY 2004
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, VCC± = ±6 V, TA = 0°C to 70°C for mA733C, − 55°C to 125°C for mA733M
PARAMETER
FIGURE
TEST CONDITIONS
GAIN †
mA733C mA733M
UNIT
PARAMETER
FIGURE
TEST CONDITIONS
GAIN
OPTION†MIN MAX MIN MAX
UNIT
Large-signal differential
1 250 600 200 600
A
VD
Large-signal differential
voltage amplification
1 V
OD
= 1 V 2 80 120 80 120 V/V
AVD
voltage amplification
1
VOD = 1 V
3 8 12 8 12
V/V
IIO Input offset current Any 6 5 µA
IIB Input bias current Any 40 40 µA
VICR Common-mode input
voltage range 1 Any ±1±1 V
VOO
Output offset voltage
1
1 1.5 1.5
V
VOO Output offset voltage 12 & 3 1.5 1.2 V
VOPP Maximum peak-to-peak
output voltage swing 1 Any 2.8 2.5 V
riInput resistance 3 VOD ≤ 1 V 2 8 8 kΩ
CMRR Common-mode rejection
ratio 4VIC = +1 V,
f ≤ 100 kHz 2 50 50 dB
kSVR Supply voltage rejection
ratio (∆VCC/(∆VIO)1∆VCC± = ±0.5 V 2 50 50 dB
Isink(max) Maximum output sink
current Any 2.5 2.2 mA
ICC Supply current No load,
No signal Any 27 27 mA
†The gain option is selected as follows:
Gain Option 1: Gain-adjust pin 1A is connected to pin 1B, and pins 2A and 2B are open.
Gain Option 2: Gain-adjust pin 1A and pin 1B are open, pin 2A is connected to pin 2B.
Gain Option 3: All four gain-adjust pins are open.
The
and no longer supplied.
m
A733M is obsolete
m m
SLFS027B − NOVEMBER 1970 − REVISED MAY 2004
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
test circuits
Figure 1
2 kΩ
50 Ω50 Ω
VOD
+
−
VID
Figure 2
50 Ω50 Ω
VID
+
−
1 kΩ
1 kΩ
0.2 µF
0.2 µF
Figure 3
2 kΩ
VOD
+
−
Figure 4
0.2 µF
0.2 µF
1 kΩ
50 Ω
50 Ω
1 kΩ
VIC
+
−
Figure 5
2 kΩ
VOD
+
−
Figure 6
50 Ω50 Ω
0.2 µF
0.2 µF
1 kΩ
2B 1B
2A 1A
Radj1 kΩ
VOLTAGE AMPLIFICATION ADJUSTMENT
+
−
The
and no longer supplied.
m
A733M is obsolete
m m
SLFS027B − NOVEMBER 1970 − REVISED MAY 2004
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 7
PHASE SHIFT
vs
FREQUENCY
GAIN 2
5
0
−5
−10
−15
−20
Phase Shift − Degrees
012345678910
f − Frequency − MHz
VCC± = ±6 V
TA = 25°C
Figure 8
PHASE SHIFT
vs
FREQUENCY
GAIN 2
50
0
−50
−100
−150
−200
−250
−300
−350
−400
−450
Phase Shift − Degrees
f − Frequency − MHz
1 4 10 40 100 40
0
VCC± = ±6 V
TA = 25°C
Figure 9
1.2
1.1
1.0
0.9
0.8
−75 − 50 − 25 0 25 50 75 100 125
mA733C
GAIN 1
GAIN 2
GAIN 3
GAIN 1
GAIN 3
GAIN 2
Voltage Amplification Relative to Value at T = 25 C
Ao
TA − Free-Air Temperature − °C
VOLTAGE AMPLIFICATION
(SINGLE-ENDED OR DIFFERENTIAL)
vs
TEMPERATURE
VCC± = ±6 V
Figure 10
1.4
1.2
1.0
0.8
0.6
0.4 345678
|VCC±| − Supply Voltage − V
VOLTAGE AMPLIFICATION
(SINGLE-ENDED OR DIFFERENTIAL)
vs
SUPPLY VOLTAGE
TA = 25°C
Voltage Amplification Relative to Value at V +_
CC = 6 V
+_
GAIN 1
GAIN 2
GAIN 3
The
and no longer supplied.
m
A733M is obsolete
m m
SLFS027B − NOVEMBER 1970 − REVISED MAY 2004
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 11
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
RESISTANCE BETWEEN G1A AND G1B
10 40 100 400 1 k 4 k 10 k
1000
700
400
200
100
70
40
20
10
Radj − Resistance Between G1A and G1B − Ω
VCC± = ±6 V
VOD = 1 V
TA = 25°C
See Figure 6
AVD − Differential Voltage Amplification
Figure 12
SINGLE-ENDED VOLTAGE AMPLIFICATION
vs
FREQUENCY
A
f − Frequency − MHz
1 4 10 40 100 40
0
GAIN 1
GAIN 2
GAIN 3
VCC± = ±6 V
TA = 25°C
VS − Single-ended Voltage Amplification − dB
50
40
30
20
10
0
Figure 13
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
mA733C
20
18
16
14
12
10
8
6
4
2
0
−75 − 50 − 25 0 25 50 75 100 125
TA − Free-Air Temperature − °C
I − Supply Current − mA
CC
VCC± = ±6 V
No Load
No Signal
Figure 14
345678
24
20
16
12
8
4
0
|VCC±| − Supply Voltage − V
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
No Load
No Signal
TA = 25°C
I − Supply Current − mA
CC
The
and no longer supplied.
m
A733M is obsolete
m m
SLFS027B − NOVEMBER 1970 − REVISED MAY 2004
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 15
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
LOAD RESISTANCE
10 40 100 400 1 k 4 k 10 k
5
4
3
2
1
0
RL − Load Resistance − Ω
VCC± = ±6 V
TA = 25°C
V − Maximum Peak-to-Peak Output Voltage − V
OPP
Figure 16
345678
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
V − Maximum Peak-to-Peak Output Voltage − V
OPP
8
7
6
5
4
3
2
1
0
|VCC±| − Supply Voltage − V
TA = 25°C
Figure 17
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
f − Frequency − MHz
1 4 10 40 100 400
2 7 20 70 200
VCC± = ±6 V
TA = 25°C
V − Maximum Peak-to-Peak Output Voltage − V
OPP
6
5
4
3
2
1
0
Figure 18
− 60 − 40 −20 0 20 40 60 80 100 120 14
0
INPUT RESISTANCE
vs
FREE-AIR TEMPERATURE
40
35
30
25
20
15
10
5
0
TA − Free-Air Temperature − °C
r
mA733C
GAIN 2
VCC± = ±6 V
Ω
i − Input Resistance − k
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
84185012A OBSOLETE LCCC FK 20 TBD Call TI Call TI
UA733CD ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA733CDE4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA733CDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA733CDR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA733CDRE4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA733CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA733CN ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
UA733CNE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
UA733CNSR ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA733CNSRE4 ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA733CNSRG4 ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA733MJ OBSOLETE CDIP J 14 TBD Call TI Call TI
UA733MJB OBSOLETE CDIP J 14 TBD Call TI Call TI
UA733MUB OBSOLETE CFP U 10 TBD Call TI Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
PACKAGE OPTION ADDENDUM
www.ti.com 4-Jun-2007
Addendum-Page 1
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 4-Jun-2007
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
UA733CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
UA733CNSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UA733CDR SOIC D 14 2500 367.0 367.0 38.0
UA733CNSR SO NS 14 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All
semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time
of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which
have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such
components to meet such requirements.
Products Applications
Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive
Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications
Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers
DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps
DSP dsp.ti.com Energy and Lighting www.ti.com/energy
Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Security www.ti.com/security
Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
RFID www.ti-rfid.com
OMAP Mobile Processors www.ti.com/omap TI E2E Community e2e.ti.com
Wireless Connectivity www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2012, Texas Instruments Incorporated
