Product Brief May 1998 LU3X51FT-J80 Single-Port 10/100 Ethernet Transceiver TX/FX Overview 10 Mbit PLL exceeding tolerances for both preamble and data jitter 100 Mbit PLL, combined with the digital adaptive equalizer, robustly handles variations in rise-fall time, excessive attenuation due to channel loss, duty-cycle distortion, cross talk, and baseline wander Transmit rise-fall time manipulated to provide lower emissions, amplitude fully compatible for proper interoperability Programmable scrambler seed for better FCC compliancy Selectable CIM, Class II support, and powerful MII drivers for repeater applications IEEE* 802.3u Clause 28 compliant auto negotiation for full 10M and 100M control IEEE* 802.3 compatible 10Base-T and 100Base-T physical layer interface and ANSI X3.263 TP-PMD compatible transceiver Fully configurable via pins and management accesses Extended management support with interrupt capabilities PECL interface for external FX transceiver PHY MIB support Built-in analog 10 Mbit receive filter, removing the need for external filters Symbol mode option Full LED support Built-in 10 Mbit transmit filter Low-power CMOS implementation 80-pin QFP package The LU3X51FT-J80 is a fully integrated 10/100 Mbit physical layer device with transceiver. This part was designed for 10/100 Mbit applications where board space, cost, and power are at a premium and stringent functional interoperability is a necessity. The LU3X51FT-J80 is a powerful device for the forward migration of legacy 10 Mbit products and non compliant 100 Mbit devices. The LU3X51FT-J80 was designed from the beginning to conform fully with all pertinent specifications, from the ISO/IEC 11801 and EIA/TIA 568 cabling guidelines to ANSI X3.263 TPPMD to IEEE* 802.3 ethernet specifications. Features Single-chip integrated physical layer and transceiver for 10Base-T and/or 100Base-T functions * IEEE is a registered trademark of The Institute of Electrical and Electronics Engineers, Inc. LU3X51FT-J80 Single-Port 10/100 Ethernet Transceiver TX/FX Product Brief May 1998 LU3X51FT-J80 Block Diagram LEDs MDIOINT FOTX+/- MDIO LEDS MDC TXD 10/100-TX MIIENA RXD RXDV MII TXER INTERFACE LOGIC PCS TXEN TXCLK 10/100-TX DRIVERS MANAGEMENT INTERFACE REGISTER/ CONFIG/ CONTROL TPTX+/- AUTONEG RX10 SQUELCH FORX+/FOSD+/- RXER 10/100-RX PCS RXCLK COL/FCRS CLOCK SYNTHESIS and RECOVERY ADAPTIVE EQUALIZER Baseline Wander Correction TPRX+/- CRS For additional information, contact your Microelectronics Group Account Manager or the following: http://www.lucent.com/micro INTERNET: docmaster@micro.lucent.com E-MAIL: N. AMERICA: Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18103 1-800-372-2447, FAX 610-712-4106 (In CANADA: 1-800-553-2448, FAX 610-712-4106) ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256 Tel. (65) 778 8833, FAX (65) 777 7495 CHINA: Microelectronics Group, Lucent Technologies (China) Co., Ltd., A-F2, 23/F, Zao Fong Universe Building, 1800 Zhong Shan Xi Road, Shanghai 200233 P. R. China Tel. (86) 21 6440 0468, ext. 316, FAX (86) 21 6440 0652 JAPAN: Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan Tel. (81) 3 5421 1600, FAX (81) 3 5421 1700 EUROPE: Data Requests: MICROELECTRONICS GROUP DATALINE: Tel. (44) 1189 324 299, FAX (44) 1189 328 148 Technical Inquiries: GERMANY: (49) 89 95086 0 (Munich), UNITED KINGDOM: (44) 1344 865 900 (Bracknell), FRANCE: (33) 1 41 45 77 00 (Paris), SWEDEN: (46) 8 600 7070 (Stockholm), FINLAND: (358) 9 4354 2800 (Helsinki), ITALY: (39) 2 6601 1800 (Milan), SPAIN: (34) 1 807 1441 (Madrid) Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. N o liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information. Copyright (c) 1998 Lucent Technologies Inc. All Rights Reserved Printed in U.S.A. May 1998 PN98-149LAN