DR1200A-DK DR1201A-DK Virtual Wire(c) Development Kit Manual (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 1 of 46 www.murata.com Virtual Wire Development Kit Manual for DR1200A-DK and DR1201A-DK Virtual Wire Development Kit Hardware Warranty Special Notices 1 Virtual Wire Development Kit Introduction 1.1 1.2 1.3 1.4 1.5 Purpose of the Virtual Wire Development Kit Intended User General Description Key Features Development Kit Contents 2 Low-Power Wireless Data Communications 2.1 2.2 2.3 2.4 Operational Considerations Regulations Example Applications FAQs 3 Developing a Virtual Wire Application 3.1 3.2 3.3 3.4 3.5 3.6 3.7 Simulating the Application I/O and Power Considerations Communications Protocol Antenna Considerations Internal Noise Management Final Product Testing Regulatory Certification Regulatory Authority Product Certification Certification Testing 4 Installation and Operation 4.1 4.2 Development Kit Assembly Instructions Data Radio Board Antenna Options (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 2 of 46 www.murata.com 4.3 Protocol Board RS232 Interface LED Functions Host Program Installation 5 Theory of Operation 5.1 5.2 5.3 Data Radio Boards I/O Interface TR1000/TR1001 ASH Transceiver Specifications Protocol Board I/O Interface RS232 Interface Protocol Microcontroller CMOS/RS232 Level Converter Specifications Protocol Firmware A Drawings ASH Receiver Block Diagram & Timing Cycle ASH Transceiver Block Diagram Antenna Mounting DR1200A and DR1201A Data Radio Schematic DR1200A and DR1201A Data Radio Bill of Materials DR1200A and DR1201A Data Radio Component Placement 916.5 MHz Test Antenna Drawing 868.35 MHz Test Antenna Drawing PB1001-2 Protocol Board Schematic PB1001-2 Protocol Board Component Placement PB1001-2 Protocol Board Bill of Materials (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 3 of 46 www.murata.com Development Kit Hardware Warranty Virtual Wire Limited Hardware Warranty. Murata Electronics, N.A. warrants solely to the purchaser that the hardware components of the Virtual Wire(R) Development Kit (the "Kit") will be free from defects in materials and workmanship under normal use for a period of 90 days from the date of shipment by Murata. This limited warranty does not extend to any components which have been subjected to misuse, neglect, accident, or improper installation or application. Murata's entire liability and the purchaser's sole and exclusive remedy for the breach of this Limited Hardware Warranty shall be, at Murata's option, when accompanied by a valid receipt, either (i) repair or replacement of the defective components or (ii) upon return of the defective Kit, refund of the purchase price paid for the Kit. EXCEPT FOR THE LIMITED HARDWARE WARRANTY SET FORTH ABOVE, Murata AND ITS LICENSORS PROVIDE THE HARDWARE ON AN "AS IS" BASIS, AND WITHOUT WARRANTY OF ANY KIND EITHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Some states do not allow the exclusion of implied warranties, so the above exclusion may not apply to you. This warranty gives you specific legal rights and you may also have other rights which vary from state to state. Limitation of Liability. IN NO EVENT SHALL MURATA OR ITS SUPPLIERS BE LIABLE FOR ANY DAMAGES (WHETHER SPECIAL, INCIDENTAL, CONSEQUENTIAL OR OTHERWISE) IN EXCESS OF THE PRICE ACTUALLY PAID BY YOU TO MURATA FOR THE KIT, REGARDLESS OF UNDER WHAT LEGAL THEORY, TORT, OR CONTRACT SUCH DAMAGES MAY BE ALLEGED (INCLUDING, WITHOUT LIMITATION, ANY CLAIMS, DAMAGES, OR LIABILITIES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR FOR INJURY TO PERSON OR PROPERTY) ARISING OUT OF THE USE OR INABILITY TO USE THE KIT, EVEN IF Murata HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. BECAUSE SOME STATES DO NOT ALLOW THE EXCLUSION OR LIMITATION OF LIABILITY FOR CONSEQUENTIAL OR INCIDENTAL DAMAGES, THE ABOVE LIMITATION MAY NOT APPLY TO YOU. Development Kits Special notice on restricted use of Virtual Wire Virtual Wire(R) Development Kits are intended for use solely by professional engineers for the purpose of evaluating the feasibility of low-power wireless data communications applications. The user's evaluation must be limited to use of an assembled Kit within a laboratory setting which provides for adequate shielding of RF emission which might be caused by operation of the Kit following assembly. In field testing, the assembled device must not be operated in a residential area or any area where radio devices might be subject to harmful electrical interference. This Kit has not been certified for use by the FCC in accord with Part 15, or to ETSI I-ETS 300 220 regulations, or other known standards of operation governing radio emissions. Distribution and sale of the Kit is intended solely for use in future development of devices (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 4 of 46 www.murata.com which may be subject to FCC regulation, or other authorities governing radio emission. This Kit may not be resold by users for any purpose. Accordingly, operation of the Kit in the development of future devices is deemed within the discretion of the user and the user shall have all responsibility for any compliance with any FCC regulation or other authority governing radio emission of such development or use, including without limitation reducing electrical interference to legally acceptable levels. All products developed by user must be approved by the FCC or other authority governing radio emission prior to marketing or sale of such products and user bears all responsibility for obtaining the FCC's prior approval, or approval as needed from any other authority governing radio emission. If user has obtained the Kit for any purpose not identified above, including all conditions of assembly and use, user should return Kit to Murata Electronics N.A, Inc. immediately. The Kit is an experimental device, and Murata makes no representation with respect to the adequacy of the Kit in developing low-power wireless data communications applications or systems, nor for the adequacy of such design or result. Murata does not and cannot warrant that the functioning of the Kit will be uninterrupted or error-free. The Kit and products based on the technology in the Kit operate on shared radio channels. Radio interference can occur in any place at any time, and thus the communications link may not be absolutely reliable. Products using Virtual Wire(R) technology must be designed so that a loss of communications due to radio interference or otherwise will not endanger either people or property, and will not cause the loss of valuable data. Murata assumes no liability for the performance of products which are designed or created using the Kit. Murata products are not suitable for use in life-support applications, biological hazard applications, nuclear control applications, or radioactive areas. Murata and Virtual Wire are registered trademarks of Murata Electronics N.A., Inc., MS-DOS, QuickBASIC, Visual Basic and Windows are registered trademarks of Microsoft Corporation. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 5 of 46 www.murata.com 1 Virtual Wire(R) Development Kit Introduction 1.1 Purpose of Virtual Wire Development Kits Virtual Wire Development Kits are tools for evaluating the feasibility of low-power wireless data communications applications. These kits also facilitates the development of actual systems. In addition, the modules in these kit are available from RF Monolithics, Inc. (Murata) for use in system manufacturing. 1.2 Intended Kit User Virtual Wire Development Kits are intended for use by professional engineers with a working knowledge of data communications. The kits themselves are not intended as end products, or for use by individuals that do not have a professional background in data communications. Please refer to the Special Notices section in the front of this manual. 1.3 General Description Virtual Wire Development Kits allow the user to implement low-power wireless communications based on half-duplex packet transmissions. These kits contain the hardware and software needed to establish a wireless link between two Windowsbased computers with RS232C serial ports. The kits includes two communications nodes, with each node consisting of a data radio board and host protocol board, plus accessories. The DR1200A-DK kit operates at 916.5 MHz, and the DR1201A-DK operates at 868.35 MHz. These kits are configured to demonstrate relatively long operating distances (100 to 200 meters outdoors depending on the antenna used) and high noise immunity at an "air rate" of 2000 bps. They also demonstrate "EMC robust" PCB layout techniques required by European applications that must meet ETSI EN 301 489 EMC Class 2 criteria. See RFM's web site for details on the DR2000-DK and DR2001-DK development kits for high data rate applications. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 6 of 46 www.murata.com 1.4 Key Features These Virtual Wire Development Kits includes a number of key features: * "Out of the box" operation between two Windows-based PC's * 3 Vdc low-current UHF data radio transceivers (916.5 or 868.35 MHz) * Excellent receiver off-channel interference rejection * Wide dynamic range receiver log detection for resistance to on-channel interference * Reference antennas * 4.5 Vdc low-current protocol boards based on an ATMEL AT89C2051 microcontroller * On-board CMOS logic to RS232C level conversion with bypass provisions for direct CMOS logic interface * Packet link-layer protocol with ISO3309 error detection and automatic packet retransmission; up to 24 message bytes per packet * DC-balanced data coding and PLL-based "integrate and dump" data recovery for robust link performance * Simple host-protocol interface with host and protocol source code examples * Diagnostic LEDs for system performance evaluation 1.5 Development Kit Contents * Two data radio transceiver boards * Two host protocol boards * Two antennas * CD containing Manuals, Designer's Guides, Data Sheets and Software * Quick Start Guide (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 7 of 46 www.murata.com 2 Low-Power Wireless Applications 2.1 Operational Considerations Low-power wireless (RF) systems typically transmit from 0.0001 to 10 mW of power, and operate over distances of 3 to 200 meters. Once certified to comply with local communications regulations, they do not require a license or "air-time fee" for operation. There are more than 100 million systems manufactured each year that utilize low-power wireless for security, control and data transmission. Many new applications for low-power wireless are emerging, and sales are expected to top 200 million systems per year by the middle of the decade. The classical uses for low-power wireless systems are one-way remote control and alarm links, including garage door openers, automotive "keyless entry" transmitters, and home security systems. Recently, a strong interest has developed in two-way data communications applications. These low-power wireless systems are used to eliminate nuisance cables on all types of digital products, much as cordless phones have eliminated cumbersome phone wires. RFM's Virtual Wire Development Kits are intended to support the design of these types of low-power wireless applications. Most low-power wireless systems operate with few interference problems. However, these systems operate on shared radio channels, so interference can occur at any place and at any time. Products that incorporate low-power wireless communications must be designed so that a loss of communication due to radio interference or any other reason does not create a dangerous situation, damage equipment or property, or cause loss of valuable data. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 8 of 46 www.murata.com 2.2 Regulations While low-power wireless products do not have to be individually licensed, they are subject to regulation. Before low-power wireless systems can be marketed in most countries, they must be certified to comply with specific technical regulations. In the US, the FCC issues this certification. In most of Europe and Scandinavia, certification is based on ETSI standards, etc. While technical regulations vary from country to country, they follow the same general philosophy of assuring that low-power wireless systems will not significantly interfere with licensed radio systems. Regulations specify limitations on fundamental power, harmonic and spurious emission levels, transmitter frequency stability, and transmission bandwidth. 2.3 Example Applications Applications for low-power wireless data communications are growing very rapidly. The following list of example applications demonstrates the diversity of uses for low-power wireless technology: * Wireless bar-code readers and bar-code label printers * Smart ID tags for inventory tracking and identification * Wireless automatic utility meter reading systems * Wireless credit card readers and receipt printers for car rentals, restaurants, etc. * Communications links for hand-held terminals, HPCs, PDAs, and peripherals * Portable and field data logging * Location tracking (follow-me phone extensions, etc.) * Sports and medical telemetry (non life support) * Surveying system data links * Engine diagnostic links * Polled wireless security alarm sensors (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 9 of 46 www.murata.com * Authentication and access control tags * Arcade games 2.4 FAQs 1. Why does the Virtual Wire Development Kit include a packet protocol microcontroller? Why not connect the data radio board directly to a computer serial port? You can hook a data radio board directly to a computer serial port (using an RS232 to 3 V CMOS level converter). However, the results are not likely to be satisfactory. First, error detection is limited to byte parity checking, which will let many errors go undetected. Also, the DC balance in the data can be very poor, which will greatly reduce the data radio's range. Packet protocol is used extensively in two-way data communications. For example, the Internet and digital cellular phones use packet transmissions. While there are many packet protocols in use, they all provide a basic set of features, including an effective means for transmission error detection, and routing support (such as a "to" and "from" address). This allows error free data communications to be performed in a highly automatic way. The protocol microcontroller used in the Virtual Wire Development Kit provides error detection and automatic message retransmission, message routing, link failure alarms and DC-balanced packet coding. 2. What is the operating range of my low-power wireless systems? Testing in an electrically quiet outdoor location, we can easily communicate more than 100 meters with the DR1200A-DK and DR1201A-DK. However, operating range in a given situation is influenced by building construction materials and contents when indoors, and by other radio systems operating in the vicinity, and noise generated by nearby equipment. The Virtual Wire Development Kit can be (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 10 of 46 www.murata.com taken into a target environment and used to help gain a sense of operating range for the proposed system. See the Appendix in the ASH Transceiver Designer's Guide for additional information. 3. Can I communicate between more than two nodes in the same location with a lowpower communications link? Yes. One of the benefits of packet transmissions in channel sharing. In the case of these Virtual Wire Development Kits, each protocol board can recognize 12 addresses. For example, node 1 can be transmitting bar-code readings to node 2 while node 4 is transmitting bar-codes to node 7 in the same location. So long as the average channel usage is less than about 10-12%, randomly transmitted messages will get though without excessive transmission "collisions" and transmission retries. Application 3 Developing a Virtual Wire 3.1 Simulating the Application There are hundreds of potential applications for short-range wireless communications links. Because there can be so many different variables in a potential application, simulating the application is often the best way to gain insight into its feasibility. Virtual Wire Development Kits can be very helpful in simulating potential applications. The following simulation check list covers issues common to most low-power wireless applications. The user should also consider what other specific issues apply to the application being simulated: * Maximum operating range required * Type of operating environment (outdoor, indoor, indoor building construction, etc.) * Number of nodes (transceivers) required in the application * Node interaction (communications between pairs of nodes only, one master node and several slave nodes, communications between any two nodes, etc.) (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 11 of 46 www.murata.com * Possible on-channel interference/noise sources (ISM equipment, electrical equipment, etc.) * Channel usage (average and peak number of messages expected in a given period of time, average message transmission/acknowledgment duration, average percentage of time the channel is in use, etc.) * Message characteristics (average and maximum length; message type such as data, telemetry, control codes, etc.) * Antenna logistics (omnidirectional, directional, hidden, etc.) * Environmental considerations Indoor radio propagation is an issue for special consideration. In most indoor locations, "dead spots" can be found where reception is very difficult. These can occur even if there appears to be a line of sight relationship between two nodes. These "dead spots", or nulls, are due to multiple transmission paths existing between two locations because of reflections off objects such as steel beams, concrete rebar, metal door, window and ceiling tile frames, etc. Nulls occur when the path lengths effectively differ by an odd half-wavelength. Deep nulls are usually very localized, and can be avoided by moving either node slightly. Diversity reception techniques are very helpful in reducing indoor null problems. Many low-power wireless systems involve communications between a master and multiple slave units. In this case, the master transmission can be sent twice; first from one master and then again from a second master in a slightly different location. The nulls for each master will tend to be in different locations, so a slave is very likely to hear the transmission from one or the other master. Likewise, a transmission from a slave is likely to be heard by at least one of the masters. Hand-held applications usually involve some movement, so automatic packet retransmission often succeeds in completing the transmission as hand motion moves the node through the null and back into a good transmission point. Diversity reception should be considered when covering indoor areas larger than about 20 by 20 meters or where the indoor space is broken into many cubicles, booths, aisles, offices, etc. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 12 of 46 www.murata.com 3.2 I/O and Power Considerations The DR1200A and DR1201A Data Radio boards require a DC power supply in the range of 2.7 to 3.3 Vdc with less than 10 mV of ripple, and a peak current capability of up to 15 mA. Quiescent current in the receive mode is approximately 3.5 mA. The average current with an RF signal being transmitted is approximately 6 mA and the peak current in the RF transmit mode is approximately 12 mA. Applying more than 3.6 Vdc to the Data Radio boards or reversing the polarity of the supply voltage will permanently damage them (note that the Protocol Board operates from 4.5 Vdc but supplies 3 Vdc to the Data Radio board). Another concern is ESD as static-sensitive devices are used on the Data Radio board. 3.3 Communications Protocol Almost all two-way wireless data communications use some form of packet protocol to automatically assure information is received correctly at the correct destination. The protocol provided with these Virtual Wire Development Kits is a link-layer protocol, and includes the following features: * 16-bit ISO3309 error detection calculation to test message integrity * 4-bit TO/FROM address routing with up to 12 different node addresses available * ASCII or binary message support (using Internet SLIP style framing substitutions for binary messages where needed), up to 24 payload bytes per packet * Automatic packet retransmission until acknowledgment is received; 8 retries with variable back-off delays plus "acknowledge" and "link failure" alarm messages. The kit CD includes a Visual Basic program with source code to provide an example of interfacing host (application) software to this Virtual Wire link layer protocol. The protocol software does not require or support hardware flow control, so the host software does some timekeeping to interface the protocol software. Both the protocol and host software are discussed in the ASH Transceiver Software Designer's Guide on (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 13 of 46 www.murata.com the CD. Users familiar with hardwired packet networks may consider the 24 message bytes per packet limit quite small. Packets sent by low-power wireless systems are kept deliberately short to improve performance where on-channel burst interference and low signal-to-noise conditions are often encountered. 3.4 Antenna Considerations Suitable antennas are crucial to the success of a Virtual Wire application. Here are several key points to consider in designing antennas for your application: * Where possible, the antenna should be placed on the outside of the product. Also, try to place the antenna on the top of the product. If the product is "body worn", try to get the antenna away for the body as far as practical. * Regulatory agencies prefer antennas that are permanently fixed to the product. Antennas can be supplied with a cable, provided a non-standard connector is used to discourage antenna substitution (these connectors are often referred to as "Part 15" connectors). * An antenna can not be placed inside a metal case, as the case will shield it. Also, some plastics (and coatings) significantly attenuate RF signals and these materials should not be used for product cases where the antenna is inside the case. * The antenna designs used in the kit are included in the Drawings section of the manual. Many other antenna designs are possible, but efficient antenna development requires access to antenna test equipment such as a vector network analyzer, calibrated test antenna, antenna range, etc. Unless you have access to this type of equipment, consider using a standardized antenna design or antenna design consultant. Contact RFM's applications engineering group for additional information. * A patch or slot antenna can be used in some applications where an external antenna would be subject to damage. These types of antennas usually have to be designed on a case-by-case basis. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 14 of 46 www.murata.com 3.5 Internal Noise Management RF transceivers operating under FCC Part 15 and similar regulations are sensitive to noise at their operating frequency, because the desired signals must be transmitted at low power levels. Commonly encountered internal noise sources are microprocessors (both for control functions and computer functions), brush-type motors and high-speed logic circuits. If the rise time and fall time of the clocking pulses in a microprocessor are fast enough to produce harmonics in the frequency range of the receiver and the harmonics actually fall within the passband of the receiver, then special care must be taken to reduce the level of the harmonic at the antenna port of the receiver. It is best to choose a different microprocessor crystal frequency to avoid this problem. If the engineer has the option, he should choose a microprocessor that has the slowest rise and fall time he can use for the application to avoid the troublesome harmonics in the UHF band. If possible, brush-type motors should be avoided, since arcing of the brushes on the commutator makes a very effective spark-gap transmitter. If it is necessary to use a brush-type motor, spark suppression techniques should be used. Such motors can be purchased with spark suppression built-in. If the motor does not have built-in spark suppression, bypass capacitors, series resistors and shielding may have to be employed. High-speed logic circuits produce noise similar to microprocessors. Once again, the engineer should use logic with the slowest rise and fall times that will work for his application. The items listed below should be considered for an application that has one or more of the above noise sources included: * Locate the RF transceiver and its antenna as far from the noise source as possible. * If the transceiver must be enclosed with the noise source, remotely locate the antenna using a coaxial cable. * Terminate high-speed logic circuits with their characteristic impedance and use microstrip interconnect lines designed for that impedance. * Keep PCB traces and wires that carry high-speed logic signals or supply brush-type motors as short as possible. Such lines act as antennas that radiate the unwanted noise. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 15 of 46 www.murata.com * If possible, enclose the noise source in a grounded metal box and use RF decoupling on the input/output lines. * Avoid using the same power lines for the RF transceiver and the noise source or at least thoroughly filter (RF decouple) such power lines. It is advisable to use separate voltage regulators. * If the antenna cannot be remotely located, place it as far from the noise source as possible (on the opposite end of the printed circuit board). Orient the antenna such that its axis is in the same plane with the printed circuit board containing the noise source. Do not run wires that supply the noise source in close proximity to the antenna. 3.6 Final Product Testing Any wireless data communications system must be thoroughly tested due to the "anything can happen in any sequence" nature of wireless communications. It is highly recommended that beta sites be chosen for operational system testing which represent the "limit" situations the system can be expected to operate in. Testing for regulatory certification is discussed in Section 3.7. It is recommended that the user either establish an RF test range or a working relationship with a recognized test lab early in the system development phase, to allow for periodic evaluation of the system's emissions during development. Many labs are experienced in solving radiation problems that cause certification test failures and/or jamming of the low-power wireless link. Identifying these types of problems early can save a lot of development time. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 16 of 46 www.murata.com 3.7 Regulatory Certification Regulatory Authority - Worldwide, man-made electromagnetic emissions are controlled by international treaty and the ITU (International Telecommunications Union) committee recommendations. These treaties require countries within a geographical region to use comparable tables for channel allocations and emission limits, to assure that all users can operate with reasonable levels of interference. Recognizing a need to protect their limited frequency resources, many countries have additional local laws, regulations and government decrees for acceptable emission levels from various electronic equipment, both military and commercial. By requiring that each model of equipment be tested and an authorization permit issued, a government works to control the sale of problematical equipment and also has record of the known manufacturers. Enforcement and expectation of the local law varies, of course. USA, Canada, and most European countries have adopted ITU tables for their respective radio regions. Australia, Hong Kong and Japan also have extensive rules and regulations for low power transmitters and receivers, but with significant differences in the tables for that radio region. Most other countries have less formal regulations, often modeled on either USA or EU regulations. In any country, it is important to contact the Ministry of Telecommunications or Postal Services to determine any local limitations, allocations, or certifications PRIOR to assembling or testing your first product. These laws and requirements are applicable to the finished product, in the configuration that it will be sold the general public or the end user. OEM components often can not be certified, since they require additional non-standard attachments before they have any functional purpose. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 17 of 46 www.murata.com Unless otherwise marked, Murata Virtual Wire Development Kit modules have not been certified to any particular set of regulations. Each module has suggested countries for use, depending on current allocations and technical limits. Emissions from receivers can be an unexpected problem, and the Murata modules have special features to help with this part of the emission testing. Product Certification - General requirements for emissions and ingressions ( called susceptibility) are controlled by engineering standards of performance, regulations, and the customer's expectations. In USA and Canada, for example, you must formally measure the emissions, file for a certification or authorization, and affix a permanent marking label to every device, prior to offering your system for retail sale. Regulations allow you to build a small number for testing and in-company use before certification and marketing. Trade shows and product announcements can be a problem for marketing, when the products are advertised without proper disclaimers. With Internet access, go to "www.fcc.org" for USA information or "www.ic.gc.ca" for Canada. The Canada rules are RCC-210, Revision 2. FCC CFR 47, Parts 2 and 15, contains the needed information for USA sales. European Union (EU) requirements allow self-certification of some systems and require formal measurement reports for other systems. In all cases, however, the directives demand the "CE mark" be added to all compliant devices before any device is freely shipped in commerce. In the EU, the EMC Directive also adds various tests and expectations for levels of signal that will permit acceptable operation. Certification Testing - The emissions are measured in a calibrated environment defined by the regulations. USA and Canada use an "open field" range with 3 meters between the device under test (DUT) and the antenna. The range is calibrated by measurement of known signal sources to generate range attenuation (correction) curves in accordance with ANSI C63.4-1992. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 18 of 46 www.murata.com EU measurement rules are based on a similar arrangement, but a "standard dipole" antenna is substituted for the DUT to calibrate the range attenuation. Since the EU measurements are comparison or substitution rules, they are often easier to follow for informal pre-testing by the designer. ETSI 300 220 has drawings that describe a typical test configuration. The United States and Canadian requirements are contained in ANSI C63.4-1992, including a step-by-step test calibration and measurement procedure. Since these rules include range attenuation factors, one must make twice the measurements of the EU test method. Other countries follow one of these two techniques, with exception for a 10 meter range (separation) measurement or a different range of test frequencies. Each of the listed contacts will have resources to provide current regulations and certification forms. They also can suggest sources for your formal tests, either commercial labs or the government testing office. Unless you want to invest in a qualified radiated signals test range, the commercial labs can help you with preliminary measurements and some expertise in correcting any difficulties that are noted. Contacts for further information and current test facilities listings: ANSI Institute of Electrical & Electronics Engineers, 345 East 47th Street, New York, NY 10017 USA ETSI European Telecommunications Standard Institute F-06921 Sophia Antipolis Cedex FRANCE FCC Federal Communications Commission Washington DC 20554 USA Canada DOC Industrie Canada Attn: Certification, Engineering and Operations Section, 1241 Clyde Avenue, Ottawa K1A 0C8 CANADA UNITED KINGDOM LPRA (manufacturing association information) Low Power Radio Association (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 19 of 46 www.murata.com The Old Vicarage, Haley Hill, Halifax HX3 6DR UK or Radiocommunications Agency (official) Waterloo Bridge House, Waterloo Road London SE1 8UA JATE Japan Approvals Institute (JATE) Isomura Bldg, 1-1-3 Toranomon Minato-ku Tokyo JAPAN 4 Virtual Wire(R) Development Kit Installation and Operation 4.1 Development Kit Assembly Instructions Kit assembly includes the following steps: * Install the antennas on the data radio boards * Obtain and install AAA batteries in the protocol boards (power switch OFF) * Plug the data radio boards onto the protocol boards * Install a jumper on ID0 of one of the protocol board (Autosend) to test the Virtual Wire communication link by itself * Remove ID0 jumper and connect 9-Pin PC cables between the protocol boards and the host computers * Install the host program on the computers * Configure the host programs and retest the Virtual Wire communications link using the host computers Take care in plugging a transceiver board into a protocol board. The transceiver board must be oriented so that THE BOARD RESTS ON THE NYLON SCREW SUPPORTS AND NOT OVER THE BATTERIES. Be sure that the transceiver board pins are correctly plugged into the protocol board connector. It is possible to plug the transceiver board in so that a pin is hanging out on the left or right. BE SURE TO INSPECT THE CONNECTOR ALIGNMENT BEFORE APPLYING POWER. Options and adjustments are discussed below: (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 20 of 46 www.murata.com 4.2 Data Radio Boards The DR1200A Data Radio board is configured to operate at a data rate of 2000 bps on a frequency of 916.50 MHz, and the DR1201A is configured to operate at 868.35 MHz. The kits are shipped with a pair of data radio boards and matching antennas. Data Radio boards with antennas can be purchased separately for development of applications. Antenna Options- The antennas supplied with the kit can be soldered into the antenna "eyelets" on the Data Radio PCBs. Straighten out the "L" bend at the bottom of the antennas before installing (see the Drawings section of the manual). These antennas are simple center-loaded monopoles. Alternatively, a 50 ohm coaxial cable (RG-178, etc.) can be soldered to the RF antenna eyelet (coax center conductor) and the adjacent ground eyelet (coax shield), if a remotely located antenna is used. The remote antenna should have and impedance of approximately 50 ohms, preferably with a VSWR of less than 2:1. A remote antenna is necessary if the transceiver is housed inside a metal box, which is very desirable if a noise source such as a high-speed microprocessor, high-speed logic or a brush-type motor is mounted in close proximity to the transceiver board itself. 4.3 Protocol Board Programming - When using the DK200A protocol software (Murata part number SW0012.V01) provided with the "A" series kits, there are two options that can be programmed on the protocol board. Placing a jumper on ID0 of one protocol board activates the built-in Autosend mode. This allows the kit to be tested without having to hook the protocol boards to host PCs (useful for range testing). Placing a jumper on ID3 of one board strips the packet framing and header characters off the packets it receives. This can be handy for driving small serial printers, etc. Power Supply - Each node can be operated from three 1.5 V AAA batteries. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 21 of 46 www.murata.com RS232 Interface - Level conversion from CMOS to RS232 levels is provided by the MAX 218 IC. It is possible to remove this IC and jumper socket Pin 7 to 14 and Pin 9 to 12 for direct CMOS operation. LED Functions - Three LED indicators are provided on the protocol board. With the supplied protocol software, the LED labeled RXI indicates a valid packet start symbol has been detected. The LED RF RCV indicates that a valid RF packet has been received (no errors detected by the FCS). The LED PC RCV indicates that a message is being sent/received from the host PC. 4.4 Host Program Installation The supplied Windows host terminal programs(s) are installed using Windows Explorer. Go to the Windows Host Software folder on the CD and then to the V110T30C Install folder and click on SETUP.EXE. As the install program runs, you will be asked for a folder name to store the host program files and a Start/Programs menu name ("Virtual Wire" suggested). Check the Kit CD and Murata's web site www.wireless.murata.com for additional/future Software. 5 Theory of Operation 5.1 Data Radio Boards I/O Interface- Referring to the Data Radio Board schematic diagram, connector P1 is the interface connector to the protocol board. Pin 1 is the transmitter data input and can be driven directly by a CMOS gate. The transmitter is pulse ON-OFF modulated by a signal on this line changing from 0 to 3 volts. A high level turns the transmitter on and a low level turns it off. The input impedance to this line is approximately 4.7 kilohms. Pin 2 is a Vcc line for the TR1000/TR1001 ASH transceiver. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 22 of 46 www.murata.com Pin 3 is the PTT line that enables the transmit mode. This line puts the TR1000 (or TR1001) in the transmit mode when it is high (2.5 volts minimum at 2.0 mA maximum). Pin 4 is a Vcc line connected in parallel with Pin 2. Pin 5 is ground. Pin 6 is unused. Pin 7 is a Vcc line, connected in parallel with Pin 2 and Pin 4. Pin 8 the data output pin from the transceiver. This data output is CMOS compatible and is capable of driving a single CMOS gate or a bipolar transistor with a 510 K base resistor. The last connection to the data radio board is the 50 ohm antenna input. The antenna can either be connected directly to the board or connected remotely by using a 50 ohm coaxial cable. TR1000/TR1001 ASH Transceiver - The heart of the DR1200A Data Radio board is the TR1000 ASH transceiver (DR1201A uses the TR1001). This miniature ceramic-metal hybrid provides 2-way RF communication of data. The following section provides an introduction to the ASH transceiver's features, capabilities, theory of operation and configurability. Additional information can be found on the CD. ASH Transceiver Features * Designed for short-range wireless data communications * Supports RF data rates up to 115.2 kbps * 3 Vdc , low current operation with integrated power down function * Stable, easy to use, with all critical RF functions contained in the hybrid * Robust receiver performance with full sensitivity up to 1 GHz * Highly configurable with a minimum of external parts * Choice of OOK or ASK transmitter modulation * Rugged, miniature ceramic-metal package * Low implementation cost * Easy certification to FCC, ETSI and similar low-power radio regulations RFM's amplifier-sequenced hybrid (ASH) transceivers are ideal for short-range wireless data communications where small size, low power consumption and low cost are required. All critical RF functions are contained in the hybrid, simplifying and speeding (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 23 of 46 www.murata.com design-in. The receiver section is sensitive and stable. Two stages of SAW filtering provide excellent receiver out-of-band rejection. The transmitter includes provisions for on-off keyed (OOK) or amplitude-shift keyed (ASK) modulation. The transmitter employs SAW filtering to suppress output harmonics, facilitating compliance with FCC 15.249, ETSI I-ETS 300 220 and similar low-power radio regulations. ASH transceiver technology offers a rich set of enabling features in short-range wireless applications. Key features include: * Small size - the ASH transceiver package footprint is nominally 0.28 x 0.40 inch, with a package volume of only 0.009 in3 (146 mm3). Transceiver operation is configured using a dozen miniature passive components, making is practical to add short-range wireless data connectivity to a watch, pen, PDA, etc. * Low power - the ASH transceiver operates from 3 Vdc, drawing only 6 mA average in transmit and 1.65 to 4.5 mA in receive (set-up dependent). In addition, the transceiver has an integrated power-down mode to support long duration operation from small batteries. * Robust operation - the ASH transceiver is a single-channel data radio, employing amplitude-shift keyed modulation. But unlike simple AM systems, extensive consideration has been given to operating robustness in the transceiver architecture. The receiver chain includes a narrow-band SAW filter and a SAW delay line, which together provide excellent out-of-band rejection. The logarithmic receiver detector features more than 70 dB of dynamic range. This can be combined with 30 dB of AGC (optional), providing 100 dB of overall receiver dynamic range. Data is recovered from the detected base-band signal using a compound data slicer which provides both excellent threshold sensitivity for low-level signals and good rejection of interference 8-10 dB below the peak level of stronger desired signals. Operating robustness is inherent in the signal processing of the radio itself, (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 24 of 46 www.murata.com providing considerable flexibility in the choice of data protocols that can be used with the transceiver ASH Transceiver Operation The ASH transceiver's unique feature set is made possible by its system architecture. The heart of the transceiver is the amplifier-sequenced receiver section, which provides over 105 dB of stable RF and detector gain without any special shielding or decoupling provisions. Stability is achieved by distributing the total RF gain over time. This is in contrast to a superheterodyne receiver, which achieves stability by distributing total RF gain over multiple frequencies. Refer to the Block Diagram and Timing Cycle drawing in Section A of the manual for the following discussion. This drawing shows the basic amplifier-sequenced receiver architecture. Note that the bias to RF amplifiers RFA1 and RFA2 are independently controlled by a pulse generator, and that the two amplifiers are coupled by a surface acoustic wave (SAW) delay line, which has a typical delay of 0.5 s. An incoming RF signal is first filtered by a narrow-band SAW filter, and is then applied to RFA1. The pulse generator turns RFA1 ON for 0.5 s. The amplified signal from RFA1 emerges from the SAW delay line at the input to RFA2. RFA1 is now switched OFF and RFA2 is switched ON for 0.55 s, amplifying the RF signal further. The ON time for RFA2 is usually set at 1.1 times the ON time for RFA1, as the filtering effect of the SAW delay line stretches the signal pulse from RFA1 somewhat. As shown in the timing diagram, RFA1 and RFA2 are never on at the same time, assuring excellent receiver stability. Note that the SAW filter and delay line act together to provide very high receiver ultimate rejection. Amplifier-sequenced receiver operation has several interesting characteristics that can be exploited in system design. The RF amplifiers in an amplifier-sequenced receiver can be turned on and off almost instantly, allowing for very quick power-down (sleep) (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 25 of 46 www.murata.com and wake-up times. Also, both RF amplifiers can be off between ON sequences to trade-off receiver noise figure for lower average current consumption. The effect on noise figure can be modeled as if RFA1 is on continuously, with an attenuator placed in front of it with a loss equivalent to 10*log10(RFA1 duty factor), where the duty factor is the average amount of time RFA1 is ON (up to 50%). Please refer to the ASH Transceiver Block Diagram in Section A for the following discussion: Antenna port - the only external RF components needed for the ASH transceiver are the antenna, antenna matching coil and electrostatic discharge (ESD) protection choke. Receiver chain - the narrow-band SAW filters provides high receiver RF selectivity. The output of the SAW filter drives amplifier RFA1. This amplifier includes provisions for detecting the onset of saturation (AGC Set), and for switching between 35 dB of gain and 5 dB of gain (Gain Select). AGC Set is an input to the AGC Control function, and Gain Select is the AGC Control function output. ON/OFF control to RFA1 (and RFA2) is generated by the Pulse Generator & RF Amp Bias function. The output of RFA1 drives the low-loss SAW delay line, which has a nominal delay of 0.5 s. Note that the SAW RF filter and SAW delay line both contribute to the excellent out-of-band rejection of the receiver. The second amplifier, RFA2, provides 51 dB of gain below saturation. The output of RFA2 drives an active full-wave detector with 19 dB of gain. The onset of saturation in each section of RFA2 is detected and summed to provide a logarithmic response. This is added to the output of the full-wave detector to produce an overall detector response that is linear for low signal levels, and transitions into a log response for high signal levels. This combination provides excellent threshold sensitivity and more than 70 dB of detector dynamic range. In combination with the 30 dB of AGC range in RFA1, more than 100 dB of receiver dynamic range can be achieved. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 26 of 46 www.murata.com The detector output drives a three-pole, 0.05 degree equiripple low-pass filter response with excellent group delay flatness and minimal pulse ringing. The 3 dB bandwidth of the filter is adjusted with a single external resistor to match the data rate and data encoding of the transmitted signal. The filter is followed by a base-band amplifier which boosts the detected signal to the BBOUT pin, which is coupled to the CMPIN pin or to an external data recovery process (DSP, etc.) by a series capacitor. When the transceiver is placed in power-down or in a transmit mode, the output impedance of BBOUT becomes very high. This feature helps preserve the charge on the coupling capacitor to minimize data slicer stabilization time when the transceiver switches back to the receive mode. Data Slicers - The CMPIN pin drives two data slicers, which convert the analog signal from BBOUT back into a data stream. The best data slicer choice depends on the system operating parameters. Data slicer DS1 is a capacitor-coupled comparator with provisions for an adjustable threshold. DS1 provides the best performance at low signal-to-noise conditions. The threshold, or squelch, offsets the comparator's slicing level, and is set with a resistor between the RREF and THLD1 pins. This threshold allows a trade-off between receiver sensitivity and output noise density in the no-signal condition. S2 is a "dB-below-peak" slicer. The peak detector charges rapidly to the peak value of each data pulse, and decays slowly in between data pulses (1:1000 ratio). The slicer trip point can be set from 0 to 12 dB below this peak value with a resistor between RREF and THLD2. DS2 is best for ASK modulation where the transmitted signal has been shaped to minimize signal bandwidth. AGC Control - The output of the Peak Detector also provides an AGC Reset signal to the AGC Control function through the AGC comparator. The purpose of the AGC function is to extend the dynamic range of the receiver, so that two transceivers can operate close together when running ASK and/or high data rate modulation. The AGC (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 27 of 46 www.murata.com also prevents receiver saturation by a strong in-band interfering signal, allowing operation to continue at short range in the presence of the interference. The onset of saturation in the output stage of RFA1 is detected and generates the AGC Set signal to the AGC Control function. The AGC Control function then selects the 5 dB gain mode for RFA1. The AGC comparator will send a reset signal when the Peak Detector output (multiplied by 0.8) falls below the fixed reference voltage for DS1. A capacitor at the AGCCAP pin avoids AGC "chattering" during the time the signal propagates through the log detector, low-pass filter and charges the peak detector. The AGC capacitor also allows the AGC hold-in time to be set longer than the peak detector decay time to avoid AGC chattering during runs of "0" bits in the received data stream. Note that AGC operation requires the peak detector to be functioning, even if DS2 is not used. AGC operation can be defeated by connecting the AGCCAP pin to VCC, or latched ON connecting a resistor between the AGCCAP pin and ground. Receiver pulse generator and RF amplifier bias - The receiver amplifier-sequence operation is controlled by the Pulse Generator & RF Amplifier Bias module, which in turn is controlled by the PRATE and PWIDTH input pins, and the Power Down Control Signal from the Modulation & Bias Control function. Transmitter chain - the transmitter chain consists of a SAW delay line oscillator TXA1, followed by a modulated buffer amplifier TXA2. The SAW filter suppresses transmitter harmonics to the antenna. Note that the same SAW devices used in the amplifiersequenced receiver are reused in the transmit modes. Transmitter operation supports two modulation formats, on-off keyed (OOK) modulation, and amplitude-shift keyed (ASK) modulation. When OOK modulation is chosen, the transmitter output turns completely off between "1" data pulses. When ASK modulation is chosen, a "1" pulse is represented by a higher transmitted power level, and a "0" is represented by a lower transmitted power level. OOK modulation provides compatibility with first-generation ASH technology, and provides for power conservation. ASK modulation must be used for high data rates (data pulses less than 30 s). ASK (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 28 of 46 www.murata.com modulation also allows the transmitted pulses to be shaped to control modulation bandwidth. The transmitter RF output voltage is proportional to the input current to the TXMOD pin, which modulates TXA2. A resistor in series with TXMOD adjusts the peak transmitter output power. The four transceiver operating modes - receive, transmit ASK, transmit OOK and power-down ("sleep"), are controlled by the Modulation & Bias Control function, and are selected with the CNTRL1 and CNTRL0 control pins. CNTRL1 and CNTRL0 are CMOS compatible inputs. ASH Transceiver Configurability ASH transceivers are highly configurable, offering the user great flexibility in optimizing for specific applications and protocol formats. The operating configuration is set using low-cost resistors and capacitors. Key points of configurability include: * Adjustable receiver sensitivity versus current consumption * Adjustable receiver low-pass filter to support various data rates/encoding techniques * Adjustable peak transmitter output power * Conventional or "dB below peak" data slicer select * Adjustable thresholds (squelch settings) for each data slicer * Adjustable AGC hold-in time and AGC latch/defeat function * OOK or ASK modulation with adjustable ASK modulation depth * Continuous or duty-cycled operation (integrated power down function) * 2.7 to 3.5 Vdc power supply range (down to 2.2 Vdc over limited temperature range) Data Radio Board Specifications Operating Frequency DR1200A 916.5 MHz DR1201A 868.35 MHz (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 29 of 46 www.murata.com Modulation On-Off Keyed Antenna 50 ohm Operating Data Rate 2000 bps (500 s min. pulse width @ TX input) TX Frequency Tolerance less than 200 kHz, including set-on, temperature and aging drift TX Output Power -1 dBm nominal TX Harmonics less than -55 dBc Receiver Performance BER less than 10E-4 for a -100 dBm input (2000 bps) RX Pulse Distortion less than 10% for a 500 s TX pulse RX Dynamic Range -100 to 0 dBm Data DC Balance receiver performance shall be maintained for data with an average "1" density from 45 to 55% Data Run Length receiver performance shall be maintained for "1" or "0" run lengths of at least 4 bits RX Off-Channel Rejection DR1200A-DK greater than 70 dB, 0.25 to 870 MHz and 962 to 2500 MHz DR1201A-DK greater than 70 dB, 0.25 to 825 MHz and 911 to 2500 MHz (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 30 of 46 www.murata.com RX On-Channel Rejection less than 30% BER degradation for an interfering signal at least 10 dB below the desired signal after 16 bits (50% duty cycle) of the desired signal received RX No-Signal Output digitized white thermal noise DC Power Supply 2.7 to 3.5 Vdc, 10 mV max peak-to-peak ripple Supply Current, RX Mode less than 4.0 mA ave @ 3 Vdc supply Supply Current, TX Mode less than 12 mA peak @ 3 Vdc supply I/O Data Interface 4.7K TX input load; RX output capable of driving one 3V CMOS gate TX/RX Control Input low for RX, high for TX (source 2 mA @ 2.5 V min.) Operating Temperature Range -40 to +85 deg C 5.2 Protocol Board I/O Interface - Connector J1 (see Protocol Board schematic) is the I/O interface between the protocol board and the data radio board. J1-Pin 1 carries the transmit data signal from U2-Pin 7 to the transmitter input on the Data Radio board. J1-Pin 2 provides Vcc to the Data Radio board. J1-Pin 3 provides the transmit enable signal (PTT) from PNP transistor Q2. The Data Radio board requires 2 mA at 2.5 V on the PTT input to enable the transmit mode. J1-Pin 7 is another Vcc input to the Data Radio board. J1Pin 5 is ground. J1-Pin 4 is a third Vcc input to the Data Radio board. J1-Pin 8 carries the receiver digital output from the Data Radio board. Q1 provides a high input impedance buffer between this signal and the input to U2. J1-Pin 6 is unused in the DR1200A-DK and DR1201A-DK implementation. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 31 of 46 www.murata.com RS232 Interface - Connector J2 is the RS232 interface on the protocol board. This 9-Pin female connector is configured to appear as a DCE (modem). The protocol board does not implement hardware flow control, so only J2-Pin 2 and J2-Pin 3 carry active signals. J2-Pin 2 (RD) sends data to the host computer, and J2-Pin 3 receives data from the host computer (TD). J2 Pins 4 and 6 are connected (DTR & DSR), and J2 Pins 1,7 and 8 are connected (CD, RQS, CTS) J2-Pin 5 is ground. Protocol Microcontroller - The link-layer protocol is implemented in an ATMEL AT89C2051 microcontroller U2. The 8-bit microcontroller operates from an 22.118 MHz quartz crystal. The microcontroller includes 2 Kbytes of flash EPROM memory and 128 bytes of RAM. The microcontroller also includes two 16-bit timers and one hardware serial port, making it especially suitable as a link-layer packet controller. Inputs to the microcontroller include the programming pins ID0 - ID3, on Pins 14, 15, 16 and 17, the buffered receive data (RRX) on Pin 6, and the CMOS-level input from the host computer on Pin 2. Outputs from the microcontroller include the transmit data on Pin 7, the data output to the host computer on Pin 3, the transmit enable signal Pin 19, the RS232-transceiver control on Pin 18, and the LED outputs on Pins 8 (RXI), 9 (RF RCV), and 11(PC RCV). Diode D2 and capacitor C7 form the power-up reset circuit for the microcontroller. CMOS/RS232 Level Converter - Conversion to and from RS232 and 4.5 V CMOS logic levels is done by U1, a Maxim MAX218 Dual RS232 Transceiver. L1, D1 and C5 operate in conjunction with the IC's switch-mode power supply to generate 6.5 V for the transmitter and receiver conversions. Pin 3 on the MAX218 controls the switchedmode supply via U2 Pin 18. The RS232 serial input signal from J2-Pin 3 is input on U1Pin 12 and is converted to a 4.5 V CMOS level (note inversion) and output on U1-Pin 9. The CMOS serial output signal from U2-Pin 2 is input on U1-Pin 7 and converted to an RS232 output (note inversion) on U1-Pin 14. This signal is found on J2-Pin 3. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 32 of 46 www.murata.com The RS232 conversion can be bypassed for direct CMOS operation by removing U1 from its socket and placing one jumper in socket Pins 7 and 14 and a second jumper in socket Pins 9 and 12. Protocol Board Specifications Host Interface RS232 DCE compatible 9-Pin female (modem) connector, 19.2 kbps, byte asynchronous, 1 start bit, 8 data bits, no parity, 1 stop bit Radio Interface Murata Data Radio Type-1 interface, 8-Pin SIP connector, 2000 bps, 12 DC-balanced symbol bits/byte, with integrated PTT control Power Supply 4.5 Vdc nominal from 3 AAA batteries Operating Temperature Range 0 to 70 deg C Storage Temperature Range -40 to +85 deg C 5.3 Protocol Firmware Description - The purpose of this data-link protocol is to provide automatic, verified, error-free transmission of messages between Virtual Wire(R) Radio Nodes via RS232 serial connections to the host processors. Operation on both the RS232 side and the radio side is half-duplex. Operation of the RS232 serial connection is 19.2 kbps, with eight data bits (byte), one stop bit, and no parity bit. The transmission rate on the radio side is approximately 2000 bps, using 12-bit DC-balanced symbols for each data byte. The radio receiver is (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 33 of 46 www.murata.com unsquelched when not receiving data, and will output digitized white noise. The protocol is designed to tolerate continuous noise between packets for greatest sensitivity. The following I/O lines are implemented on the protocol microcontroller: radio receive line (RRX) radio transmit line (RTX) radio transmit/receive control line, high on transmit (PTT) RS232 receive line (PRX) RS232 transmit line (PTX) Maxim 218 ON/OFF control line node ID input lines (ID0 through ID3) three LED control Lines (RXI, RF RCV and PC RCV) A description of the DK200A protocol and the source code listing is provided in the ASH Transceiver Software Designer's Guide on the CD. Note that the DR1200A and DR1201A Data Radio Boards are already configured to match this protocol. Special note: Operation on 868.35 MHz under ETSI I-ETS 300 220-1 currently limits transmissions to 36 seconds in any 60 minute interval. The software supplied with the DR1201A-DK is intended for development purposes and does not include transmission interval limiting. Systems designed for retail sale under current ETSI regulations must include provisions to comply with the 36 seconds per 60 minute (1% duty cycle) requirements. See the I-ETS 300 220-1 regulations for further details. (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 34 of 46 www.murata.com ASH Receiver Block Diagram & Timing Cycle Antenna SAW Filter RFA1 P1 SAW Delay Line RFA2 P2 Detector & Low-Pass Filter Data Out Pulse Generator RF Input RF Data Pulse t PW1 t P1 PRI tPRC RFA1 Out Delay Line Out t PW2 P2 (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 35 of 46 www.murata.com (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 36 of 46 www.murata.com ESD Choke SAW 20 CR Filter RFIO Antenna TXM 18 TXA1 PR R PW R RFA2 BB AGC Reset R LPF Low-Pass Filter LPFADJ 9 AGC C AGC Control Detector VCC1: Pin 2 VCC2: Pin 16 GND1: Pin 1 GND2: Pin 10 GND3: Pin 19 RREF: Pin 11 CMPIN: Pin 6 AGCCAP 3 Log Power Down Control 15 PWIDTH Pulse Generator & RF Amp Bias AGC Set Gain Select SAW Delay Line PRATE 14 TXA2 RFA1 17 Modulation & Bias Control TXMOD 8 TX CN CN IN TRL1 TRL0 R 5 BBO C PKD C AND 12 THLD2 TH2 R REF R 11 Threshold Control Thld DS1 dB Below Peak Thld DS2 TH1 R Ref Ref THLD1 13 AGC PKDET 4 6 Peak Detector BBOUT ASH Transceiver Block Diagram 7 RXDATA DR1200A/DR1201A Data Radio Board Antenna Mounting Detail See component placement Dwg (Top View) for Antenna Pad location. Mount antenna perpendicular to the Printed Circuit Board as shown. TR Transceiver View From Antenna Port of PCB (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 37 of 46 www.murata.com (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 38 of 46 www.murata.com + 3 VDC P1-2 L2 ANT + C9 C1 L1 1 20 C2 2 19 C5 Q1 3 18 R9 PTT P1-3 4 17 R8 R7 C7 C3 C8 5 U1 16 C4 + 3 VDC (U1, Pin 3) 6 L3 C6 15 R1 7 14 R2 R10 C10 R5 8 13 R3 R6 9 12 10 11 1 2 3 4 5 6 7 8 Schematic, DR1200A/DR1201A Date: 12/19/2001, LM Data In Vcc PTT Vcc GND Not Used Modulation Input P1-1 Data Output P1-8 R4 Vcc Data Out P1 DR1200A/DR1201A Bill of Materials Murata P/N Ref Des Qty PCB1 1 400-1528-004X1 Printed Circuit Board U1 1 TR1000/TR1001 TR1000 for DR1200A, TR1001 for DR1201A L1 1 500-0583-100 Inductor, SMT, 10 nH, (Coilcraft 0805HT-10NTJ) L2 1 500-0583-101 Inductor, SMT, 100 nH, (Coilcraft 0805CS-101TK) Q1 1 500-0183-001 Transistor, SOT, MMBT2222L C1, C6 0 C2, C4, C5, C7 4 500-0621-101 Capacitor, SMT, 100 pF, 5%, 0603 C3 1 500-0621-154 Capacitor, SMT, 0.15 uF, %10, 0603 C8 1 500-0621-682 Capacitor, SMT, 0.0068 uF, %10, 0603 C9 1 500-0675-106 Capacitor, SMT, 10 uf, Kemet T491B106K006AS C10 1 500-0675-273 Capacitor, SMT, 0.027 uF, %10, 0603 R1 1 500-0620-274 Resistor, Chip, 270K, 0.1 W, 5%, 0603 R2, R6 2 500-0620-334 Resistor, Chip, 330K, 0.1 W, 5%, 0603 R3, L3 2 500-0620-001 Resistor, Chip, 0.0, 0.1W, 0603 R4 1 500-0828-104 Resistor, Chip, 100K, 0.1 W, 1%, 0603 R5, R10 2 500-0620-472 Resistor, Chip, 2.4K, 0.1 W, 5%, 0603 R7 1 500-0620-123 Resistor, Chip, 12K, 0.1 W, 5%, 0603 R8 1 500-0620-333 Resistor, Chip, 33K, 0.1 W, 5%, 0603 R9 1 500-0620-273 Resistor, Chip, 27K, 0.1 W, 5%, 0603 P1 1 500-0644-001 Header, 8 Pin (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 Description Not Used 39 of 46 www.murata.com DR1200A/DR1201A Top Side Component Placement (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 40 of 46 www.murata.com 916.5 MHz Test Antenna Drawing 1.950 +/- .025 .10 1.45 .40 R.03 +/- .005 Strip insulation to bare copper approx. .125 min, .150 max. Not drawn to scale. Units in inches. 22 AWG insulated solderable magnet wire. 3 turns close wound on .130 in. dia. Finished ID = .130, +/- .003 916.5 MHZ ANT 7/07/98 LAM (c) 1998 Murata 400-1309-001 (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 41 of 46 www.murata.com 868.35 MHz Test Antenna Drawing 2.010 +/- .025 1.50 .11 .40 R.03 +/- .005 Strip insulation to bare copper approx. .125 min, .150 max Not drawn to scale. Units in inches. 22 AWG insulated solderable magnet wire. 3.5 turns close wound on .125 in. dia. Finished ID = .125, +/- .003 868.35 MHZ ANT 7/07/98 LAM (c) 1998 Murata 400-1406-001 (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 42 of 46 www.murata.com NOTES: (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 43 of 46 + 2U874 DALLAS, TEXAS 75244 RF Monolithics, Inc. +3V + DRAWN BY/DATE: + +1.5V C2 1uf C3 1uf C4 1uf J1 NC +4.5V 22.118 MHz + +4.5V C6 10uf +4.5V R3 100K R2 154K 8 DATA OUT (RRX) 7 RX VCC 6 (VREF) 5 GND 4 RX VCC 3 (PTT) 2 TX VCC 1 DATA IN (RTX) CHECKED/APPROVED Lee A. Mrha 5Mar99 +3V 5,17,20 NC 2 15 6 NC 3 10 16 13 VREF U2 20 D4 D5 R6 10K R4 10K +4.5V MMBT 2907 Q2 +3V Q1 MMBT2222 RTX J1-1 DESCRIPTION R5 51K R7 510K PTT RRX 2U874 DWG. NO. 444-1001-003 X REV 1/1 SHEET APP/DATE SCHEMATIC, Protocol Bd., 19.2Kbs A ID0 P2 D3 R1 1.8K +4.5V ECN NO. CODE IDENT 14 15 ID1 ID2 ID3 C8 .1uf REV SIZE TITLE: 12 17 16 19 7 6 8 9 11 18 10 AT89C2051 1 C7 1uf 13 5 4 8 18 X1 3 U1 11 MAX218 4 2 7 +4.5V D2 1N4148 9 19 + C5 1uf 14 1 D1 1N5819 +4.5V 12 S1 L1 15uh + C1 100uf 6 4 8 1 7 5 2 3 J2 +4.5V + + + ADDRESS D3, D4, D5 are ultrabright LED's with cathode to B+. Polarity may vary with different LED's. PB1001-2 Protocol Board www.murata.com PB1001-2 Protocol Board Top Side Component Placement (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 44 of 46 www.murata.com PB1001-2 Protocol Board Bottom Side Component Placement (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 45 of 46 www.murata.com (c)2010-2015 by Murata Electronics N.A., Inc. DR1200/1201A-DK 10/26/15 46 of 46 www.murata.com 500-0673-104 500-0022-204 1 1 1 1 Q2 R1 R2 R3 500-0655-002 500-0656-001 1 1 1 2 R6 S1 X1 500-0658-002 500-0659-002 500-0660-001 500-0661-001 500-0665-001 1 1 2 2 4 U2 500-0657-001 1 U1 500-0724-001 500-0022-103 500-0022-513 1 2 R4 R5, R7 500-0732-001 500-0022-182 500-0653-001 1 500-0183-001 500-0651-002 500-0650-001 500-0647-001 500-0051-001 500-0646-001 500-0623-104 500-0244-106 Q1 1 1 J1 P2 500-0649-001 3 D3, D4, D5 1 1 D2 1 1 D1 J2 1 C8 L1 500-0648-001 1 C6 500-0669-001 500-0243-105 1 5 C1 1 PCB1 C2, C3, C4, C5, C7, 400-1354-001X1 Qty Ref Des Murata P/N McMaster Carr Digi-Key Digi-Key Keystone Arrow Electronics Digi-Key Digi-Key Digi-Key Augat Newark Motorolla Force Electronics Newark Newark Digi-Key Digi-Key Digi-Key Digi-Key Newark Newark Newark Vendor 20 pin IC socket 22.1184 MHz Xtal, Series Resonant Switch, DPDT Resistor, chip, 10K(J), .2w, 0805 Resistor, chip, 51K(J), .2w, 0805 Resistor, chip, 200K(J), .2w, 0805 Resistor, chip, 100K, .2w, 1%, 0805 Resistor, chip, 154K, .2w, 1%, 0805 Resistor, chip, 1.8K(J), .2w, 0805 Transistor, SOT, MMBT2907AL Transistor, SOT, MMBT2222AL 8 pin dual row header, Molex 10-89-6084 Inductor, 15uh PCB socket, 9 pin, SPC Technology DE9S-FRS PCB connector, Molex 22-02-2085 T-1 Ultrabright LED Diode, High speed switching, JANTX1N4148 Diode, Schottky, 1N5819 Cap, chip, 0805, 0.1uf 25V Cap, SMT, Kemet T491B106K006AS Cap, SMT, Kemet T491A105K016AS Cap, electrolytic, 100uf 25V Printed Circuit Board Description 9723K22 H620-ND H560-ND 2446 Bumper feet, .375 square Nut, 6-32, nylon Screw, 6-32, 1/2 inch, nylon AAA battery holder, single cell AT89C2051-24PC 24MHz, PDIP, commercial temperature MAX218CPP-ND RS232C Transceiver, MAX218CPP ED3320-ND CTX063-ND SSTS220PC MMBT2907AL MMBT2222AL 10-89-6084 44F4268 89N1583 WM3206-ND LT1034-ND 1N4148CT-ND 1N5819CT-ND 92F5768 89F5035 51F2912 Vendor P/N PB1001-2 Protcol Board Bill of Materials